From 58e7ef4171f9c326803819ec52bd7a1f3525c9bd Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Sun, 9 Nov 2014 12:08:21 -0800 Subject: [PATCH 21/68] MAX2837: Refactoring toward abstracted SPI. Conflicts: firmware/common/hackrf_core.c firmware/common/hackrf_core.h firmware/common/tuning.c --- firmware/common/hackrf_core.c | 36 ++-------- firmware/common/hackrf_core.h | 2 +- firmware/common/max2837.c | 28 ++++++-- firmware/common/max2837.h | 20 +++++- firmware/common/max2837_drv.c | 150 --------------------------------------- firmware/common/max2837_drv.h | 54 -------------- firmware/common/max2837_spi.c | 70 ++++++++++++++++++ firmware/common/max2837_spi.h | 34 +++++++++ firmware/common/max2837_target.c | 137 +++++++++++++++++++++++++++++++++++ firmware/common/max2837_target.h | 37 ++++++++++ firmware/common/tuning.c | 1 + firmware/hackrf-common.cmake | 3 +- 12 files changed, 328 insertions(+), 244 deletions(-) delete mode 100644 firmware/common/max2837_drv.c delete mode 100644 firmware/common/max2837_drv.h create mode 100644 firmware/common/max2837_spi.c create mode 100644 firmware/common/max2837_spi.h create mode 100644 firmware/common/max2837_target.c create mode 100644 firmware/common/max2837_target.h --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -24,6 +24,8 @@ #include "hackrf_core.h" #include "si5351c.h" #include "max2837.h" +#include "max2837_spi.h" +#include "max2837_target.h" #include "rffc5071.h" #include "rffc5071_spi.h" #include "sgpio.h" @@ -40,7 +42,10 @@ .i2c_address = 0x60, }; -max2837_driver_t max2837; +max2837_driver_t max2837 = { + .spi = NULL, /* TODO */ +}; + spi_t rffc5071_spi = { .init = rffc5071_spi_init, @@ -532,38 +537,11 @@ scu_pinmux(SCU_AD_CS, SCU_GPIO_FAST); GPIO_SET(PORT_AD_CS) = PIN_AD_CS; GPIO_DIR(PORT_AD_CS) |= PIN_AD_CS; - - scu_pinmux(SCU_XCVR_CS, SCU_GPIO_FAST); - GPIO_SET(PORT_XCVR_CS) = PIN_XCVR_CS; - GPIO_DIR(PORT_XCVR_CS) |= PIN_XCVR_CS; - - /* Configure SSP1 Peripheral (to be moved later in SSP driver) */ - scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); - scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); - scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); } void ssp1_set_mode_max2837(void) { - /* FIXME speed up once everything is working reliably */ - /* - // Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz - const uint8_t serial_clock_rate = 32; - const uint8_t clock_prescale_rate = 128; - */ - // Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz - const uint8_t serial_clock_rate = 21; - const uint8_t clock_prescale_rate = 2; - - ssp_init(SSP1_NUM, - SSP_DATA_16BITS, - SSP_FRAME_SPI, - SSP_CPOL_0_CPHA_0, - serial_clock_rate, - clock_prescale_rate, - SSP_MODE_NORMAL, - SSP_MASTER, - SSP_SLAVE_OUT_ENABLE); + max2837_spi_init(max2837.spi); } void ssp1_set_mode_max5864(void) --- a/firmware/common/hackrf_core.h +++ b/firmware/common/hackrf_core.h @@ -34,7 +34,7 @@ #include "si5351c_drv.h" -#include "max2837_drv.h" +#include "max2837.h" #include "rffc5071.h" #include "w25q80bv.h" --- a/firmware/common/max2837.c +++ b/firmware/common/max2837.c @@ -31,7 +31,8 @@ #include #include #include "max2837.h" -#include "max2837_drv.h" +#include "max2837_spi.h" +#include "max2837_target.h" #include "max2837_regs.def" // private register def macros #include "hackrf_core.h" @@ -77,8 +78,12 @@ 0x000 }; /* 31 */ /* Set up all registers according to defaults specified in docs. */ -void max2837_init(max2837_driver_t* const drv) +static void max2837_init(max2837_driver_t* const drv) { + max2837_spi_init(drv->spi); + max2837_mode_shutdown(drv); + max2837_target_init(drv); + memcpy(drv->regs, max2837_regs_default, sizeof(drv->regs)); drv->regs_dirty = 0xffffffff; @@ -92,10 +97,8 @@ */ void max2837_setup(max2837_driver_t* const drv) { - max2837_pin_config(drv); - max2837_init(drv); - + /* Use SPI control instead of B1-B7 pins for gain settings. */ set_MAX2837_TXVGA_GAIN_SPI_EN(drv, 1); set_MAX2837_TXVGA_GAIN_MSB_SPI_EN(drv, 1); @@ -121,10 +124,21 @@ max2837_regs_commit(drv); } +static uint16_t max2837_read(max2837_driver_t* const drv, uint8_t r) { + uint16_t value = (1 << 15) | (r << 10); + max2837_spi_transfer(drv->spi, &value, 1); + return value & 0x3ff; +} + +static void max2837_write(max2837_driver_t* const drv, uint8_t r, uint16_t v) { + uint16_t value = (r << 10) | (v & 0x3ff); + max2837_spi_transfer(drv->spi, &value, 1); +} + uint16_t max2837_reg_read(max2837_driver_t* const drv, uint8_t r) { if ((drv->regs_dirty >> r) & 0x1) { - drv->regs[r] = max2837_spi_read(drv, r); + drv->regs[r] = max2837_read(drv, r); }; return drv->regs[r]; } @@ -132,7 +146,7 @@ void max2837_reg_write(max2837_driver_t* const drv, uint8_t r, uint16_t v) { drv->regs[r] = v; - max2837_spi_write(drv, r, v); + max2837_write(drv, r, v); MAX2837_REG_SET_CLEAN(drv, r); } --- a/firmware/common/max2837.h +++ b/firmware/common/max2837.h @@ -26,10 +26,26 @@ #include #include -#include "max2837_drv.h" +#include "spi.h" + +/* 32 registers, each containing 10 bits of data. */ +#define MAX2837_NUM_REGS 32 +#define MAX2837_DATA_REGS_MAX_VALUE 1024 + +typedef enum { + MAX2837_MODE_SHUTDOWN, + MAX2837_MODE_STANDBY, + MAX2837_MODE_TX, + MAX2837_MODE_RX +} max2837_mode_t; + +typedef struct { + spi_t* const spi; + uint16_t regs[MAX2837_NUM_REGS]; + uint32_t regs_dirty; +} max2837_driver_t; /* Initialize chip. */ -extern void max2837_init(max2837_driver_t* const drv); extern void max2837_setup(max2837_driver_t* const drv); /* Read a register via SPI. Save a copy to memory and return --- a/firmware/common/max2837_drv.c +++ /dev/null @@ -1,150 +0,0 @@ -/* - * Copyright 2012 Will Code? (TODO: Proper attribution) - * Copyright 2014 Jared Boone - * - * This file is part of HackRF. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -#include "max2837_drv.h" - -#include -#include -#include -#include "hackrf_core.h" - -void max2837_pin_config(max2837_driver_t* const drv) { - /* Configure XCVR_CTL GPIO pins. */ -#ifdef JELLYBEAN - scu_pinmux(SCU_XCVR_RXHP, SCU_GPIO_FAST); - scu_pinmux(SCU_XCVR_B1, SCU_GPIO_FAST); - scu_pinmux(SCU_XCVR_B2, SCU_GPIO_FAST); - scu_pinmux(SCU_XCVR_B3, SCU_GPIO_FAST); - scu_pinmux(SCU_XCVR_B4, SCU_GPIO_FAST); - scu_pinmux(SCU_XCVR_B5, SCU_GPIO_FAST); - scu_pinmux(SCU_XCVR_B6, SCU_GPIO_FAST); - scu_pinmux(SCU_XCVR_B7, SCU_GPIO_FAST); -#endif - scu_pinmux(SCU_XCVR_ENABLE, SCU_GPIO_FAST); - scu_pinmux(SCU_XCVR_RXENABLE, SCU_GPIO_FAST); - scu_pinmux(SCU_XCVR_TXENABLE, SCU_GPIO_FAST); - - /* Set GPIO pins as outputs. */ - GPIO2_DIR |= (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE); -#ifdef JELLYBEAN - GPIO_DIR(PORT_XCVR_RXHP) |= PIN_XCVR_RXHP; - GPIO_DIR(PORT_XCVR_B) |= - PIN_XCVR_B1 - | PIN_XCVR_B2 - | PIN_XCVR_B3 - | PIN_XCVR_B4 - | PIN_XCVR_B5 - | PIN_XCVR_B6 - | PIN_XCVR_B7 - ; -#endif - - max2837_mode_shutdown(drv); -#ifdef JELLYBEAN - gpio_set(PORT_XCVR_RXHP, PIN_XCVR_RXHP); - gpio_set(PORT_XCVR_B, - PIN_XCVR_B1 - | PIN_XCVR_B2 - | PIN_XCVR_B3 - | PIN_XCVR_B4 - | PIN_XCVR_B5 - | PIN_XCVR_B6 - | PIN_XCVR_B7 - ); -#endif -} - -void max2837_mode_shutdown(max2837_driver_t* const drv) { - (void)drv; - /* All circuit blocks are powered down, except the 4-wire serial bus - * and its internal programmable registers. - */ - gpio_clear(PORT_XCVR_ENABLE, - (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE)); -} - -void max2837_mode_standby(max2837_driver_t* const drv) { - (void)drv; - /* Used to enable the frequency synthesizer block while the rest of the - * device is powered down. In this mode, PLL, VCO, and LO generator - * are on, so that Tx or Rx modes can be quickly enabled from this mode. - * These and other blocks can be selectively enabled in this mode. - */ - gpio_clear(PORT_XCVR_ENABLE, (PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE)); - gpio_set(PORT_XCVR_ENABLE, PIN_XCVR_ENABLE); -} - -void max2837_mode_tx(max2837_driver_t* const drv) { - (void)drv; - /* All Tx circuit blocks are powered on. The external PA is powered on - * after a programmable delay using the on-chip PA bias DAC. The slow- - * charging Rx circuits are in a precharged “idle-off” state for fast - * Tx-to-Rx turnaround time. - */ - gpio_clear(PORT_XCVR_ENABLE, PIN_XCVR_RXENABLE); - gpio_set(PORT_XCVR_ENABLE, - (PIN_XCVR_ENABLE | PIN_XCVR_TXENABLE)); -} - -void max2837_mode_rx(max2837_driver_t* const drv) { - (void)drv; - /* All Rx circuit blocks are powered on and active. Antenna signal is - * applied; RF is downconverted, filtered, and buffered at Rx BB I and Q - * outputs. The slow- charging Tx circuits are in a precharged “idle-off” - * state for fast Rx-to-Tx turnaround time. - */ - gpio_clear(PORT_XCVR_ENABLE, PIN_XCVR_TXENABLE); - gpio_set(PORT_XCVR_ENABLE, - (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE)); -} - -max2837_mode_t max2837_mode(max2837_driver_t* const drv) { - (void)drv; - if( gpio_get(PORT_XCVR_ENABLE, PIN_XCVR_ENABLE) ) { - if( gpio_get(PORT_XCVR_ENABLE, PIN_XCVR_TXENABLE) ) { - return MAX2837_MODE_TX; - } else if( gpio_get(PORT_XCVR_ENABLE, PIN_XCVR_RXENABLE) ) { - return MAX2837_MODE_RX; - } else { - return MAX2837_MODE_STANDBY; - } - } else { - return MAX2837_MODE_SHUTDOWN; - } -} - -/* SPI register read. */ -uint16_t max2837_spi_read(max2837_driver_t* const drv, uint8_t r) { - (void)drv; - gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS); - const uint16_t value = ssp_transfer(SSP1_NUM, (uint16_t)((1 << 15) | (r << 10))); - gpio_set(PORT_XCVR_CS, PIN_XCVR_CS); - return value & 0x3ff; -} - -/* SPI register write */ -void max2837_spi_write(max2837_driver_t* const drv, uint8_t r, uint16_t v) { - (void)drv; - gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS); - ssp_transfer(SSP1_NUM, (uint16_t)((r << 10) | (v & 0x3ff))); - gpio_set(PORT_XCVR_CS, PIN_XCVR_CS); -} --- a/firmware/common/max2837_drv.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright 2012 Will Code? (TODO: Proper attribution) - * Copyright 2014 Jared Boone - * - * This file is part of HackRF. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -#ifndef __MAX2837_DRV_H -#define __MAX2837_DRV_H - -#include - -/* 32 registers, each containing 10 bits of data. */ -#define MAX2837_NUM_REGS 32 -#define MAX2837_DATA_REGS_MAX_VALUE 1024 - -typedef enum { - MAX2837_MODE_SHUTDOWN, - MAX2837_MODE_STANDBY, - MAX2837_MODE_TX, - MAX2837_MODE_RX -} max2837_mode_t; - -typedef struct { - uint16_t regs[MAX2837_NUM_REGS]; - uint32_t regs_dirty; -} max2837_driver_t; - -void max2837_pin_config(max2837_driver_t* const drv); -void max2837_mode_shutdown(max2837_driver_t* const drv); -void max2837_mode_standby(max2837_driver_t* const drv); -void max2837_mode_tx(max2837_driver_t* const drv); -void max2837_mode_rx(max2837_driver_t* const drv); -max2837_mode_t max2837_mode(max2837_driver_t* const drv); - -uint16_t max2837_spi_read(max2837_driver_t* const drv, uint8_t r); -void max2837_spi_write(max2837_driver_t* const drv, uint8_t r, uint16_t v); - -#endif // __MAX2837_DRV_H --- /dev/null +++ b/firmware/common/max2837_spi.c @@ -0,0 +1,70 @@ +/* + * Copyright 2012 Will Code? (TODO: Proper attribution) + * Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc. + * + * This file is part of HackRF. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 51 Franklin Street, + * Boston, MA 02110-1301, USA. + */ + +#include "max2837_spi.h" + +#include +#include +#include + +#include "hackrf_core.h" + +void max2837_spi_init(spi_t* const spi) { + (void)spi; + + /* FIXME speed up once everything is working reliably */ + /* + // Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz + const uint8_t serial_clock_rate = 32; + const uint8_t clock_prescale_rate = 128; + */ + // Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz + const uint8_t serial_clock_rate = 21; + const uint8_t clock_prescale_rate = 2; + + ssp_init(SSP1_NUM, + SSP_DATA_16BITS, + SSP_FRAME_SPI, + SSP_CPOL_0_CPHA_0, + serial_clock_rate, + clock_prescale_rate, + SSP_MODE_NORMAL, + SSP_MASTER, + SSP_SLAVE_OUT_ENABLE); + + /* Configure SSP1 Peripheral (to be moved later in SSP driver) */ + scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); + scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); + scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); +} + +void max2837_spi_transfer(spi_t* const spi, void* const _data, const size_t count) { + (void)spi; + + uint16_t* const data = _data; + + gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS); + for(size_t i=0; i + * + * This file is part of HackRF. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 51 Franklin Street, + * Boston, MA 02110-1301, USA. + */ + +#include "max2837_target.h" + +#include +#include +#include "hackrf_core.h" + +void max2837_target_init(max2837_driver_t* const drv) { + (void)drv; + + scu_pinmux(SCU_XCVR_CS, SCU_GPIO_FAST); + GPIO_SET(PORT_XCVR_CS) = PIN_XCVR_CS; + GPIO_DIR(PORT_XCVR_CS) |= PIN_XCVR_CS; + + /* Configure XCVR_CTL GPIO pins. */ +#ifdef JELLYBEAN + scu_pinmux(SCU_XCVR_RXHP, SCU_GPIO_FAST); + scu_pinmux(SCU_XCVR_B1, SCU_GPIO_FAST); + scu_pinmux(SCU_XCVR_B2, SCU_GPIO_FAST); + scu_pinmux(SCU_XCVR_B3, SCU_GPIO_FAST); + scu_pinmux(SCU_XCVR_B4, SCU_GPIO_FAST); + scu_pinmux(SCU_XCVR_B5, SCU_GPIO_FAST); + scu_pinmux(SCU_XCVR_B6, SCU_GPIO_FAST); + scu_pinmux(SCU_XCVR_B7, SCU_GPIO_FAST); +#endif + scu_pinmux(SCU_XCVR_ENABLE, SCU_GPIO_FAST); + scu_pinmux(SCU_XCVR_RXENABLE, SCU_GPIO_FAST); + scu_pinmux(SCU_XCVR_TXENABLE, SCU_GPIO_FAST); + + /* Set GPIO pins as outputs. */ + GPIO2_DIR |= (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE); +#ifdef JELLYBEAN + GPIO_DIR(PORT_XCVR_RXHP) |= PIN_XCVR_RXHP; + GPIO_DIR(PORT_XCVR_B) |= + PIN_XCVR_B1 + | PIN_XCVR_B2 + | PIN_XCVR_B3 + | PIN_XCVR_B4 + | PIN_XCVR_B5 + | PIN_XCVR_B6 + | PIN_XCVR_B7 + ; +#endif + +#ifdef JELLYBEAN + gpio_set(PORT_XCVR_RXHP, PIN_XCVR_RXHP); + gpio_set(PORT_XCVR_B, + PIN_XCVR_B1 + | PIN_XCVR_B2 + | PIN_XCVR_B3 + | PIN_XCVR_B4 + | PIN_XCVR_B5 + | PIN_XCVR_B6 + | PIN_XCVR_B7 + ); +#endif +} + +void max2837_mode_shutdown(max2837_driver_t* const drv) { + (void)drv; + /* All circuit blocks are powered down, except the 4-wire serial bus + * and its internal programmable registers. + */ + gpio_clear(PORT_XCVR_ENABLE, + (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE)); +} + +void max2837_mode_standby(max2837_driver_t* const drv) { + (void)drv; + /* Used to enable the frequency synthesizer block while the rest of the + * device is powered down. In this mode, PLL, VCO, and LO generator + * are on, so that Tx or Rx modes can be quickly enabled from this mode. + * These and other blocks can be selectively enabled in this mode. + */ + gpio_clear(PORT_XCVR_ENABLE, (PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE)); + gpio_set(PORT_XCVR_ENABLE, PIN_XCVR_ENABLE); +} + +void max2837_mode_tx(max2837_driver_t* const drv) { + (void)drv; + /* All Tx circuit blocks are powered on. The external PA is powered on + * after a programmable delay using the on-chip PA bias DAC. The slow- + * charging Rx circuits are in a precharged “idle-off” state for fast + * Tx-to-Rx turnaround time. + */ + gpio_clear(PORT_XCVR_ENABLE, PIN_XCVR_RXENABLE); + gpio_set(PORT_XCVR_ENABLE, + (PIN_XCVR_ENABLE | PIN_XCVR_TXENABLE)); +} + +void max2837_mode_rx(max2837_driver_t* const drv) { + (void)drv; + /* All Rx circuit blocks are powered on and active. Antenna signal is + * applied; RF is downconverted, filtered, and buffered at Rx BB I and Q + * outputs. The slow- charging Tx circuits are in a precharged “idle-off” + * state for fast Rx-to-Tx turnaround time. + */ + gpio_clear(PORT_XCVR_ENABLE, PIN_XCVR_TXENABLE); + gpio_set(PORT_XCVR_ENABLE, + (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE)); +} + +max2837_mode_t max2837_mode(max2837_driver_t* const drv) { + (void)drv; + if( gpio_get(PORT_XCVR_ENABLE, PIN_XCVR_ENABLE) ) { + if( gpio_get(PORT_XCVR_ENABLE, PIN_XCVR_TXENABLE) ) { + return MAX2837_MODE_TX; + } else if( gpio_get(PORT_XCVR_ENABLE, PIN_XCVR_RXENABLE) ) { + return MAX2837_MODE_RX; + } else { + return MAX2837_MODE_STANDBY; + } + } else { + return MAX2837_MODE_SHUTDOWN; + } +} --- /dev/null +++ b/firmware/common/max2837_target.h @@ -0,0 +1,37 @@ +/* + * Copyright 2012 Will Code? (TODO: Proper attribution) + * Copyright 2014 Jared Boone + * + * This file is part of HackRF. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 51 Franklin Street, + * Boston, MA 02110-1301, USA. + */ + +#ifndef __MAX2837_TARGET_H +#define __MAX2837_TARGET_H + +#include + +#include "max2837.h" + +void max2837_target_init(max2837_driver_t* const drv); +void max2837_mode_shutdown(max2837_driver_t* const drv); +void max2837_mode_standby(max2837_driver_t* const drv); +void max2837_mode_tx(max2837_driver_t* const drv); +void max2837_mode_rx(max2837_driver_t* const drv); +max2837_mode_t max2837_mode(max2837_driver_t* const drv); + +#endif // __MAX2837_TARGET_H --- a/firmware/common/tuning.c +++ b/firmware/common/tuning.c @@ -26,6 +26,7 @@ #include #include #include +#include "max2837_target.h" #define FREQ_ONE_MHZ (1000*1000) --- a/firmware/hackrf-common.cmake +++ b/firmware/hackrf-common.cmake @@ -136,7 +136,8 @@ ${PATH_HACKRF_FIRMWARE_COMMON}/si5351c.c ${PATH_HACKRF_FIRMWARE_COMMON}/si5351c_drv.c ${PATH_HACKRF_FIRMWARE_COMMON}/max2837.c - ${PATH_HACKRF_FIRMWARE_COMMON}/max2837_drv.c + ${PATH_HACKRF_FIRMWARE_COMMON}/max2837_spi.c + ${PATH_HACKRF_FIRMWARE_COMMON}/max2837_target.c ${PATH_HACKRF_FIRMWARE_COMMON}/max5864.c ${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071.c ${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071_spi.c