Package: memtest86+
Version: 1.55
Tags: patch

The current and older versions of memtest86+ does not support the interal 
Opteron memory controller properly. These are a few simple fixes for that 
in two patches. The patches are against an older version, but visual 
inspection says that they should apply well to a current upstreams source 
at least.

In addition to this, ecc polling should be turned on for "AMD 762", "AMD 
761", "AMD 8000", "AMD 8000", "Intel E7205", "Intel i848/i865", "Intel 
i875P", "Intel E7505". (Change the 0 after the string name to 1 in static 
struct pci_memory_controller...)

/Mattias Wadenstein

diff -upr memtest86+-1.26.orig/pci.c memtest86+-1.26/pci.c
--- memtest86+-1.26.orig/pci.c  Mon May 17 10:50:05 2004
+++ memtest86+-1.26/pci.c       Fri Oct  8 10:41:05 2004
@@ -80,12 +83,18 @@ static int pci_sanity_check(void)
  {
         unsigned long value;
         int result;
+       int dev;
+
         /* Do a trivial check to make certain we can see a host bridge.
          * There are reportedly some buggy chipsets from intel and
          * compaq where this test does not work, I will worry about
          * that when we support them.
          */
-       result = pci_conf_read(0, 0, 0, PCI_CLASS_DEVICE, 2, &value);
+       dev = 0;
+       if (cpu_id.cpuid > 0 && cpu_id.vend_id[0] == 'A' && cpu_id.type == 15) {
+           dev = 24;
+       }
+       result = pci_conf_read(0, dev, 0, PCI_CLASS_DEVICE, 2, &value);
         if (result == 0) {
                 result = -1;
                 if (value == PCI_CLASS_BRIDGE_HOST) {


diff -upr memtest86+-1.26.orig/controller.c memtest86+-1.26/controller.c
--- memtest86+-1.26.orig/controller.c   Wed Sep  1 16:02:00 2004
+++ memtest86+-1.26/controller.c        Fri Oct  8 10:46:44 2004
@@ -1705,6 +1708,11 @@ void find_controller(void)
         unsigned long device;
         int i;
         int result;
+
+       /* AMD64 don't have anything on dev 0 (at least not the ones we have access too) */
+       if (cpu_id.cpuid > 0 && cpu_id.vend_id[0] == 'A' && cpu_id.type == 15) {
+           ctrl.dev = 24;
+       }
         result = pci_conf_read(ctrl.bus, ctrl.dev, ctrl.fn, PCI_VENDOR_ID, 2, &vendor);
         result = pci_conf_read(ctrl.bus, ctrl.dev, ctrl.fn, PCI_DEVICE_ID, 2, &device);
         ctrl.index = 0;