Description: Add a mips64el port
Author: Wesley W. Terpstra <terpstra@debian.org>
Forwarded: no
Reviewed-by: Ryan Kavanagh <rak@debian.org>
Last-Update: 2021-10-06
---
This patch header follows DEP-3: http://dep.debian.net/deps/dep3/
Index: mlton/basis-library/mlton/platform.sig
===================================================================
--- mlton.orig/basis-library/mlton/platform.sig	2021-10-06 16:23:37.161165313 -0400
+++ mlton/basis-library/mlton/platform.sig	2021-10-06 16:24:14.449845088 -0400
@@ -10,7 +10,7 @@
       structure Arch:
          sig
             datatype t = Alpha | AMD64 | ARM | ARM64 | HPPA | IA64 | m68k |
-                         MIPS | PowerPC | PowerPC64 | RISCV | S390 | Sparc | X86
+                         MIPS | MIPS64 | PowerPC | PowerPC64 | RISCV | S390 | Sparc | X86
 
             val fromString: string -> t option
             val host: t
Index: mlton/basis-library/mlton/platform.sml
===================================================================
--- mlton.orig/basis-library/mlton/platform.sml	2021-10-06 16:23:37.161165313 -0400
+++ mlton/basis-library/mlton/platform.sml	2021-10-06 16:23:37.157165669 -0400
@@ -25,6 +25,7 @@
                 (IA64, "IA64"),
                 (m68k, "m68k"),
                 (MIPS, "MIPS"),
+                (MIPS64, "MIPS64"),
                 (PowerPC, "PowerPC"),
                 (PowerPC64, "PowerPC64"),
                 (RISCV, "RISCV"),
Index: mlton/basis-library/primitive/prim-mlton.sml
===================================================================
--- mlton.orig/basis-library/primitive/prim-mlton.sml	2021-10-06 16:23:37.161165313 -0400
+++ mlton/basis-library/primitive/prim-mlton.sml	2021-10-06 16:23:37.157165669 -0400
@@ -156,6 +156,7 @@
              | IA64
              | m68k
              | MIPS
+             | MIPS64
              | PowerPC
              | PowerPC64
              | RISCV
@@ -173,6 +174,7 @@
                 | "ia64" => IA64
                 | "m68k" => m68k
                 | "mips" => MIPS
+                | "mips64" => MIPS64
                 | "powerpc" => PowerPC
                 | "powerpc64" => PowerPC64
                 | "riscv" => RISCV
Index: mlton/bin/platform
===================================================================
--- mlton.orig/bin/platform	2021-10-06 16:23:37.161165313 -0400
+++ mlton/bin/platform	2021-10-06 16:23:37.157165669 -0400
@@ -112,6 +112,9 @@
 m68k*)
         HOST_ARCH=m68k
 ;;
+mips64*)
+	HOST_ARCH=mips64
+;;
 mips*)
 # big-endian and little-endian detect via headers
         HOST_ARCH=mips
Index: mlton/lib/stubs/mlton-stubs/mlton.sml
===================================================================
--- mlton.orig/lib/stubs/mlton-stubs/mlton.sml	2021-10-06 16:23:37.161165313 -0400
+++ mlton/lib/stubs/mlton-stubs/mlton.sml	2021-10-06 16:24:36.231905587 -0400
@@ -160,7 +160,7 @@
             structure Arch =
                struct
                   datatype t = Alpha | AMD64 | ARM | ARM64 | HPPA | IA64 |
-                               m68k | MIPS | PowerPC | PowerPC64 | RISCV |
+                               m68k | MIPS | MIPS64 | PowerPC | PowerPC64 | RISCV |
                                S390 | Sparc | X86
 
                   val all = [(Alpha, "Alpha"),
@@ -171,6 +171,7 @@
                              (IA64, "IA64"),
                              (m68k, "m68k"),
                              (MIPS, "MIPS"),
+                             (MIPS64, "MIPS64"),
                              (PowerPC, "PowerPC"),
                              (PowerPC64, "PowerPC64"),
                              (RISCV, "RISCV"),
Index: mlton/lib/stubs/mlton-stubs/platform.sig
===================================================================
--- mlton.orig/lib/stubs/mlton-stubs/platform.sig	2021-10-06 16:23:37.161165313 -0400
+++ mlton/lib/stubs/mlton-stubs/platform.sig	2021-10-06 16:25:06.517208948 -0400
@@ -10,7 +10,7 @@
       structure Arch:
          sig
             datatype t = Alpha | AMD64 | ARM | ARM64 | HPPA | IA64 | m68k |
-                         MIPS | PowerPC | PowerPC64 | RISCV | S390 | Sparc | X86
+                         MIPS | MIPS64 | PowerPC | PowerPC64 | RISCV | S390 | Sparc | X86
 
             val fromString: string -> t option
             val host: t
Index: mlton/mlton/main/main.fun
===================================================================
--- mlton.orig/mlton/main/main.fun	2021-10-06 16:23:37.161165313 -0400
+++ mlton/mlton/main/main.fun	2021-10-06 16:23:37.157165669 -0400
@@ -200,6 +200,7 @@
        | HPPA => true
        | IA64 => true
        | MIPS => true
+       | MIPS64 => true
        | Sparc => true
        | S390 => true
        | _ => false
Index: mlton/runtime/cenv.h
===================================================================
--- mlton.orig/runtime/cenv.h	2021-10-06 16:23:37.161165313 -0400
+++ mlton/runtime/cenv.h	2021-10-06 16:23:37.157165669 -0400
@@ -101,6 +101,8 @@
 #include "platform/ia64.h"
 #elif (defined (__m68k__))
 #include "platform/m68k.h"
+#elif (defined (__mips64))
+#include "platform/mips64.h"
 #elif (defined (__mips__))
 #include "platform/mips.h"
 #elif (defined (__powerpc64__))
Index: mlton/runtime/platform/mips64.h
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ mlton/runtime/platform/mips64.h	2021-10-06 16:23:37.157165669 -0400
@@ -0,0 +1 @@
+#define MLton_Platform_Arch_host "mips64"
Index: mlton/runtime/platform/linux.c
===================================================================
--- mlton.orig/runtime/platform/linux.c	2021-10-06 16:23:37.161165313 -0400
+++ mlton/runtime/platform/linux.c	2021-10-06 16:23:37.161165313 -0400
@@ -38,7 +38,7 @@
 #else
         GC_handleSigProf ((code_pointer) scp->si_regs.pc);
 #endif
-#elif (defined (__mips__))
+#elif (defined (__mips64)) || (defined (__mips__))
         ucontext_t* ucp = (ucontext_t*)context;
 #ifdef __UCLIBC__
         GC_handleSigProf ((code_pointer) ucp->uc_mcontext.gpregs[CTX_EPC]);