Package: libaio / 0.3.110-1

00_arches_sparc64.patch Patch series | download
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---
 src/syscall-sparc64.h |   98 ++++++++++++++++++++++++++++++++++++++++++++++++++
 src/syscall.h         |    2 +
 2 files changed, 100 insertions(+)

--- a/src/syscall.h
+++ b/src/syscall.h
@@ -24,6 +24,8 @@
 #include "syscall-alpha.h"
 #elif defined(__arm__)
 #include "syscall-arm.h"
+#elif defined(__sparc__) && defined(__arch64__)
+#include "syscall-sparc64.h"
 #elif defined(__sparc__)
 #include "syscall-sparc.h"
 #elif defined(__aarch64__)
--- /dev/null
+++ b/src/syscall-sparc64.h
@@ -0,0 +1,98 @@
+#define __NR_io_setup		268
+#define __NR_io_destroy		269
+#define __NR_io_submit		270
+#define __NR_io_cancel		271
+#define __NR_io_getevents	272
+
+#define io_syscall1(type,fname,sname,type1,arg1)			  \
+type fname(type1 arg1)							  \
+{									  \
+	unsigned long __res;						  \
+	register unsigned long __g1 __asm__("g1") = __NR_##sname;	  \
+	register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
+	__asm__ __volatile__("t		0x6d\n\t"			  \
+			     "sub	%%g0, %%o0, %0\n\t"		  \
+			     "movcc	%%xcc, %%o0, %0\n"		  \
+			     "1:"					  \
+			     : "=r" (__res), "=&r" (__o0)		  \
+			     : "1" (__o0), "r" (__g1)			  \
+			     : "cc");					  \
+	return (type) __res;						  \
+}
+
+#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2)		  \
+type fname(type1 arg1, type2 arg2)					  \
+{									  \
+	unsigned long __res;						  \
+	register unsigned long __g1 __asm__("g1") = __NR_##sname;	  \
+	register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
+	register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
+	__asm__ __volatile__("t		0x6d\n\t"			  \
+			     "sub	%%g0, %%o0, %0\n\t"		  \
+			     "movcc	%%xcc, %%o0, %0\n"		  \
+			     "1:"					  \
+			     : "=r" (__res), "=&r" (__o0)		  \
+			     : "1" (__o0), "r" (__o1), "r" (__g1)	  \
+			     : "cc");					  \
+	return (type) __res;						  \
+}
+
+#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3)	  \
+type fname(type1 arg1, type2 arg2, type3 arg3)				  \
+{									  \
+	unsigned long __res;						  \
+	register unsigned long __g1 __asm__("g1") = __NR_##sname;	  \
+	register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
+	register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
+	register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
+	__asm__ __volatile__("t		0x6d\n\t"			  \
+			     "sub	%%g0, %%o0, %0\n\t"		  \
+			     "movcc	%%xcc, %%o0, %0\n"		  \
+			     "1:"					  \
+			     : "=r" (__res), "=&r" (__o0)		  \
+			     : "1" (__o0), "r" (__o1), "r" (__o2),	  \
+			       "r" (__g1)	  			  \
+			     : "cc");					  \
+	return (type) __res;						  \
+}
+
+#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4)		  \
+{									  \
+	unsigned long __res;						  \
+	register unsigned long __g1 __asm__("g1") = __NR_##sname;	  \
+	register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
+	register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
+	register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
+	register unsigned long __o3 __asm__("o3") = (unsigned long) arg4; \
+	__asm__ __volatile__("t		0x6d\n\t"			  \
+			     "sub	%%g0, %%o0, %0\n\t"		  \
+			     "movcc	%%xcc, %%o0, %0\n"		  \
+			     "1:"					  \
+			     : "=r" (__res), "=&r" (__o0)		  \
+			     : "1" (__o0), "r" (__o1), "r" (__o2),	  \
+			       "r" (__o3), "r" (__g1)	  		  \
+			     : "cc");					  \
+	return (type) __res;						  \
+}
+
+#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5)	  \
+{									  \
+	unsigned long __res;						  \
+	register unsigned long __g1 __asm__("g1") = __NR_##sname;	  \
+	register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
+	register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
+	register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
+	register unsigned long __o3 __asm__("o3") = (unsigned long) arg4; \
+	register unsigned long __o4 __asm__("o4") = (unsigned long) arg5; \
+	__asm__ __volatile__("t		0x6d\n\t"			  \
+			     "sub	%%g0, %%o0, %0\n\t"		  \
+			     "movcc	%%xcc, %%o0, %0\n"		  \
+			     "1:"					  \
+			     : "=r" (__res), "=&r" (__o0)		  \
+			     : "1" (__o0), "r" (__o1), "r" (__o2),	  \
+			       "r" (__o3), "r" (__o4), "r" (__g1)	  \
+			     : "cc");					  \
+	return (type) __res;						  \
+}