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From acdc5c576a565f9d29c0a6a61f3199e8641cd3b7 Mon Sep 17 00:00:00 2001
From: msizanoen1 <qtmlabs@protonmail.com>
Date: Thu, 5 Dec 2019 12:22:41 +0700
Subject: [PATCH] Enable -fPIC on non-bare-metal RISC-V
---
src/lib.rs | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/lib.rs b/src/lib.rs
index 621d31d6..ab0bdf6c 100644
--- a/vendor/cc/src/lib.rs
+++ b/vendor/cc/src/lib.rs
@@ -1365,11 +1365,11 @@ impl Build {
cmd.push_cc_arg("-ffunction-sections".into());
cmd.push_cc_arg("-fdata-sections".into());
}
- // Disable generation of PIC on RISC-V for now: rust-lld doesn't support this yet
- if self
- .pic
- .unwrap_or(!target.contains("windows-gnu") && !target.contains("riscv"))
- {
+ // Disable generation of PIC on bare-metal RISC-V for now: rust-lld doesn't support this yet
+ if self.pic.unwrap_or(
+ !target.contains("windows-gnu")
+ && !(target.contains("riscv") && target.contains("-none-")),
+ ) {
cmd.push_cc_arg("-fPIC".into());
// PLT only applies if code is compiled with PIC support,
// and only for ELF targets.
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