Checksum: c10a29b9527774efdc3ddadaac239d2351c67f67d1051a9e18a43e19b42c9914 (page 1)

• simulavr/1.0.0+git20160221.e53413b-1/examples/verilog/spi.sav
• simulavr/1.0.0+git20160221.e53413b-3/examples/verilog/spi.sav