File: logical_32.s

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binutils-avr 2.26.20160125+Atmel3.6.2-2
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/*
 * tests for logical instruction relaxation
 *
 * Author: libin
 */

.include "relaxation_macro.h"

.macro _logical_op_pattern insn insn1
  insn_32 "\insn r0, r0, r15"

  tran_16_32 "\insn! r0, r15", "\insn r0, r0, r15"

  /* shouldn't alter */
  .set r1
  insn_32 "\insn1  r0,  r0,  r15"
  insn_32 "\insn   r0,  r0,  r16"
  insn_32 "\insn   r16, r16, r0"
  insn_32 "\insn   r16, r16, r17"
  insn_32 "\insn   r0,  r1,  r2"
.endm

.text
/* and/or rD,rA,rB -> and!/or! rD,rA */
_logical_op_pattern "and", "and.c"
_logical_op_pattern "or",  "or.c"