1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893
|
/* tc-tilegx.c -- Assemble for a Tile-Gx chip.
Copyright (C) 2011-2020 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "as.h"
#include "subsegs.h"
#include "elf/tilegx.h"
#include "opcode/tilegx.h"
#include "dwarf2dbg.h"
#include "dw2gencfi.h"
#include "safe-ctype.h"
/* Special registers. */
#define TREG_IDN0 57
#define TREG_IDN1 58
#define TREG_UDN0 59
#define TREG_UDN1 60
#define TREG_UDN2 61
#define TREG_UDN3 62
#define TREG_ZERO 63
/* Generic assembler global variables which must be defined by all
targets. */
/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
int tilegx_cie_data_alignment;
/* Characters which always start a comment. */
const char comment_chars[] = "#";
/* Characters which start a comment at the beginning of a line. */
const char line_comment_chars[] = "#";
/* Characters which may be used to separate multiple commands on a
single line. */
const char line_separator_chars[] = ";";
/* Characters which are used to indicate an exponent in a floating
point number. */
const char EXP_CHARS[] = "eE";
/* Characters which mean that a number is a floating point constant,
as in 0d1.0. */
const char FLT_CHARS[] = "rRsSfFdDxXpP";
/* Either 32 or 64. */
static int tilegx_arch_size = 64;
const char *
tilegx_target_format (void)
{
if (target_big_endian) {
return tilegx_arch_size == 64 ? "elf64-tilegx-be" : "elf32-tilegx-be";
} else {
return tilegx_arch_size == 64 ? "elf64-tilegx-le" : "elf32-tilegx-le";
}
}
#define OPTION_32 (OPTION_MD_BASE + 0)
#define OPTION_64 (OPTION_MD_BASE + 1)
#define OPTION_EB (OPTION_MD_BASE + 2)
#define OPTION_EL (OPTION_MD_BASE + 3)
const char *md_shortopts = "VQ:";
struct option md_longopts[] =
{
{"32", no_argument, NULL, OPTION_32},
{"64", no_argument, NULL, OPTION_64},
{"EB", no_argument, NULL, OPTION_EB },
{"EL", no_argument, NULL, OPTION_EL },
{NULL, no_argument, NULL, 0}
};
size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
{
switch (c)
{
/* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
should be emitted or not. FIXME: Not implemented. */
case 'Q':
break;
/* -V: SVR4 argument to print version ID. */
case 'V':
print_version_id ();
break;
case OPTION_32:
tilegx_arch_size = 32;
break;
case OPTION_64:
tilegx_arch_size = 64;
break;
case OPTION_EB:
target_big_endian = 1;
break;
case OPTION_EL:
target_big_endian = 0;
break;
default:
return 0;
}
return 1;
}
void
md_show_usage (FILE *stream)
{
fprintf (stream, _("\
-Q ignored\n\
-V print assembler version number\n\
-EB/-EL generate big-endian/little-endian code\n\
--32/--64 generate 32bit/64bit code\n"));
}
/* Extra expression types. */
#define O_hw0 O_md1
#define O_hw1 O_md2
#define O_hw2 O_md3
#define O_hw3 O_md4
#define O_hw0_last O_md5
#define O_hw1_last O_md6
#define O_hw2_last O_md7
#define O_hw0_got O_md8
#define O_hw0_last_got O_md9
#define O_hw1_last_got O_md10
#define O_plt O_md11
#define O_hw0_tls_gd O_md12
#define O_hw0_last_tls_gd O_md13
#define O_hw1_last_tls_gd O_md14
#define O_hw0_tls_ie O_md15
#define O_hw0_last_tls_ie O_md16
#define O_hw1_last_tls_ie O_md17
#define O_hw0_tls_le O_md18
#define O_hw0_last_tls_le O_md19
#define O_hw1_last_tls_le O_md20
#define O_tls_gd_call O_md21
#define O_tls_gd_add O_md22
#define O_tls_ie_load O_md23
#define O_tls_add O_md24
#define O_hw0_plt O_md25
#define O_hw1_plt O_md26
#define O_hw1_last_plt O_md27
#define O_hw2_last_plt O_md28
static struct hash_control *special_operator_hash;
/* Hash tables for instruction mnemonic lookup. */
static struct hash_control *op_hash;
/* Hash table for spr lookup. */
static struct hash_control *spr_hash;
/* True temporarily while parsing an SPR expression. This changes the
* namespace to include SPR names. */
static int parsing_spr;
/* Are we currently inside `{ ... }'? */
static int inside_bundle;
struct tilegx_instruction
{
const struct tilegx_opcode *opcode;
tilegx_pipeline pipe;
expressionS operand_values[TILEGX_MAX_OPERANDS];
};
/* This keeps track of the current bundle being built up. */
static struct tilegx_instruction current_bundle[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
/* Index in current_bundle for the next instruction to parse. */
static int current_bundle_index;
/* Allow 'r63' in addition to 'zero', etc. Normally we disallow this as
'zero' is not a real register, so using it accidentally would be a
nasty bug. For other registers, such as 'sp', code using multiple names
for the same physical register is excessively confusing.
The '.require_canonical_reg_names' pseudo-op turns this error on,
and the '.no_require_canonical_reg_names' pseudo-op turns this off.
By default the error is on. */
static int require_canonical_reg_names;
/* Allow bundles that do undefined or suspicious things like write
two different values to the same register at the same time.
The '.no_allow_suspicious_bundles' pseudo-op turns this error on,
and the '.allow_suspicious_bundles' pseudo-op turns this off. */
static int allow_suspicious_bundles;
/* A hash table of main processor registers, mapping each register name
to its index.
Furthermore, if the register number is greater than the number
of registers for that processor, the user used an illegal alias
for that register (e.g. r63 instead of zero), so we should generate
a warning. The attempted register number can be found by clearing
NONCANONICAL_REG_NAME_FLAG. */
static struct hash_control *main_reg_hash;
/* We cannot unambiguously store a 0 in a hash table and look it up,
so we OR in this flag to every canonical register. */
#define CANONICAL_REG_NAME_FLAG 0x1000
/* By default we disallow register aliases like r63, but we record
them in the hash table in case the .no_require_canonical_reg_names
directive is used. Noncanonical names have this value added to them. */
#define NONCANONICAL_REG_NAME_FLAG 0x2000
/* Discards flags for register hash table entries and returns the
reg number. */
#define EXTRACT_REGNO(p) ((p) & 63)
/* This function is called once, at assembler startup time. It should
set up all the tables, etc., that the MD part of the assembler will
need. */
void
md_begin (void)
{
const struct tilegx_opcode *op;
int i;
int mach = (tilegx_arch_size == 64) ? bfd_mach_tilegx : bfd_mach_tilegx32;
if (! bfd_set_arch_mach (stdoutput, bfd_arch_tilegx, mach))
as_warn (_("Could not set architecture and machine"));
/* Guarantee text section is aligned. */
bfd_set_section_alignment (text_section,
TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
require_canonical_reg_names = 1;
allow_suspicious_bundles = 0;
current_bundle_index = 0;
inside_bundle = 0;
tilegx_cie_data_alignment = (tilegx_arch_size == 64 ? -8 : -4);
/* Initialize special operator hash table. */
special_operator_hash = hash_new ();
#define INSERT_SPECIAL_OP(name) \
hash_insert (special_operator_hash, #name, (void *)O_##name)
INSERT_SPECIAL_OP (hw0);
INSERT_SPECIAL_OP (hw1);
INSERT_SPECIAL_OP (hw2);
INSERT_SPECIAL_OP (hw3);
INSERT_SPECIAL_OP (hw0_last);
INSERT_SPECIAL_OP (hw1_last);
INSERT_SPECIAL_OP (hw2_last);
/* hw3_last is a convenience alias for the equivalent hw3. */
hash_insert (special_operator_hash, "hw3_last", (void*)O_hw3);
INSERT_SPECIAL_OP (hw0_got);
INSERT_SPECIAL_OP (hw0_last_got);
INSERT_SPECIAL_OP (hw1_last_got);
INSERT_SPECIAL_OP(plt);
INSERT_SPECIAL_OP (hw0_tls_gd);
INSERT_SPECIAL_OP (hw0_last_tls_gd);
INSERT_SPECIAL_OP (hw1_last_tls_gd);
INSERT_SPECIAL_OP (hw0_tls_ie);
INSERT_SPECIAL_OP (hw0_last_tls_ie);
INSERT_SPECIAL_OP (hw1_last_tls_ie);
INSERT_SPECIAL_OP (hw0_tls_le);
INSERT_SPECIAL_OP (hw0_last_tls_le);
INSERT_SPECIAL_OP (hw1_last_tls_le);
INSERT_SPECIAL_OP (tls_gd_call);
INSERT_SPECIAL_OP (tls_gd_add);
INSERT_SPECIAL_OP (tls_ie_load);
INSERT_SPECIAL_OP (tls_add);
INSERT_SPECIAL_OP (hw0_plt);
INSERT_SPECIAL_OP (hw1_plt);
INSERT_SPECIAL_OP (hw1_last_plt);
INSERT_SPECIAL_OP (hw2_last_plt);
#undef INSERT_SPECIAL_OP
/* Initialize op_hash hash table. */
op_hash = hash_new ();
for (op = &tilegx_opcodes[0]; op->name != NULL; op++)
{
const char *hash_err = hash_insert (op_hash, op->name, (void *)op);
if (hash_err != NULL)
as_fatal (_("Internal Error: Can't hash %s: %s"), op->name, hash_err);
}
/* Initialize the spr hash table. */
parsing_spr = 0;
spr_hash = hash_new ();
for (i = 0; i < tilegx_num_sprs; i++)
hash_insert (spr_hash, tilegx_sprs[i].name,
(void *) &tilegx_sprs[i]);
/* Set up the main_reg_hash table. We use this instead of
creating a symbol in the register section to avoid ambiguities
with labels that have the same names as registers. */
main_reg_hash = hash_new ();
for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
{
char buf[64];
hash_insert (main_reg_hash, tilegx_register_names[i],
(void *) (long) (i | CANONICAL_REG_NAME_FLAG));
/* See if we should insert a noncanonical alias, like r63. */
sprintf (buf, "r%d", i);
if (strcmp (buf, tilegx_register_names[i]) != 0)
hash_insert (main_reg_hash, xstrdup (buf),
(void *) (long) (i | NONCANONICAL_REG_NAME_FLAG));
}
}
#define BUNDLE_TEMPLATE_MASK(p0, p1, p2) \
((p0) | ((p1) << 8) | ((p2) << 16))
#define BUNDLE_TEMPLATE(p0, p1, p2) \
{ { (p0), (p1), (p2) }, \
BUNDLE_TEMPLATE_MASK(1 << (p0), 1 << (p1), (1 << (p2))) \
}
#define NO_PIPELINE TILEGX_NUM_PIPELINE_ENCODINGS
struct bundle_template
{
tilegx_pipeline pipe[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
unsigned int pipe_mask;
};
static const struct bundle_template bundle_templates[] =
{
/* In Y format we must always have something in Y2, since it has
no fnop, so this conveys that Y2 must always be used. */
BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0, TILEGX_PIPELINE_Y2, NO_PIPELINE),
BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1, TILEGX_PIPELINE_Y2, NO_PIPELINE),
BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y0, NO_PIPELINE),
BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y1, NO_PIPELINE),
/* Y format has three instructions. */
BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2),
BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1),
BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2),
BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0),
BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1),
BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0),
/* X format has only two instructions. */
BUNDLE_TEMPLATE(TILEGX_PIPELINE_X0, TILEGX_PIPELINE_X1, NO_PIPELINE),
BUNDLE_TEMPLATE(TILEGX_PIPELINE_X1, TILEGX_PIPELINE_X0, NO_PIPELINE)
};
static void
prepend_nop_to_bundle (tilegx_mnemonic mnemonic)
{
memmove (¤t_bundle[1], ¤t_bundle[0],
current_bundle_index * sizeof current_bundle[0]);
current_bundle[0].opcode = &tilegx_opcodes[mnemonic];
++current_bundle_index;
}
static tilegx_bundle_bits
insert_operand (tilegx_bundle_bits bits,
const struct tilegx_operand *operand,
int operand_value,
const char *file,
unsigned lineno)
{
/* Range-check the immediate. */
int num_bits = operand->num_bits;
operand_value >>= operand->rightshift;
if (bfd_check_overflow (operand->is_signed
? complain_overflow_signed
: complain_overflow_unsigned,
num_bits,
0,
bfd_arch_bits_per_address (stdoutput),
operand_value)
!= bfd_reloc_ok)
{
offsetT min, max;
if (operand->is_signed)
{
min = -(1 << (num_bits - 1));
max = (1 << (num_bits - 1)) - 1;
}
else
{
min = 0;
max = (1 << num_bits) - 1;
}
as_bad_value_out_of_range (_("operand"), operand_value, min, max,
file, lineno);
}
/* Write out the bits for the immediate. */
return bits | operand->insert (operand_value);
}
static int
apply_special_operator (operatorT op, offsetT num, const char *file,
unsigned lineno)
{
int ret;
int check_shift = -1;
switch (op)
{
case O_hw0_last:
check_shift = 0;
/* Fall through. */
case O_hw0:
ret = (signed short)num;
break;
case O_hw1_last:
check_shift = 16;
/* Fall through. */
case O_hw1:
ret = (signed short)(num >> 16);
break;
case O_hw2_last:
check_shift = 32;
/* Fall through. */
case O_hw2:
ret = (signed short)(num >> 32);
break;
case O_hw3:
ret = (signed short)(num >> 48);
break;
default:
abort ();
break;
}
if (check_shift >= 0 && ret != (num >> check_shift))
{
as_bad_value_out_of_range (_("operand"), num,
~0ULL << (check_shift + 16 - 1),
~0ULL >> (64 - (check_shift + 16 - 1)),
file, lineno);
}
return ret;
}
static tilegx_bundle_bits
emit_tilegx_instruction (tilegx_bundle_bits bits,
int num_operands,
const unsigned char *operands,
expressionS *operand_values,
char *bundle_start)
{
int i;
for (i = 0; i < num_operands; i++)
{
const struct tilegx_operand *operand =
&tilegx_operands[operands[i]];
expressionS *operand_exp = &operand_values[i];
int is_pc_relative = operand->is_pc_relative;
if (operand_exp->X_op == O_register
|| (operand_exp->X_op == O_constant && !is_pc_relative))
{
/* We know what the bits are right now, so insert them. */
bits = insert_operand (bits, operand, operand_exp->X_add_number,
NULL, 0);
}
else
{
bfd_reloc_code_real_type reloc = operand->default_reloc;
expressionS subexp;
int die = 0, use_subexp = 0, require_symbol = 0;
fixS *fixP;
/* Take an expression like hw0(x) and turn it into x with
a different reloc type. */
switch (operand_exp->X_op)
{
#define HANDLE_OP16(suffix) \
switch (reloc) \
{ \
case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST: \
reloc = BFD_RELOC_TILEGX_IMM16_X0_##suffix; \
break; \
case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST: \
reloc = BFD_RELOC_TILEGX_IMM16_X1_##suffix; \
break; \
default: \
die = 1; \
break; \
} \
use_subexp = 1
case O_hw0:
HANDLE_OP16 (HW0);
break;
case O_hw1:
HANDLE_OP16 (HW1);
break;
case O_hw2:
HANDLE_OP16 (HW2);
break;
case O_hw3:
HANDLE_OP16 (HW3);
break;
case O_hw0_last:
HANDLE_OP16 (HW0_LAST);
break;
case O_hw1_last:
HANDLE_OP16 (HW1_LAST);
break;
case O_hw2_last:
HANDLE_OP16 (HW2_LAST);
break;
case O_hw0_got:
HANDLE_OP16 (HW0_GOT);
require_symbol = 1;
break;
case O_hw0_last_got:
HANDLE_OP16 (HW0_LAST_GOT);
require_symbol = 1;
break;
case O_hw1_last_got:
HANDLE_OP16 (HW1_LAST_GOT);
require_symbol = 1;
break;
case O_hw0_tls_gd:
HANDLE_OP16 (HW0_TLS_GD);
require_symbol = 1;
break;
case O_hw0_last_tls_gd:
HANDLE_OP16 (HW0_LAST_TLS_GD);
require_symbol = 1;
break;
case O_hw1_last_tls_gd:
HANDLE_OP16 (HW1_LAST_TLS_GD);
require_symbol = 1;
break;
case O_hw0_tls_ie:
HANDLE_OP16 (HW0_TLS_IE);
require_symbol = 1;
break;
case O_hw0_last_tls_ie:
HANDLE_OP16 (HW0_LAST_TLS_IE);
require_symbol = 1;
break;
case O_hw1_last_tls_ie:
HANDLE_OP16 (HW1_LAST_TLS_IE);
require_symbol = 1;
break;
case O_hw0_tls_le:
HANDLE_OP16 (HW0_TLS_LE);
require_symbol = 1;
break;
case O_hw0_last_tls_le:
HANDLE_OP16 (HW0_LAST_TLS_LE);
require_symbol = 1;
break;
case O_hw1_last_tls_le:
HANDLE_OP16 (HW1_LAST_TLS_LE);
require_symbol = 1;
break;
case O_hw0_plt:
HANDLE_OP16 (HW0_PLT_PCREL);
break;
case O_hw1_plt:
HANDLE_OP16 (HW1_PLT_PCREL);
break;
case O_hw1_last_plt:
HANDLE_OP16 (HW1_LAST_PLT_PCREL);
break;
case O_hw2_last_plt:
HANDLE_OP16 (HW2_LAST_PLT_PCREL);
break;
#undef HANDLE_OP16
case O_plt:
switch (reloc)
{
case BFD_RELOC_TILEGX_JUMPOFF_X1:
reloc = BFD_RELOC_TILEGX_JUMPOFF_X1_PLT;
break;
default:
die = 1;
break;
}
use_subexp = 1;
require_symbol = 1;
break;
case O_tls_gd_call:
switch (reloc)
{
case BFD_RELOC_TILEGX_JUMPOFF_X1:
reloc = BFD_RELOC_TILEGX_TLS_GD_CALL;
break;
default:
die = 1;
break;
}
use_subexp = 1;
require_symbol = 1;
break;
case O_tls_gd_add:
switch (reloc)
{
case BFD_RELOC_TILEGX_IMM8_X0:
reloc = BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD;
break;
case BFD_RELOC_TILEGX_IMM8_X1:
reloc = BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD;
break;
case BFD_RELOC_TILEGX_IMM8_Y0:
reloc = BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD;
break;
case BFD_RELOC_TILEGX_IMM8_Y1:
reloc = BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD;
break;
default:
die = 1;
break;
}
use_subexp = 1;
require_symbol = 1;
break;
case O_tls_ie_load:
switch (reloc)
{
case BFD_RELOC_TILEGX_IMM8_X1:
reloc = BFD_RELOC_TILEGX_TLS_IE_LOAD;
break;
default:
die = 1;
break;
}
use_subexp = 1;
require_symbol = 1;
break;
case O_tls_add:
switch (reloc)
{
case BFD_RELOC_TILEGX_IMM8_X0:
reloc = BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD;
break;
case BFD_RELOC_TILEGX_IMM8_X1:
reloc = BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD;
break;
case BFD_RELOC_TILEGX_IMM8_Y0:
reloc = BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD;
break;
case BFD_RELOC_TILEGX_IMM8_Y1:
reloc = BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD;
break;
default:
die = 1;
break;
}
use_subexp = 1;
require_symbol = 1;
break;
default:
/* Do nothing. */
break;
}
if (die)
{
as_bad (_("Invalid operator for operand."));
}
else if (use_subexp)
{
expressionS *sval = NULL;
/* Now that we've changed the reloc, change ha16(x) into x,
etc. */
if (symbol_symbolS (operand_exp->X_add_symbol))
sval = symbol_get_value_expression (operand_exp->X_add_symbol);
if (sval && sval->X_md)
{
/* HACK: We used X_md to mark this symbol as a fake wrapper
around a real expression. To unwrap it, we just grab its
value here. */
operand_exp = sval;
if (require_symbol)
{
/* Look at the expression, and reject it if it's not a
plain symbol. */
if (operand_exp->X_op != O_symbol
|| operand_exp->X_add_number != 0)
as_bad (_("Operator may only be applied to symbols."));
}
}
else
{
/* The value of this expression is an actual symbol, so
turn that into an expression. */
memset (&subexp, 0, sizeof subexp);
subexp.X_op = O_symbol;
subexp.X_add_symbol = operand_exp->X_add_symbol;
operand_exp = &subexp;
}
}
/* Create a fixup to handle this later. */
fixP = fix_new_exp (frag_now,
bundle_start - frag_now->fr_literal,
(operand->num_bits + 7) >> 3,
operand_exp,
is_pc_relative,
reloc);
fixP->tc_fix_data = operand;
/* Don't do overflow checking if we are applying a function like
ha16. */
fixP->fx_no_overflow |= use_subexp;
}
}
return bits;
}
/* Detects and complains if two instructions in current_bundle write
to the same register, either implicitly or explicitly, or if a
read-only register is written. */
static void
check_illegal_reg_writes (void)
{
BFD_HOST_U_64_BIT all_regs_written = 0;
int j;
for (j = 0; j < current_bundle_index; j++)
{
const struct tilegx_instruction *instr = ¤t_bundle[j];
int k;
BFD_HOST_U_64_BIT regs =
((BFD_HOST_U_64_BIT)1) << instr->opcode->implicitly_written_register;
BFD_HOST_U_64_BIT conflict;
for (k = 0; k < instr->opcode->num_operands; k++)
{
const struct tilegx_operand *operand =
&tilegx_operands[instr->opcode->operands[instr->pipe][k]];
if (operand->is_dest_reg)
{
int regno = instr->operand_values[k].X_add_number;
BFD_HOST_U_64_BIT mask = ((BFD_HOST_U_64_BIT)1) << regno;
if ((mask & ( (((BFD_HOST_U_64_BIT)1) << TREG_IDN1)
| (((BFD_HOST_U_64_BIT)1) << TREG_UDN1)
| (((BFD_HOST_U_64_BIT)1) << TREG_UDN2)
| (((BFD_HOST_U_64_BIT)1) << TREG_UDN3))) != 0
&& !allow_suspicious_bundles)
{
as_bad (_("Writes to register '%s' are not allowed."),
tilegx_register_names[regno]);
}
regs |= mask;
}
}
/* Writing to the zero register doesn't count. */
regs &= ~(((BFD_HOST_U_64_BIT)1) << TREG_ZERO);
conflict = all_regs_written & regs;
if (conflict != 0 && !allow_suspicious_bundles)
{
/* Find which register caused the conflict. */
const char *conflicting_reg_name = "???";
int i;
for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
{
if (((conflict >> i) & 1) != 0)
{
conflicting_reg_name = tilegx_register_names[i];
break;
}
}
as_bad (_("Two instructions in the same bundle both write "
"to register %s, which is not allowed."),
conflicting_reg_name);
}
all_regs_written |= regs;
}
}
static void
tilegx_flush_bundle (void)
{
unsigned i;
int j;
addressT addr_mod;
unsigned compatible_pipes;
const struct bundle_template *match;
char *f;
inside_bundle = 0;
switch (current_bundle_index)
{
case 0:
/* No instructions. */
return;
case 1:
if (current_bundle[0].opcode->can_bundle)
{
/* Simplify later logic by adding an explicit fnop. */
prepend_nop_to_bundle (TILEGX_OPC_FNOP);
}
else
{
/* This instruction cannot be bundled with anything else.
Prepend an explicit 'nop', rather than an 'fnop', because
fnops can be replaced by later binary-processing tools while
nops cannot. */
prepend_nop_to_bundle (TILEGX_OPC_NOP);
}
break;
default:
if (!allow_suspicious_bundles)
{
/* Make sure all instructions can be bundled with other
instructions. */
const struct tilegx_opcode *cannot_bundle = NULL;
bfd_boolean seen_non_nop = FALSE;
for (j = 0; j < current_bundle_index; j++)
{
const struct tilegx_opcode *op = current_bundle[j].opcode;
if (!op->can_bundle && cannot_bundle == NULL)
cannot_bundle = op;
else if (op->mnemonic != TILEGX_OPC_NOP
&& op->mnemonic != TILEGX_OPC_INFO
&& op->mnemonic != TILEGX_OPC_INFOL)
seen_non_nop = TRUE;
}
if (cannot_bundle != NULL && seen_non_nop)
{
current_bundle_index = 0;
as_bad (_("'%s' may not be bundled with other instructions."),
cannot_bundle->name);
return;
}
}
break;
}
compatible_pipes =
BUNDLE_TEMPLATE_MASK(current_bundle[0].opcode->pipes,
current_bundle[1].opcode->pipes,
(current_bundle_index == 3
? current_bundle[2].opcode->pipes
: (1 << NO_PIPELINE)));
/* Find a template that works, if any. */
match = NULL;
for (i = 0; i < sizeof bundle_templates / sizeof bundle_templates[0]; i++)
{
const struct bundle_template *b = &bundle_templates[i];
if ((b->pipe_mask & compatible_pipes) == b->pipe_mask)
{
match = b;
break;
}
}
if (match == NULL)
{
current_bundle_index = 0;
as_bad (_("Invalid combination of instructions for bundle."));
return;
}
/* If the section seems to have no alignment set yet, go ahead and
make it large enough to hold code. */
if (bfd_section_alignment (now_seg) == 0)
bfd_set_section_alignment (now_seg,
TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
for (j = 0; j < current_bundle_index; j++)
current_bundle[j].pipe = match->pipe[j];
if (current_bundle_index == 2 && !tilegx_is_x_pipeline (match->pipe[0]))
{
/* We are in Y mode with only two instructions, so add an FNOP. */
prepend_nop_to_bundle (TILEGX_OPC_FNOP);
/* Figure out what pipe the fnop must be in via arithmetic.
* p0 + p1 + p2 must sum to the sum of TILEGX_PIPELINE_Y[012]. */
current_bundle[0].pipe =
(tilegx_pipeline)((TILEGX_PIPELINE_Y0
+ TILEGX_PIPELINE_Y1
+ TILEGX_PIPELINE_Y2) -
(current_bundle[1].pipe + current_bundle[2].pipe));
}
check_illegal_reg_writes ();
f = frag_more (TILEGX_BUNDLE_SIZE_IN_BYTES);
/* Check to see if this bundle is at an offset that is a multiple of 8-bytes
from the start of the frag. */
addr_mod = frag_now_fix () & (TILEGX_BUNDLE_ALIGNMENT_IN_BYTES - 1);
if (frag_now->has_code && frag_now->insn_addr != addr_mod)
as_bad (_("instruction address is not a multiple of 8"));
frag_now->insn_addr = addr_mod;
frag_now->has_code = 1;
tilegx_bundle_bits bits = 0;
for (j = 0; j < current_bundle_index; j++)
{
struct tilegx_instruction *instr = ¤t_bundle[j];
tilegx_pipeline pipeline = instr->pipe;
const struct tilegx_opcode *opcode = instr->opcode;
bits |= emit_tilegx_instruction (opcode->fixed_bit_values[pipeline],
opcode->num_operands,
&opcode->operands[pipeline][0],
instr->operand_values,
f);
}
number_to_chars_littleendian (f, bits, 8);
current_bundle_index = 0;
/* Emit DWARF2 debugging information. */
dwarf2_emit_insn (TILEGX_BUNDLE_SIZE_IN_BYTES);
}
/* Extend the expression parser to handle hw0(label), etc.
as well as SPR names when in the context of parsing an SPR. */
int
tilegx_parse_name (char *name, expressionS *e, char *nextcharP)
{
operatorT op = O_illegal;
if (parsing_spr)
{
void* val = hash_find (spr_hash, name);
if (val == NULL)
return 0;
memset (e, 0, sizeof *e);
e->X_op = O_constant;
e->X_add_number = ((const struct tilegx_spr *)val)->number;
return 1;
}
if (*nextcharP != '(')
{
/* hw0, etc. not followed by a paren is just a label with that name. */
return 0;
}
else
{
/* Look up the operator in our table. */
void* val = hash_find (special_operator_hash, name);
if (val == 0)
return 0;
op = (operatorT)(long)val;
}
/* Restore old '(' and skip it. */
*input_line_pointer = '(';
++input_line_pointer;
expression (e);
if (*input_line_pointer != ')')
{
as_bad (_("Missing ')'"));
*nextcharP = *input_line_pointer;
return 0;
}
/* Skip ')'. */
++input_line_pointer;
if (e->X_op == O_register || e->X_op == O_absent)
{
as_bad (_("Invalid expression."));
e->X_op = O_constant;
e->X_add_number = 0;
}
else
{
/* Wrap subexpression with a unary operator. */
symbolS *sym = make_expr_symbol (e);
if (sym != e->X_add_symbol)
{
/* HACK: mark this symbol as a temporary wrapper around a proper
expression, so we can unwrap it later once we have communicated
the relocation type. */
symbol_get_value_expression (sym)->X_md = 1;
}
memset (e, 0, sizeof *e);
e->X_op = op;
e->X_add_symbol = sym;
e->X_add_number = 0;
}
*nextcharP = *input_line_pointer;
return 1;
}
/* Parses an expression which must be a register name. */
static void
parse_reg_expression (expressionS* expression)
{
char *regname;
char terminating_char;
void *pval;
int regno_and_flags;
int regno;
/* Zero everything to make sure we don't miss any flags. */
memset (expression, 0, sizeof *expression);
terminating_char = get_symbol_name (®name);
pval = hash_find (main_reg_hash, regname);
if (pval == NULL)
as_bad (_("Expected register, got '%s'."), regname);
regno_and_flags = (int)(size_t)pval;
regno = EXTRACT_REGNO(regno_and_flags);
if ((regno_and_flags & NONCANONICAL_REG_NAME_FLAG)
&& require_canonical_reg_names)
as_warn (_("Found use of non-canonical register name %s; "
"use %s instead."),
regname, tilegx_register_names[regno]);
/* Restore the old character following the register name. */
(void) restore_line_pointer (terminating_char);
/* Fill in the expression fields to indicate it's a register. */
expression->X_op = O_register;
expression->X_add_number = regno;
}
/* Parses and type-checks comma-separated operands in input_line_pointer. */
static void
parse_operands (const char *opcode_name,
const unsigned char *operands,
int num_operands,
expressionS *operand_values)
{
int i;
memset (operand_values, 0, num_operands * sizeof operand_values[0]);
SKIP_WHITESPACE ();
for (i = 0; i < num_operands; i++)
{
tilegx_operand_type type = tilegx_operands[operands[i]].type;
SKIP_WHITESPACE ();
if (type == TILEGX_OP_TYPE_REGISTER)
{
parse_reg_expression (&operand_values[i]);
}
else if (*input_line_pointer == '}')
{
operand_values[i].X_op = O_absent;
}
else if (type == TILEGX_OP_TYPE_SPR)
{
/* Modify the expression parser to add SPRs to the namespace. */
parsing_spr = 1;
expression (&operand_values[i]);
parsing_spr = 0;
}
else
{
expression (&operand_values[i]);
}
SKIP_WHITESPACE ();
if (i + 1 < num_operands)
{
int separator = (unsigned char)*input_line_pointer++;
if (is_end_of_line[separator] || (separator == '}'))
{
as_bad (_("Too few operands to '%s'."), opcode_name);
return;
}
else if (separator != ',')
{
as_bad (_("Unexpected character '%c' after operand %d to %s."),
(char)separator, i + 1, opcode_name);
return;
}
}
/* Arbitrarily use the first valid pipe to get the operand type,
since they are all the same. */
switch (tilegx_operands[operands[i]].type)
{
case TILEGX_OP_TYPE_REGISTER:
/* Handled in parse_reg_expression already. */
break;
case TILEGX_OP_TYPE_SPR:
/* Fall through */
case TILEGX_OP_TYPE_IMMEDIATE:
/* Fall through */
case TILEGX_OP_TYPE_ADDRESS:
if ( operand_values[i].X_op == O_register
|| operand_values[i].X_op == O_illegal
|| operand_values[i].X_op == O_absent)
as_bad (_("Expected immediate expression"));
break;
default:
abort();
}
}
if (!is_end_of_line[(unsigned char)*input_line_pointer])
{
switch (*input_line_pointer)
{
case '}':
if (!inside_bundle)
as_bad (_("Found '}' when not bundling."));
++input_line_pointer;
inside_bundle = 0;
demand_empty_rest_of_line ();
break;
case ',':
as_bad (_("Too many operands"));
break;
default:
/* Use default error for unrecognized garbage. */
demand_empty_rest_of_line ();
break;
}
}
}
/* This is the guts of the machine-dependent assembler. STR points to a
machine dependent instruction. This function is supposed to emit the
frags/bytes it assembles to. */
void
md_assemble (char *str)
{
char old_char;
size_t opname_len;
char *old_input_line_pointer;
const struct tilegx_opcode *op;
int first_pipe;
/* Split off the opcode and look it up. */
opname_len = strcspn (str, " {}");
old_char = str[opname_len];
str[opname_len] = '\0';
op = hash_find(op_hash, str);
str[opname_len] = old_char;
if (op == NULL)
{
as_bad (_("Unknown opcode `%.*s'."), (int)opname_len, str);
return;
}
/* Prepare to parse the operands. */
old_input_line_pointer = input_line_pointer;
input_line_pointer = str + opname_len;
SKIP_WHITESPACE ();
if (current_bundle_index == TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE)
{
as_bad (_("Too many instructions for bundle."));
tilegx_flush_bundle ();
}
/* Make sure we have room for the upcoming bundle before we
create any fixups. Otherwise if we have to switch to a new
frag the fixup dot_value fields will be wrong. */
frag_grow (TILEGX_BUNDLE_SIZE_IN_BYTES);
/* Find a valid pipe for this opcode. */
for (first_pipe = 0; (op->pipes & (1 << first_pipe)) == 0; first_pipe++)
;
/* Call the function that assembles this instruction. */
current_bundle[current_bundle_index].opcode = op;
parse_operands (op->name,
&op->operands[first_pipe][0],
op->num_operands,
current_bundle[current_bundle_index].operand_values);
++current_bundle_index;
/* Restore the saved value of input_line_pointer. */
input_line_pointer = old_input_line_pointer;
/* If we weren't inside curly braces, go ahead and emit
this lone instruction as a bundle right now. */
if (!inside_bundle)
tilegx_flush_bundle ();
}
static void
s_require_canonical_reg_names (int require)
{
demand_empty_rest_of_line ();
require_canonical_reg_names = require;
}
static void
s_allow_suspicious_bundles (int allow)
{
demand_empty_rest_of_line ();
allow_suspicious_bundles = allow;
}
const pseudo_typeS md_pseudo_table[] =
{
{"align", s_align_bytes, 0}, /* Defaulting is invalid (0). */
{"word", cons, 4},
{"require_canonical_reg_names", s_require_canonical_reg_names, 1 },
{"no_require_canonical_reg_names", s_require_canonical_reg_names, 0 },
{"allow_suspicious_bundles", s_allow_suspicious_bundles, 1 },
{"no_allow_suspicious_bundles", s_allow_suspicious_bundles, 0 },
{ NULL, 0, 0 }
};
void
md_number_to_chars (char * buf, valueT val, int n)
{
if (target_big_endian)
number_to_chars_bigendian (buf, val, n);
else
number_to_chars_littleendian (buf, val, n);
}
/* Turn the string pointed to by litP into a floating point constant
of type TYPE, and emit the appropriate bytes. The number of
LITTLENUMS emitted is stored in *SIZEP. An error message is
returned, or NULL on OK. */
const char *
md_atof (int type, char *litP, int *sizeP)
{
int prec;
LITTLENUM_TYPE words[MAX_LITTLENUMS];
LITTLENUM_TYPE *wordP;
char *t;
switch (type)
{
case 'f':
case 'F':
prec = 2;
break;
case 'd':
case 'D':
prec = 4;
break;
default:
*sizeP = 0;
return _("Bad call to md_atof ()");
}
t = atof_ieee (input_line_pointer, type, words);
if (t)
input_line_pointer = t;
*sizeP = prec * sizeof (LITTLENUM_TYPE);
/* This loops outputs the LITTLENUMs in REVERSE order; in accord with
the bigendian 386. */
for (wordP = words + prec - 1; prec--;)
{
md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
litP += sizeof (LITTLENUM_TYPE);
}
return 0;
}
/* We have no need to default values of symbols. */
symbolS *
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
{
return NULL;
}
void
tilegx_cons_fix_new (fragS *frag,
int where,
int nbytes,
expressionS *exp)
{
expressionS subexp;
bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
int no_overflow = 0;
fixS *fixP;
/* See if it's one of our special functions. */
switch (exp->X_op)
{
case O_hw0:
reloc = BFD_RELOC_TILEGX_HW0;
no_overflow = 1;
break;
case O_hw1:
reloc = BFD_RELOC_TILEGX_HW1;
no_overflow = 1;
break;
case O_hw2:
reloc = BFD_RELOC_TILEGX_HW2;
no_overflow = 1;
break;
case O_hw3:
reloc = BFD_RELOC_TILEGX_HW3;
no_overflow = 1;
break;
case O_hw0_last:
reloc = BFD_RELOC_TILEGX_HW0_LAST;
break;
case O_hw1_last:
reloc = BFD_RELOC_TILEGX_HW1_LAST;
break;
case O_hw2_last:
reloc = BFD_RELOC_TILEGX_HW2_LAST;
break;
default:
/* Do nothing. */
break;
}
if (reloc != BFD_RELOC_NONE)
{
if (nbytes != 2)
{
as_bad (_("This operator only produces two byte values."));
nbytes = 2;
}
memset (&subexp, 0, sizeof subexp);
subexp.X_op = O_symbol;
subexp.X_add_symbol = exp->X_add_symbol;
exp = &subexp;
}
else
{
switch (nbytes)
{
case 1:
reloc = BFD_RELOC_8;
break;
case 2:
reloc = BFD_RELOC_16;
break;
case 4:
reloc = BFD_RELOC_32;
break;
case 8:
reloc = BFD_RELOC_64;
break;
default:
as_bad (_("unsupported BFD relocation size %d"), nbytes);
reloc = BFD_RELOC_64;
break;
}
}
fixP = fix_new_exp (frag, where, nbytes, exp, 0, reloc);
fixP->tc_fix_data = NULL;
fixP->fx_no_overflow |= no_overflow;
}
void
md_apply_fix (fixS *fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
{
const struct tilegx_operand *operand;
valueT value = *valP;
operatorT special;
char *p;
/* Leave these for the linker. */
if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
return;
if (fixP->fx_subsy != (symbolS *) NULL)
{
/* We can't actually support subtracting a symbol. */
as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
}
/* Correct relocation types for pc-relativeness. */
switch (fixP->fx_r_type)
{
#define FIX_PCREL(rtype) \
case rtype: \
if (fixP->fx_pcrel) \
fixP->fx_r_type = rtype##_PCREL; \
break; \
\
case rtype##_PCREL: \
if (!fixP->fx_pcrel) \
fixP->fx_r_type = rtype; \
break
#define FIX_PLT_PCREL(rtype) \
case rtype##_PLT_PCREL: \
if (!fixP->fx_pcrel) \
fixP->fx_r_type = rtype; \
\
break;
FIX_PCREL (BFD_RELOC_8);
FIX_PCREL (BFD_RELOC_16);
FIX_PCREL (BFD_RELOC_32);
FIX_PCREL (BFD_RELOC_64);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW3);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW3);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST);
FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST);
FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0);
FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0);
FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1);
FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1);
FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST);
FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST);
FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST);
FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST);
#undef FIX_PCREL
default:
/* Do nothing */
break;
}
if (fixP->fx_addsy != NULL)
{
#ifdef OBJ_ELF
switch (fixP->fx_r_type)
{
case BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD:
case BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD:
case BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD:
case BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD:
case BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD:
case BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD:
case BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD:
case BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD:
case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD:
case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD:
case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD:
case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD:
case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD:
case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD:
case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE:
case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE:
case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE:
case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE:
case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE:
case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE:
case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE:
case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE:
case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE:
case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE:
case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE:
case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE:
case BFD_RELOC_TILEGX_TLS_GD_CALL:
case BFD_RELOC_TILEGX_TLS_IE_LOAD:
case BFD_RELOC_TILEGX_TLS_DTPMOD64:
case BFD_RELOC_TILEGX_TLS_DTPOFF64:
case BFD_RELOC_TILEGX_TLS_TPOFF64:
case BFD_RELOC_TILEGX_TLS_DTPMOD32:
case BFD_RELOC_TILEGX_TLS_DTPOFF32:
case BFD_RELOC_TILEGX_TLS_TPOFF32:
S_SET_THREAD_LOCAL (fixP->fx_addsy);
break;
default:
/* Do nothing */
break;
}
#endif
return;
}
/* Apply hw0, etc. */
special = O_illegal;
switch (fixP->fx_r_type)
{
case BFD_RELOC_TILEGX_HW0:
case BFD_RELOC_TILEGX_IMM16_X0_HW0:
case BFD_RELOC_TILEGX_IMM16_X1_HW0:
case BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL:
case BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL:
special = O_hw0;
break;
case BFD_RELOC_TILEGX_HW0_LAST:
case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST:
case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST:
case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL:
case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL:
special = O_hw0_last;
break;
case BFD_RELOC_TILEGX_HW1:
case BFD_RELOC_TILEGX_IMM16_X0_HW1:
case BFD_RELOC_TILEGX_IMM16_X1_HW1:
case BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL:
case BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL:
special = O_hw1;
break;
case BFD_RELOC_TILEGX_HW1_LAST:
case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST:
case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST:
case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL:
case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL:
special = O_hw1_last;
break;
case BFD_RELOC_TILEGX_HW2:
case BFD_RELOC_TILEGX_IMM16_X0_HW2:
case BFD_RELOC_TILEGX_IMM16_X1_HW2:
case BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL:
case BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL:
special = O_hw2;
break;
case BFD_RELOC_TILEGX_HW2_LAST:
case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST:
case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST:
case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL:
case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL:
special = O_hw2_last;
break;
case BFD_RELOC_TILEGX_HW3:
case BFD_RELOC_TILEGX_IMM16_X0_HW3:
case BFD_RELOC_TILEGX_IMM16_X1_HW3:
case BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL:
case BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL:
case BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL:
special = O_hw3;
break;
default:
/* Do nothing */
break;
}
if (special != O_illegal)
{
*valP = value = apply_special_operator (special, value,
fixP->fx_file, fixP->fx_line);
}
p = fixP->fx_frag->fr_literal + fixP->fx_where;
operand = fixP->tc_fix_data;
if (operand != NULL)
{
/* It's an instruction operand. */
tilegx_bundle_bits bits =
insert_operand (0, operand, value, fixP->fx_file, fixP->fx_line);
/* Note that we might either be writing out bits for a bundle
or a static network instruction, which are different sizes, so it's
important to stop touching memory once we run out of bits.
ORing in values is OK since we know the existing bits for
this operand are zero. */
for (; bits != 0; bits >>= 8)
*p++ |= (char)bits;
}
else
{
/* Some other kind of relocation. */
switch (fixP->fx_r_type)
{
case BFD_RELOC_8:
case BFD_RELOC_8_PCREL:
md_number_to_chars (p, value, 1);
break;
case BFD_RELOC_16:
case BFD_RELOC_16_PCREL:
md_number_to_chars (p, value, 2);
break;
case BFD_RELOC_32:
case BFD_RELOC_32_PCREL:
md_number_to_chars (p, value, 4);
break;
case BFD_RELOC_64:
case BFD_RELOC_64_PCREL:
md_number_to_chars (p, value, 8);
break;
default:
/* Leave it for the linker. */
return;
}
}
fixP->fx_done = 1;
}
/* Generate the BFD reloc to be stuck in the object file from the
fixup used internally in the assembler. */
arelent *
tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, fixS *fixp)
{
arelent *reloc;
reloc = XNEW (arelent);
reloc->sym_ptr_ptr = XNEW (asymbol *);
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
/* Make sure none of our internal relocations make it this far.
They'd better have been fully resolved by this point. */
gas_assert ((int) fixp->fx_r_type > 0);
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
if (reloc->howto == NULL)
{
as_bad_where (fixp->fx_file, fixp->fx_line,
_("cannot represent `%s' relocation in object file"),
bfd_get_reloc_code_name (fixp->fx_r_type));
return NULL;
}
if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
{
as_fatal (_("internal error? cannot generate `%s' relocation (%d, %d)"),
bfd_get_reloc_code_name (fixp->fx_r_type),
fixp->fx_pcrel, reloc->howto->pc_relative);
}
gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
reloc->addend = fixp->fx_offset;
return reloc;
}
/* The location from which a PC relative jump should be calculated,
given a PC relative reloc. */
long
md_pcrel_from (fixS *fixP)
{
return fixP->fx_frag->fr_address + fixP->fx_where;
}
/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
a section symbol plus some offset. */
int
tilegx_fix_adjustable (fixS *fix)
{
/* Prevent all adjustments to global symbols */
if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
return 0;
return 1;
}
int
tilegx_unrecognized_line (int ch)
{
switch (ch)
{
case '{':
if (inside_bundle)
{
as_bad (_("Found '{' when already bundling."));
}
else
{
inside_bundle = 1;
current_bundle_index = 0;
}
return 1;
case '}':
if (!inside_bundle)
{
as_bad (_("Found '}' when not bundling."));
}
else
{
tilegx_flush_bundle ();
}
/* Allow '{' to follow on the same line. We also allow ";;", but that
happens automatically because ';' is an end of line marker. */
SKIP_WHITESPACE ();
if (input_line_pointer[0] == '{')
{
input_line_pointer++;
return tilegx_unrecognized_line ('{');
}
demand_empty_rest_of_line ();
return 1;
default:
break;
}
/* Not a valid line. */
return 0;
}
/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
of an rs_align_code fragment. */
void
tilegx_handle_align (fragS *fragp)
{
addressT bytes, fix;
char *p;
if (fragp->fr_type != rs_align_code)
return;
bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
p = fragp->fr_literal + fragp->fr_fix;
fix = 0;
/* Determine the bits for NOP. */
const struct tilegx_opcode *nop_opcode =
&tilegx_opcodes[TILEGX_OPC_NOP];
tilegx_bundle_bits nop =
( nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X0]
| nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X1]);
if ((bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1)) != 0)
{
fix = bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1);
memset (p, 0, fix);
p += fix;
bytes -= fix;
}
number_to_chars_littleendian (p, nop, 8);
fragp->fr_fix += fix;
fragp->fr_var = TILEGX_BUNDLE_SIZE_IN_BYTES;
}
/* Standard calling conventions leave the CFA at SP on entry. */
void
tilegx_cfi_frame_initial_instructions (void)
{
cfi_add_CFA_def_cfa_register (54);
}
int
tc_tilegx_regname_to_dw2regnum (char *regname)
{
int i;
for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
{
if (!strcmp (regname, tilegx_register_names[i]))
return i;
}
return -1;
}
|