File: mipsr6%40pref.d

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binutils-m68hc1x 1%3A2.35.1-3
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#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS PREF instruction
#as: -32 --defsym tpref=1
#source: cache.s

# Check MIPS PREF instruction assembly.

.*: +file format .*mips.*

Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 7c457fb5 	pref	0x5,255\(v0\)
[0-9a-f]+ <[^>]*> 7c658035 	pref	0x5,-256\(v1\)
	\.\.\.