File: avx512ifma_vl.s

package info (click to toggle)
binutils-riscv64-unknown-elf 2.32.2019.08+dfsg-1
  • links: PTS, VCS
  • area: main
  • in suites: bullseye, sid
  • size: 413,812 kB
  • sloc: ansic: 2,327,452; asm: 982,944; exp: 218,246; cpp: 147,855; makefile: 63,075; sh: 33,816; yacc: 27,082; lisp: 15,389; perl: 6,480; xml: 5,239; ada: 5,117; python: 4,996; pascal: 3,266; lex: 2,272; cs: 879; f90: 535; sed: 334; awk: 165; objc: 134; fortran: 43
file content (111 lines) | stat: -rw-r--r-- 7,066 bytes parent folder | download | duplicates (23)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
# Check 32bit AVX512{IFMA,VL} instructions

	.allow_index_reg
	.text
_start:
	vpmadd52luq	%xmm4, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	%xmm4, %xmm5, %xmm6{%k7}{z}	 # AVX512{IFMA,VL}
	vpmadd52luq	(%ecx), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	-123456(%esp,%esi,8), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	(%eax){1to2}, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	2032(%edx), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	2048(%edx), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	-2048(%edx), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	-2064(%edx), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	1016(%edx){1to2}, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	1024(%edx){1to2}, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	-1024(%edx){1to2}, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	-1032(%edx){1to2}, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	%ymm4, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	%ymm4, %ymm5, %ymm6{%k7}{z}	 # AVX512{IFMA,VL}
	vpmadd52luq	(%ecx), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	-123456(%esp,%esi,8), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	(%eax){1to4}, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	4064(%edx), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	4096(%edx), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	-4096(%edx), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	-4128(%edx), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	1016(%edx){1to4}, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	1024(%edx){1to4}, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52luq	-1024(%edx){1to4}, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	-1032(%edx){1to4}, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	%xmm4, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	%xmm4, %xmm5, %xmm6{%k7}{z}	 # AVX512{IFMA,VL}
	vpmadd52huq	(%ecx), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	-123456(%esp,%esi,8), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	(%eax){1to2}, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	2032(%edx), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	2048(%edx), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	-2048(%edx), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	-2064(%edx), %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	1016(%edx){1to2}, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	1024(%edx){1to2}, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	-1024(%edx){1to2}, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	-1032(%edx){1to2}, %xmm5, %xmm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	%ymm4, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	%ymm4, %ymm5, %ymm6{%k7}{z}	 # AVX512{IFMA,VL}
	vpmadd52huq	(%ecx), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	-123456(%esp,%esi,8), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	(%eax){1to4}, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	4064(%edx), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	4096(%edx), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	-4096(%edx), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	-4128(%edx), %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	1016(%edx){1to4}, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	1024(%edx){1to4}, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}
	vpmadd52huq	-1024(%edx){1to4}, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	-1032(%edx){1to4}, %ymm5, %ymm6{%k7}	 # AVX512{IFMA,VL}

	.intel_syntax noprefix
	vpmadd52luq	xmm6{k7}, xmm5, xmm4	 # AVX512{IFMA,VL}
	vpmadd52luq	xmm6{k7}{z}, xmm5, xmm4	 # AVX512{IFMA,VL}
	vpmadd52luq	xmm6{k7}, xmm5, XMMWORD PTR [ecx]	 # AVX512{IFMA,VL}
	vpmadd52luq	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512{IFMA,VL}
	vpmadd52luq	xmm6{k7}, xmm5, [eax]{1to2}	 # AVX512{IFMA,VL}
	vpmadd52luq	xmm6{k7}, xmm5, XMMWORD PTR [edx+2032]	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	xmm6{k7}, xmm5, XMMWORD PTR [edx+2048]	 # AVX512{IFMA,VL}
	vpmadd52luq	xmm6{k7}, xmm5, XMMWORD PTR [edx-2048]	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	xmm6{k7}, xmm5, XMMWORD PTR [edx-2064]	 # AVX512{IFMA,VL}
	vpmadd52luq	xmm6{k7}, xmm5, [edx+1016]{1to2}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	xmm6{k7}, xmm5, [edx+1024]{1to2}	 # AVX512{IFMA,VL}
	vpmadd52luq	xmm6{k7}, xmm5, [edx-1024]{1to2}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	xmm6{k7}, xmm5, [edx-1032]{1to2}	 # AVX512{IFMA,VL}
	vpmadd52luq	ymm6{k7}, ymm5, ymm4	 # AVX512{IFMA,VL}
	vpmadd52luq	ymm6{k7}{z}, ymm5, ymm4	 # AVX512{IFMA,VL}
	vpmadd52luq	ymm6{k7}, ymm5, YMMWORD PTR [ecx]	 # AVX512{IFMA,VL}
	vpmadd52luq	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512{IFMA,VL}
	vpmadd52luq	ymm6{k7}, ymm5, [eax]{1to4}	 # AVX512{IFMA,VL}
	vpmadd52luq	ymm6{k7}, ymm5, YMMWORD PTR [edx+4064]	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	ymm6{k7}, ymm5, YMMWORD PTR [edx+4096]	 # AVX512{IFMA,VL}
	vpmadd52luq	ymm6{k7}, ymm5, YMMWORD PTR [edx-4096]	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	ymm6{k7}, ymm5, YMMWORD PTR [edx-4128]	 # AVX512{IFMA,VL}
	vpmadd52luq	ymm6{k7}, ymm5, [edx+1016]{1to4}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	ymm6{k7}, ymm5, [edx+1024]{1to4}	 # AVX512{IFMA,VL}
	vpmadd52luq	ymm6{k7}, ymm5, [edx-1024]{1to4}	 # AVX512{IFMA,VL} Disp8
	vpmadd52luq	ymm6{k7}, ymm5, [edx-1032]{1to4}	 # AVX512{IFMA,VL}
	vpmadd52huq	xmm6{k7}, xmm5, xmm4	 # AVX512{IFMA,VL}
	vpmadd52huq	xmm6{k7}{z}, xmm5, xmm4	 # AVX512{IFMA,VL}
	vpmadd52huq	xmm6{k7}, xmm5, XMMWORD PTR [ecx]	 # AVX512{IFMA,VL}
	vpmadd52huq	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512{IFMA,VL}
	vpmadd52huq	xmm6{k7}, xmm5, [eax]{1to2}	 # AVX512{IFMA,VL}
	vpmadd52huq	xmm6{k7}, xmm5, XMMWORD PTR [edx+2032]	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	xmm6{k7}, xmm5, XMMWORD PTR [edx+2048]	 # AVX512{IFMA,VL}
	vpmadd52huq	xmm6{k7}, xmm5, XMMWORD PTR [edx-2048]	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	xmm6{k7}, xmm5, XMMWORD PTR [edx-2064]	 # AVX512{IFMA,VL}
	vpmadd52huq	xmm6{k7}, xmm5, [edx+1016]{1to2}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	xmm6{k7}, xmm5, [edx+1024]{1to2}	 # AVX512{IFMA,VL}
	vpmadd52huq	xmm6{k7}, xmm5, [edx-1024]{1to2}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	xmm6{k7}, xmm5, [edx-1032]{1to2}	 # AVX512{IFMA,VL}
	vpmadd52huq	ymm6{k7}, ymm5, ymm4	 # AVX512{IFMA,VL}
	vpmadd52huq	ymm6{k7}{z}, ymm5, ymm4	 # AVX512{IFMA,VL}
	vpmadd52huq	ymm6{k7}, ymm5, YMMWORD PTR [ecx]	 # AVX512{IFMA,VL}
	vpmadd52huq	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512{IFMA,VL}
	vpmadd52huq	ymm6{k7}, ymm5, [eax]{1to4}	 # AVX512{IFMA,VL}
	vpmadd52huq	ymm6{k7}, ymm5, YMMWORD PTR [edx+4064]	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	ymm6{k7}, ymm5, YMMWORD PTR [edx+4096]	 # AVX512{IFMA,VL}
	vpmadd52huq	ymm6{k7}, ymm5, YMMWORD PTR [edx-4096]	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	ymm6{k7}, ymm5, YMMWORD PTR [edx-4128]	 # AVX512{IFMA,VL}
	vpmadd52huq	ymm6{k7}, ymm5, [edx+1016]{1to4}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	ymm6{k7}, ymm5, [edx+1024]{1to4}	 # AVX512{IFMA,VL}
	vpmadd52huq	ymm6{k7}, ymm5, [edx-1024]{1to4}	 # AVX512{IFMA,VL} Disp8
	vpmadd52huq	ymm6{k7}, ymm5, [edx-1032]{1to4}	 # AVX512{IFMA,VL}