1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
|
/* bfin-aux.h ADI Blackfin Header file for gas
Copyright 2005
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
#include "bfin-defs.h"
#define REG_T Register *
INSTR_T
bfin_gen_dsp32mac (int op1, int mm, int mmod, int w1, int p,
int h01, int h11, int h00, int h10,
int op0, REG_T dst, REG_T src0, REG_T src1, int w0);
INSTR_T
bfin_gen_dsp32mult (int op1, int mm, int mmod, int w1, int p,
int h01, int h11, int h00, int h10,
int op0, REG_T dst, REG_T src0, REG_T src1, int w0);
INSTR_T
bfin_gen_dsp32alu (int HL, int aopcde, int aop, int s, int x,
REG_T dst0, REG_T dst1, REG_T src0, REG_T src1);
INSTR_T
bfin_gen_dsp32shift (int sopcde, REG_T dst0, REG_T src0, REG_T src1,
int sop, int hls);
INSTR_T
bfin_gen_dsp32shiftimm (int sopcde, REG_T dst0, int immag, REG_T src1,
int sop, int hls);
INSTR_T
bfin_gen_ldimmhalf (REG_T reg, int h, int s, int z, Expr_Node *hword,
int reloc);
INSTR_T
bfin_gen_ldstidxi (REG_T ptr, REG_T reg, int w, int sz, int z,
Expr_Node *offset);
INSTR_T
bfin_gen_ldst (REG_T ptr, REG_T reg, int aop, int sz, int z, int w);
INSTR_T
bfin_gen_ldstii (REG_T ptr, REG_T reg, Expr_Node *offset, int w, int op);
INSTR_T
bfin_gen_ldstiifp (REG_T reg, Expr_Node *offset, int w);
INSTR_T
bfin_gen_ldstpmod (REG_T ptr, REG_T reg, int aop, int w, REG_T idx);
INSTR_T
bfin_gen_dspldst (REG_T i, REG_T reg, int aop, int w, int m);
INSTR_T
bfin_gen_alu2op (REG_T dst, REG_T src, int opc);
INSTR_T
bfin_gen_compi2opd (REG_T dst, int src, int op);
INSTR_T
bfin_gen_compi2opp (REG_T dst, int src, int op);
INSTR_T
bfin_gen_dagmodik (REG_T i, int op);
INSTR_T
bfin_gen_dagmodim (REG_T i, REG_T m, int op, int br);
INSTR_T
bfin_gen_ptr2op (REG_T dst, REG_T src, int opc);
INSTR_T
bfin_gen_logi2op (int dst, int src, int opc);
INSTR_T
bfin_gen_comp3op (REG_T src0, REG_T src1, REG_T dst, int opc);
INSTR_T
bfin_gen_ccmv (REG_T src, REG_T dst, int t);
INSTR_T
bfin_gen_ccflag (REG_T x, int y, int opc, int i, int g);
INSTR_T
bfin_gen_cc2stat (int cbit, int op, int d);
INSTR_T
bfin_gen_regmv (REG_T src, REG_T dst);
INSTR_T
bfin_gen_cc2dreg (int op, REG_T reg);
INSTR_T
bfin_gen_brcc (int t, int b, Expr_Node *offset);
INSTR_T
bfin_gen_ujump (Expr_Node *offset);
INSTR_T
bfin_gen_cactrl (REG_T reg, int a, int op);
INSTR_T
bfin_gen_progctrl (int prgfunc, int poprnd);
INSTR_T
bfin_gen_loopsetup (Expr_Node *soffset, REG_T c, int rop,
Expr_Node *eoffset, REG_T reg);
INSTR_T
bfin_gen_loop (Expr_Node *expr, REG_T reg, int rop, REG_T preg);
INSTR_T
bfin_gen_pushpopmultiple (int dr, int pr, int d, int p, int w);
INSTR_T
bfin_gen_pushpopreg (REG_T reg, int w);
INSTR_T
bfin_gen_calla (Expr_Node *addr, int s);
INSTR_T
bfin_gen_linkage (int r, int framesize);
INSTR_T
bfin_gen_pseudodbg (int fn, int reg, int grp);
INSTR_T
bfin_gen_pseudodbg_assert (int dbgop, REG_T regtest, int expected);
bfd_boolean
bfin_resource_conflict (INSTR_T dsp32, INSTR_T dsp16_grp1, INSTR_T dsp16_grp2);
INSTR_T
bfin_gen_multi_instr (INSTR_T dsp32, INSTR_T dsp16_grp1, INSTR_T dsp16_grp2);
|
