File: m32rx.s

package info (click to toggle)
binutils 2.32.51.20190821-1
  • links: PTS, VCS
  • area: main
  • in suites: bullseye, sid
  • size: 309,676 kB
  • sloc: ansic: 1,201,497; asm: 658,869; cpp: 130,432; exp: 69,370; makefile: 56,804; sh: 23,583; lisp: 14,519; yacc: 14,467; perl: 2,111; ada: 1,681; lex: 1,649; pascal: 1,446; python: 991; cs: 879; sed: 195; xml: 95; awk: 25
file content (590 lines) | stat: -rw-r--r-- 7,440 bytes parent folder | download | duplicates (40)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
# Test new instructions
branchpoint:
	
	.text
	.global bcl
bcl:
	bcl branchpoint

	.text
	.global bncl
bncl:
	bncl branchpoint

	.text
	.global cmpz
cmpz:
	cmpz fp

	.text
	.global cmpeq
cmpeq:
	cmpeq fp, fp

	.text
	.global maclh1
maclh1:
	maclh1 fp, fp
	
	.text
	.global macsl0
msblo:
	msblo fp, fp
	
	.text
	.global mulwu1
mulwu1:
	mulwu1 fp, fp
	
	.text
	.global macwu1
macwu1:
	macwu1 fp, fp
	
	.text
	.global sadd
sadd:
	sadd
	
	.text
	.global satb
satb:
	satb fp, fp

	
	.text
	.global mulhi
mulhi:
	mulhi fp, fp, a1
	
	.text
	.global mullo
mullo:
	mullo fp, fp, a0
	
	.text
	.global divh
divh:
	divh fp, fp
	
	.text
	.global machi
machi:
	machi fp, fp, a1
	
	.text
	.global maclo
maclo:
	maclo fp, fp, a0
	
	.text
	.global mvfachi
mvfachi:
	mvfachi fp, a1
	
	.text
	.global mvfacmi
mvfacmi:
	mvfacmi fp, a1
	
	.text
	.global mvfaclo
mvfaclo:
	mvfaclo fp, a1
	
	.text
	.global mvtachi
mvtachi:
	mvtachi fp, a1
	
	.text
	.global mvtaclo
mvtaclo:
	mvtaclo fp, a0
	
	.text
	.global rac
rac:
	rac a1
	
	.text
	.global rac_ds
rac_ds:
	rac a1, a0
	
	.text
	.global rac_dsi
rac_dsi:
	rac a0, a1, #1
	
	.text
	.global rach
rach:
	rach a1
	
	.text
	.global rach_ds
rach_ds:
	rach a0, a1
	
	.text
	.global rach_dsi
rach_dsi:
	rach a1, a0, #2
	
# Test explicitly parallel and implicitly parallel instructions
# Including apparent instruction sequence reordering.
	.text
	.global bc__add
bc__add:
	bc bcl || add fp, fp
# Use bc.s here as bc is relaxable and thus a nop will be emitted.
	bc.s bcl
	add fp, fp

	.text
	.global bcl__addi
bcl__addi:	
	bcl bcl || addi fp, #77
	addi fp, #77
# Use bcl.s here as bcl is relaxable and thus the parallelization won't happen.
	bcl.s bcl

	.text
	.global bl__addv
bl__addv:
	bl bcl || addv fp, fp
	addv fp, fp
# Use bl.s here as bl is relaxable and thus the parallelization won't happen.
	bl.s bcl
	
	.text
	.global bnc__addx
bnc__addx:
	bnc bcl || addx fp, fp
# Use bnc.s here as bnc is relaxable and thus the parallelization attempt won't
# happen.  Things still won't be parallelized, but we want this test to try.
	bnc.s bcl
	addx fp, fp

	.text
	.global bncl__and
bncl__and:
	bncl bcl || and fp, fp
	and fp, fp
	bncl.s bcl

	.text
	.global bra__cmp
bra__cmp:
	bra bcl || cmp fp, fp
	cmp fp, fp
# Use bra.s here as bra is relaxable and thus the parallelization won't happen.
	bra.s bcl
	
	.text
	.global jl__cmpeq
jl__cmpeq:
	jl fp || cmpeq fp, fp
	cmpeq fp, fp
	jl fp
	
	.text
	.global jmp__cmpu
jmp__cmpu:
	jmp fp || cmpu fp, fp
	cmpu fp, fp
	jmp fp
	
	.text
	.global ld__cmpz
ld__cmpz:
	ld fp, @fp || cmpz r1
	cmpz r1
	ld fp, @fp 
	
	.text
	.global ld__ldi
ld__ldi:
	ld fp, @r1+ || ldi r2, #77
	ld fp, @r1+ 
	ldi r2, #77
	
	.text
	.global ldb__mv
ldb__mv:
	ldb fp, @fp || mv r2, fp
	ldb fp, @fp 
	mv r2, fp

	.text
	.global ldh__neg
ldh__neg:
	ldh fp, @fp || neg r2, fp
	ldh fp, @fp
	neg r2, fp

	.text
	.global ldub__nop
ldub__nop:
	ldub fp, @fp || nop
	ldub fp, @fp 
	nop

	.text
	.global lduh__not
lduh__not:
	lduh fp, @fp || not r2, fp
	lduh fp, @fp
	not r2, fp

	.text
	.global lock__or
lock__or:
	lock fp, @fp || or r2, fp
	lock fp, @fp
	or r2, fp

	.text
	.global mvfc__sub
mvfc__sub:
	mvfc fp, cr1 || sub r2, fp
	mvfc fp, cr1
	sub r2, fp

	.text
	.global mvtc__subv
mvtc__subv:
	mvtc fp, cr2 || subv r2, fp
	mvtc fp, cr2
	subv r2, fp

	.text
	.global rte__subx
rte__subx:
	rte || sub r2, fp
	rte
	subx r2, fp

	.text
	.global sll__xor
sll__xor:
	sll fp, r1 || xor r2, fp
	sll fp, r1
	xor r2, fp

	.text
	.global slli__machi
slli__machi:
	slli fp, #22 || machi r2, fp
	slli fp, #22
	machi r2, fp

	.text
	.global sra__maclh1
sra__maclh1:
	sra fp, fp || maclh1 r2, fp
	sra fp, fp
	maclh1 r2, fp

	.text
	.global srai__maclo
srai__maclo:
	srai fp, #22 || maclo r2, fp
	srai fp, #22
	maclo r2, fp

	.text
	.global srl__macwhi
srl__macwhi:
	srl fp, fp || macwhi r2, fp
	srl fp, fp
	macwhi r2, fp

	.text
	.global srli__macwlo
srli__macwlo:
	srli fp, #22 || macwlo r2, fp
	srli fp, #22
	macwlo r2, fp
	
	.text
	.global st__macwu1
st__macwu1:
	st fp, @fp || macwu1 r2, fp
	st fp, @fp
	macwu1 r2, fp

	.text
	.global st__msblo
st__msblo:
	st fp, @+fp || msblo r2, fp
	st fp, @+fp 
	msblo r2, fp

	.text
	.global st__mul
st__mul:
	st fp, @-fp || mul r2, fp
	st fp, @-fp
	mul r2, fp

	.text
	.global stb__mulhi
stb__mulhi:
	stb fp, @fp || mulhi r2, fp
	stb fp, @fp
	mulhi r2, fp
	
	.text
	.global sth__mullo
sth__mullo:
	sth fp, @fp || mullo r2, fp
	sth fp, @fp 
	mullo r2, fp

	.text
	.global trap__mulwhi
trap__mulwhi:
	trap #2 || mulwhi r2, fp
	trap #2
	mulwhi r2, fp

	.text
	.global unlock__mulwlo
unlock__mulwlo:
	unlock fp, @fp || mulwlo r2, fp
	unlock fp, @fp
	mulwlo r2, fp

	.text
	.global add__mulwu1
add__mulwu1:
	add fp, fp || mulwu1 r2, fp
	add fp, fp
	mulwu1 r2, fp

	.text
	.global addi__mvfachi
addi__mvfachi:
	addi fp, #77 || mvfachi r2, a0
	addi fp, #77
	mvfachi r2, a0

	.text
	.global addv__mvfaclo
addv__mvfaclo:
	addv fp, fp || mvfaclo r2, a1
	addv fp, fp
	mvfaclo r2, a1

	.text
	.global addx__mvfacmi
addx__mvfacmi:
	addx fp, fp || mvfacmi r2, a0
	addx fp, fp
	mvfacmi r2, a0

	.text
	.global and__mvtachi
and__mvtachi:
	and fp, fp || mvtachi r2, a0
	and fp, fp
	mvtachi r2, a0
	
	.text
	.global cmp__mvtaclo
cmp__mvtaclo:
	cmp fp, fp || mvtaclo r2, a0
	cmp fp, fp
	mvtaclo r2, a0

	.text
	.global cmpeq__rac
cmpeq__rac:
	cmpeq fp, fp || rac a1
	cmpeq fp, fp
	rac a1

	.text
	.global cmpu__rach
cmpu__rach:
	cmpu fp, fp || rach a0, a1
	cmpu fp, fp
	rach a1, a1, #1

	.text
	.global cmpz__sadd
cmpz__sadd:
	cmpz fp || sadd
	cmpz fp
	sadd


	
# Test private instructions	
	.text
	.global sc
sc:
	sc
	sadd
	
	.text
	.global snc
snc:
	snc
	sadd 
	
	.text
	.global jc
jc:
	jc fp
	
	.text
	.global jnc
jnc:
	jnc fp
		
	.text
	.global pcmpbz
pcmpbz:
	pcmpbz fp
	
	.text
	.global sat
sat:
	sat fp, fp
	
	.text
	.global sath
sath:
	sath fp, fp 


# Test parallel versions of the private instructions
	
	.text
	.global jc__pcmpbz
jc__pcmpbz:
	jc fp || pcmpbz fp
	jc fp 
	pcmpbz fp
	
	.text
	.global jnc__ldi
jnc__ldi:
	jnc fp || ldi fp, #77
	jnc fp
	ldi fp, #77
	
	.text
	.global sc__mv
sc__mv:
	sc || mv fp, r2
	sc 
	mv fp, r2

	.text
	.global snc__neg
snc__neg:
	snc || neg fp, r2
	snc 
	neg fp, r2
	
# Test automatic and explicit parallelisation of instructions
	.text
	.global nop__sadd
nop__sadd:
	nop
	sadd

	.text
	.global sadd__nop
sadd__nop:
	sadd
	nop

	.text
	.global sadd__nop_reverse
sadd__nop_reverse:
	sadd || nop

	.text
	.global add__not
add__not:
	add  r0, r1
	not  r3, r5

	.text
	.global add__not__dest_clash
add__not_dest_clash:
	add  r3, r4
	not  r3, r5

	.text
	.global add__not__src_clash
add__not__src_clash:
	add  r3, r4
	not  r5, r3

	.text
	.global add__not__no_clash
add__not__no_clash:
	add  r3, r4
	not  r4, r5

	.text
	.global mul__sra
mul__sra:
	mul  r1, r2
	sra  r3, r4
	
	.text
	.global mul__sra__reverse_src_clash
mul__sra__reverse_src_clash:
	mul  r1, r3
	sra  r3, r4
	
	.text
	.global bc__add_
bc__add_:
	bc.s label
	add r1, r2

	.text
	.global add__bc
add__bc:
	add r3, r4
	bc.s  label

	.text
	.global bc__add__forced_parallel
bc__add__forced_parallel:
	bc label || add r5, r6

	.text
	.global add__bc__forced_parallel
add__bc__forced_parallel:
	add r7, r8 || bc label
label:
	nop

; Additional testcases.
; These insns were added to the chip later.

	.text
mulwhi:
	mulwhi fp, fp, a0
	mulwhi fp, fp, a1
	
mulwlo:
	mulwlo fp, fp, a0
	mulwlo fp, fp, a1

macwhi:
	macwhi fp, fp, a0
	macwhi fp, fp, a1

macwlo:
	macwlo fp, fp, a0
	macwlo fp, fp, a1