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TODO (know issues in CPU model):
-------------------------------
[!] The following 3DNow! instructions still not implemented:
PF2IW_PqQq
PFNACC_PqQq
PFPNACC_PqQq
PFCMPGE_PqQq
PFCMPGT_PqQq
PFCMPEQ_PqQq
PFMIN_PqQq
PFMAX_PqQq
PFRCP_PqQq
PFRSQRT_PqQq
PFSUB_PqQq
PFSUBR_PqQq
PFADD_PqQq
PFACC_PqQq,
PFMUL_PqQq
PFRCPIT1_PqQq
PFRSQIT1_PqQq
PFRCPIT2_PqQq
[!] CPUID does not report 3DNow! instruction set
[!] Some of APIC functionality still not implemented, for example
- Globally disabled APIC
- NMI, SMI, INIT signals, LVT pins handling
- Filter interrupts according processor priority (PPR)
[!] No support of AC flag (alignment checking) and #AC exception
#AC exception should be generated if trying to do unaligned memory
access when
CPL == 3 && CR.AM == 1 && EFLAGS.AC == 1
[!] REP NOP is PAUSE (on P4/XEON)
When running in SMP mode, this means that we are in a spin loop.
This processor should yield to the other one, as we are anyhow waiting
for a lock, and any other processor is responsible for this.
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