1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
|
.\" SPDX-License-Identifier: GPL-2.0-only
.TH CBFSTOOL "8" "November 2024" "" "System Administration Utilities"
.SH NAME
cbfstool \- Management utility for CBFS formatted ROM images (coreboot tools)
.SH SYNOPSIS
.sp
.nf
cbfstool [\-h]
cbfstool FILE COMMAND [\-v] [PARAMETERS]...
.SH DESCRIPTION
Management utility for CBFS formatted ROM images
.SH "OPTIONS"
.TP
\fB\-H\fR header_offset
.RS 4
Do not search for header; use this offset*
.RE
.PP
\fB\-T\fR
.RS 4
Output top\-aligned memory address
.RE
.PP
\fB\-u\fR
.RS 4
Accept short data; fill upward/from bottom
.RE
.TP
\fB\-d\fR
.RS 4
Accept short data; fill downward/from top
.RE
.TP
\fB\-F\fR
.RS 4
Force action
.RE
.TP
\fB\-g\fR
.RS 4
Generate position and alignment arguments
.RE
.TP
\fB\-U\fR
.RS 4
Unprocessed; don't decompress or make ELF
.RE
.TP
\fB\-v\fR
.RS 4
Provide verbose output (\fB\-v\fR=\fI\,INFO\/\fR \fB\-vv\fR=\fI\,DEBUG\/\fR output)
.RE
.TP
\fB\-h\fR
.RS 4
Display this help message
.RE
.TP
\fB\-\-ext\-win\-base\fR
.RS 4
Base of extended decode window in host address space(x86 only)
.RE
.TP
\fB\-\-ext\-win\-size\fR
.RS 4
Size of extended decode window in host address
space(x86 only)
.RE
.SS "COMMANDS"
.TP
\fIadd\fR [\-r image,regions] \fB\-f\fR FILE \fB\-n\fR NAME \fB\-t\fR TYPE [\-A hash]
[\-c compression] [\-b base\-address | \fB\-a\fR alignment] [\-p padding size]
[\-y|\-\-xip if TYPE is FSP] [\-j topswap\-size] (Intel CPUs only) [\-\-ibb]
[\-\-ext\-win\-base win\-base \fB\-\-ext\-win\-size\fR win\-size]
.sp
Add a component
.sp
\fB\-j\fR valid size: 0x10000 0x20000 0x40000 0x80000 0x100000
.TP
\fIadd\-payload\fR [\-r image,regions] \fB\-f\fR FILE \fB\-n\fR NAME [\-A hash]
[\-c compression] [\-b base\-address] (linux specific: [\-C cmdline] [\-I initrd])
.sp
Add a payload to the ROM
.TP
\fIadd\-stage\fR [\-r image,regions] \fB\-f\fR FILE \fB\-n\fR NAME [\-A hash]
[\-c compression] [\-b base] [\-S comma\-separated\-section(s)\-to\-ignore]
[\-a alignment] [\-Q|\-\-pow2page] [\-y|\-\-xip] [\-\-ibb]
[\-\-ext\-win\-base win\-base \fB\-\-ext\-win\-size\fR win\-size]
.sp
Add a stage to the ROM
.TP
\fIadd\-flat\-binary\fR [\-r image,regions] \fB\-f\fR FILE \fB\-n\fR NAME
[\-A hash] \fB\-l\fR load\-address \fB\-e\fR entry\-point [\-c compression] [\-b base]
.sp
Add a 32bit flat mode binary
.TP
\fIadd\-int\fR [\-r image,regions] \fB\-i\fR INTEGER \fB\-n\fR NAME [\-b base]
.sp
Add a raw 64\-bit integer value
.TP
\fIadd\-master\-header\fR [\-r image,regions] [\-j topswap\-size] (Intel CPUs only)
.sp
Add a legacy CBFS master header
.TP
\fIremove\fR [\-r image,regions] \fB\-n\fR NAME
.sp
Remove a component
.TP
\fIcompact\fR \fB\-r\fR image,regions
.sp
Defragment CBFS image.
.TP
\fIcopy\fR \fB\-r\fR image,regions \fB\-R\fR source\-region
.sp
Create a copy (duplicate) cbfs instance in fmap
.TP
\fIcreate\fR \fB\-m\fR ARCH \fB\-s\fR size [\-b bootblock offset]
[\-o CBFS offset] [\-H header offset] [\-B bootblock]
.sp
Create a legacy ROM file with CBFS master header*
.TP
\fIcreate\fR \fB\-M\fR flashmap [\-r list,of,regions,containing,cbfses]
.sp
Create a new\-style partitioned firmware image
.TP
\fIlayout\fR [\-w]
.sp
List mutable (or, with \fB\-w\fR, readable) image regions
.TP
\fIprint\fR [\-r image,regions] [\-k]
.sp
Show the contents of the ROM
.TP
\fIextract\fR [\-r image,regions] [\-m ARCH] \fB\-n\fR NAME \fB\-f\fR FILE [\-U]
.sp
Extracts a file from ROM
.TP
\fIwrite\fR [\-F] \fB\-r\fR image,regions \fB\-f\fR file [\-u | \fB\-d]\fR [\-i int]
.sp
Write file into same\-size [or larger] raw region
.TP
\fIread\fR [\-r fmap\-region] \fB\-f\fR file
.sp
Extract raw region contents into binary file
.TP
\fItruncate\fR [\-r fmap\-region]
.sp
Truncate CBFS and print new size on stdout
.TP
\fIexpand\fR [\-r fmap\-region]
.sp
Expand CBFS to span entire region
.SS "OFFSETS"
.PP
Numbers accompanying \fB\-b\fR, \fB\-H\fR, and \fB\-o\fR switches* may be provided
in two possible formats: if their value is greater than
0x80000000, they are interpreted as a top\-aligned x86 memory
address; otherwise, they are treated as an offset into flash.
.SS "ARCHITECTURES"
.PP
arm64, arm, mips, ppc64, power8, riscv, x86, unknown
.SS "TYPES"
.PP
bootblock, cbfs header, legacy stage, stage, simple elf, fit_payload, optionrom, bootsplash,
raw, vsa, mbi, microcode, intel_fit, fsp, mrc, cmos_default,
cmos_layout, spd, mrc_cache, mma, efi, struct, deleted, null,
amdfw
.PP
\fBNote\fR that these actions and switches are only valid when
working with legacy images whose structure is described
primarily by a CBFS master header. New\-style images, in
contrast, exclusively make use of an FMAP to describe their
layout: this must minimally contain an 'FMAP' section
specifying the location of this FMAP itself and a 'COREBOOT'
section describing the primary CBFS. It should also be noted
that, when working with such images, the \fB\-F\fR and \fB\-r\fR switches
default to 'COREBOOT' for convenience, and the \fB\-b\fR switch becomes
relative to the selected CBFS region's lowest address.
The one exception to this rule is the top\-aligned address,
which is always relative to the end of the entire image
rather than relative to the local region; this is true for
for both input (sufficiently large) and output (\fB\-T\fR) data.
.SH "AUTHORS"
.PP
.nf
coresystems GmbH.
Man page written by Ahmad Khalifa.
|
