1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112
|
.\" SPDX-License-Identifier: GPL-2.0-only
.TH IFDTOOL "8" "November 2024" "" "System Administration Utilities"
.SH NAME
ifdtool \- Extract and dump Intel Firmware Descriptor information
.SH SYNOPSIS
.PP
usage ifdtool [\-vhdix?] <filename>
.SH DESCRIPTION
Extract and dump Intel Firmware Descriptor information.
.SH OPTIONS
.TP
\fB\-d\fR | \fB\-\-dump\fR
dump intel firmware descriptor
.TP
\fB\-f\fR | \fB\-\-layout\fR <filename>
dump regions into a flashrom layout file
.TP
\fB\-F\fR | \fB\-\-fmap\-layout\fR <filename>
dump IFD regions into a fmap layout template (.fmd) file
.TP
\fB\-t\fR | \fB\-\-validate\fR
Validate that the firmware descriptor layout matches the fmap layout
.TP
\fB\-x\fR | \fB\-\-extract\fR
extract intel fd modules
.TP
\fB\-i\fR | \fB\-\-inject\fR <region>:<module>
inject file <module> into region <region>
.TP
\fB\-n\fR | \fB\-\-newlayout\fR <filename>
update regions using a flashrom layout file
.TP
\fB\-O\fR | \fB\-\-output\fR <filename>
output filename
.TP
\fB\-s\fR | \fB\-\-spifreq\fR <17|20|30|33|48|50>
set the SPI frequency
.TP
\fB\-D\fR | \fB\-\-density\fR <512|1|2|4|8|16|32|64>
set chip density (512 in KByte, others in MByte)
.TP
\fB\-C\fR | \fB\-\-chip\fR <0|1|2>
select spi chip on which to operate can only be used once per run:
.nf
0 \- both chips (default)
1 \- first chip
2 \- second chip
.TP
\fB\-e\fR | \fB\-\-em100\fR
set SPI frequency to 20MHz and disable
Dual Output Fast Read Support
.TP
\fB\-l\fR | \fB\-\-lock\fR
Lock firmware descriptor and ME region
.TP
\fB\-r\fR | \fB\-\-read\fR
Enable CPU/BIOS read access for ME region
.TP
\fB\-u\fR | \fB\-\-unlock\fR
Unlock firmware descriptor and ME region
.TP
\fB\-g\fR | \fB\-\-gpr0\-disable\fR
Disable GPR0 (Global Protected Range) register
.TP
\fB\-E\fR | \fB\-\-gpr0\-enable\fR
Enable GPR0 (Global Protected Range) register
.TP
\fB\-c\fR | \fB\-\-gpr0\-status\fR
Checking GPR0 (Global Protected Range) register status
.TP
\fB\-M\fR | \fB\-\-altmedisable\fR <0|1>
Set the MeDisable and AltMeDisable (or HAP for skylake or newer platform)
bits to disable ME
.TP
\fB\-p\fR | \fB\-\-platform\fR
.nf
Add platform\-specific quirks
adl \- Alder Lake
aplk \- Apollo Lake
cnl \- Cannon Lake
lbg \- Lewisburg PCH
dnv \- Denverton
ehl \- Elkhart Lake
glk \- Gemini Lake
icl \- Ice Lake
ifd2 \- IFDv2 Platform
jsl \- Jasper Lake
mtl \- Meteor Lake
sklkbl \- Sky Lake/Kaby Lake
tgl \- Tiger Lake
wbg \- Wellsburg
.TP
\fB\-S\fR | \fB\-\-setpchstrap\fR
Write a PCH strap
.TP
\fB\-V\fR | \fB\-\-newvalue\fR
The new value to write into PCH strap specified by \fB\-S\fR
.TP
\fB\-v\fR | \fB\-\-version\fR
print the version
.TP
\fB\-h\fR | \fB\-\-help\fR
print this help
.PP
.SH NOTES
.TP
<region> is one of Descriptor, BIOS, ME, GbE, Platform Data, Secondary BIOS, Device Exp1, EC, Device Exp2, IE, 10GbE_0, 10GbE_1, PTT
.SH "AUTHORS"
.PP
.nf
coresystems GmbH.
Man page written by Ahmad Khalifa.
|