File: ROM.sct

package info (click to toggle)
cpputest 4.0-3
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 6,688 kB
  • sloc: cpp: 31,212; sh: 4,978; ansic: 1,360; makefile: 775; ruby: 676; xml: 8; sed: 1
file content (42 lines) | stat: -rw-r--r-- 999 bytes parent folder | download | duplicates (4)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
#! armcc -E
; code upper need to use #define 

;-------------------------------------------------------------------------------------
;   Keil scatter loading file
; For LPC1768
;-------------------------------------------------------------------------------------

#define FLASH_START (0x00000000)
#define FLASH_END   (0x00080000)
#define FLASH_SIZE  (FLASH_END-FLASH_START)

; Internal SRAM
#define RAM1_START 0x10000000
#define RAM1_END   0x10008000
#define RAM1_SIZE  (RAM1_END-RAM1_START)

; Internal SRAM for peripherial DMA
#define RAM2_START 0x2007C000
#define RAM2_END   0x20084000
#define RAM2_SIZE  (RAM2_END-RAM2_START)

; Load region for main program
LR1   FLASH_START  FLASH_SIZE {
   ER1 FLASH_START {
        *.o(RESET, +First)
        *.o(InRoot$$Sections)
        *.o(+RO)
   }
   ER2 RAM1_START RAM1_SIZE {
    *.o(+RW +ZI)
   }
   ER3 RAM2_START RAM2_SIZE {
    *.o(HEAP)
    *.o(STACK)
   }
}



/*----------------------------------------------------------------------------*/