File: base.c

package info (click to toggle)
dahdi-linux 1%3A2.11.1.0.20170917~dfsg-7
  • links: PTS, VCS
  • area: main
  • in suites: buster
  • size: 8,280 kB
  • sloc: ansic: 125,177; perl: 2,395; sh: 1,133; makefile: 427; xml: 24
file content (4350 lines) | stat: -rw-r--r-- 115,481 bytes parent folder | download
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288
3289
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3375
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397
3398
3399
3400
3401
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426
3427
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443
3444
3445
3446
3447
3448
3449
3450
3451
3452
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508
3509
3510
3511
3512
3513
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3574
3575
3576
3577
3578
3579
3580
3581
3582
3583
3584
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594
3595
3596
3597
3598
3599
3600
3601
3602
3603
3604
3605
3606
3607
3608
3609
3610
3611
3612
3613
3614
3615
3616
3617
3618
3619
3620
3621
3622
3623
3624
3625
3626
3627
3628
3629
3630
3631
3632
3633
3634
3635
3636
3637
3638
3639
3640
3641
3642
3643
3644
3645
3646
3647
3648
3649
3650
3651
3652
3653
3654
3655
3656
3657
3658
3659
3660
3661
3662
3663
3664
3665
3666
3667
3668
3669
3670
3671
3672
3673
3674
3675
3676
3677
3678
3679
3680
3681
3682
3683
3684
3685
3686
3687
3688
3689
3690
3691
3692
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722
3723
3724
3725
3726
3727
3728
3729
3730
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741
3742
3743
3744
3745
3746
3747
3748
3749
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759
3760
3761
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771
3772
3773
3774
3775
3776
3777
3778
3779
3780
3781
3782
3783
3784
3785
3786
3787
3788
3789
3790
3791
3792
3793
3794
3795
3796
3797
3798
3799
3800
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3889
3890
3891
3892
3893
3894
3895
3896
3897
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909
3910
3911
3912
3913
3914
3915
3916
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929
3930
3931
3932
3933
3934
3935
3936
3937
3938
3939
3940
3941
3942
3943
3944
3945
3946
3947
3948
3949
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991
3992
3993
3994
3995
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
4020
4021
4022
4023
4024
4025
4026
4027
4028
4029
4030
4031
4032
4033
4034
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048
4049
4050
4051
4052
4053
4054
4055
4056
4057
4058
4059
4060
4061
4062
4063
4064
4065
4066
4067
4068
4069
4070
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082
4083
4084
4085
4086
4087
4088
4089
4090
4091
4092
4093
4094
4095
4096
4097
4098
4099
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
4110
4111
4112
4113
4114
4115
4116
4117
4118
4119
4120
4121
4122
4123
4124
4125
4126
4127
4128
4129
4130
4131
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142
4143
4144
4145
4146
4147
4148
4149
4150
4151
4152
4153
4154
4155
4156
4157
4158
4159
4160
4161
4162
4163
4164
4165
4166
4167
4168
4169
4170
4171
4172
4173
4174
4175
4176
4177
4178
4179
4180
4181
4182
4183
4184
4185
4186
4187
4188
4189
4190
4191
4192
4193
4194
4195
4196
4197
4198
4199
4200
4201
4202
4203
4204
4205
4206
4207
4208
4209
4210
4211
4212
4213
4214
4215
4216
4217
4218
4219
4220
4221
4222
4223
4224
4225
4226
4227
4228
4229
4230
4231
4232
4233
4234
4235
4236
4237
4238
4239
4240
4241
4242
4243
4244
4245
4246
4247
4248
4249
4250
4251
4252
4253
4254
4255
4256
4257
4258
4259
4260
4261
4262
4263
4264
4265
4266
4267
4268
4269
4270
4271
4272
4273
4274
4275
4276
4277
4278
4279
4280
4281
4282
4283
4284
4285
4286
4287
4288
4289
4290
4291
4292
4293
4294
4295
4296
4297
4298
4299
4300
4301
4302
4303
4304
4305
4306
4307
4308
4309
4310
4311
4312
4313
4314
4315
4316
4317
4318
4319
4320
4321
4322
4323
4324
4325
4326
4327
4328
4329
4330
4331
4332
4333
4334
4335
4336
4337
4338
4339
4340
4341
4342
4343
4344
4345
4346
4347
4348
4349
4350
/* Wildcard TC400B Driver
 *
 * Copyright (C) 2006-2012, Digium, Inc.
 *
 * All rights reserved.
 *
 */

/*
 * See http://www.asterisk.org for more information about
 * the Asterisk project. Please do not directly contact
 * any of the maintainers of this project for assistance;
 * the project provides a web site, mailing lists and IRC
 * channels for your use.
 *
 * This program is free software, distributed under the terms of
 * the GNU General Public License Version 2 as published by the
 * Free Software Foundation. See the LICENSE file included with
 * this program for more details.
 */

#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/kmod.h>
#include <linux/sched.h>

#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/jiffies.h>
#include <linux/moduleparam.h>
#include <linux/firmware.h>
#include <linux/if_ether.h>
#include <linux/ip.h>
#include <linux/udp.h>
#include <linux/etherdevice.h>
#include <linux/timer.h>

#include <stdbool.h>

#include <dahdi/kernel.h>

#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)
#include <linux/sched/signal.h>
#endif /* 4.11.0 */


#include <linux/io.h>

/* COMPILE TIME OPTIONS =================================================== */

#define INTERRUPT 0
#define WORKQUEUE 1
#define TASKLET   2

/* Define if you want a debug attribute to test alert processing. */
#undef EXPORT_FOR_ALERT_ATTRIBUTE

#ifndef DEFERRED_PROCESSING
#	define DEFERRED_PROCESSING WORKQUEUE
#endif

#if DEFERRED_PROCESSING == INTERRUPT
#	define ALLOC_FLAGS GFP_ATOMIC
#elif DEFERRED_PROCESSING == TASKLET
#	define ALLOC_FLAGS GFP_ATOMIC
#else
#	define ALLOC_FLAGS GFP_KERNEL
#endif

#define WARN_ALWAYS() WARN_ON(1)

#define DTE_DEBUG(_dbgmask, _fmt, _args...)				\
	if ((debug & _dbgmask) == (_dbgmask)) {				\
		dev_info(&(wc)->pdev->dev, _fmt, ## _args);		\
	}								\


/* define CONFIG_WCTC4XXP_POLLING to operate in a pure polling mode.  This is
 * was placed in as a debugging tool for a particluar system that wasn't
 * routing the interrupt properly. Therefore it is off by default and the
 * driver must be recompiled to enable it. */
#undef CONFIG_WCTC4XXP_POLLING

/* The total number of active channels over which the driver will start polling
 * the card every 10 ms. */
#define POLLING_CALL_THRESHOLD 40

#define INVALID 999 /* Used to mark invalid channels, commands, etc.. */
#define MAX_CHANNEL_PACKETS  5

#define G729_LENGTH	20
#define G723_LENGTH	30

#define G729_SAMPLES	160	/* G.729 */
#define G723_SAMPLES	240 	/* G.723.1 */

#define G729_BYTES	20	/* G.729 */
#define G723_6K_BYTES	24 	/* G.723.1 at 6.3kb/s */
#define G723_5K_BYTES	20	/* G.723.1 at 5.3kb/s */
#define G723_SID_BYTES	4	/* G.723.1 SID frame */

#define MAX_CAPTURED_PACKETS 5000

/* The following bit fields are used to set the various debug levels. */
#define DTE_DEBUG_GENERAL	(1 << 0) /* 1  */
#define DTE_DEBUG_CHANNEL_SETUP	(1 << 1) /* 2  */
#define DTE_DEBUG_RTP_TX	(1 << 2) /* 4  */
#define DTE_DEBUG_RTP_RX	(1 << 3) /* 8  */
#define DTE_DEBUG_RX_TIMEOUT	(1 << 4) /* 16 */
#define DTE_DEBUG_NETWORK_IF	(1 << 5) /* 32 */
#define DTE_DEBUG_NETWORK_EARLY	(1 << 6) /* 64 */
#define DTE_DEBUG_ETH_STATS	(1 << 7) /* 128 */

static int debug;
static char *mode;

static spinlock_t wctc4xxp_list_lock;
static struct list_head wctc4xxp_list;

#define ETH_P_CSM_ENCAPS 0x889B

struct rtphdr {
#if defined(__LITTLE_ENDIAN_BITFIELD)
	__u8    csrc_count:4;
	__u8    extension:1;
	__u8    padding:1;
	__u8    ver:2;
	__u8    type:7;
	__u8 	marker:1;
#elif defined(__BIG_ENDIAN_BITFIELD)
	__u8    ver:2;
	__u8    padding:1;
	__u8    extension:1;
	__u8    csrc_count:4;
	__u8 	marker:1;
	__u8    type:7;
#else
#error "Please fix <asm/byteorder.h>"
#endif
	__be16	seqno;
	__be32  timestamp;
	__be32  ssrc;
} __attribute__((packed));

struct rtp_packet {
	struct ethhdr ethhdr;
	struct iphdr  iphdr;
	struct udphdr udphdr;
	struct rtphdr rtphdr;
	__u8   payload[0];
} __attribute__((packed));

struct csm_encaps_cmd {
	/* COMMON PART OF PAYLOAD HEADER */
	__u8   length;
	__u8   index;
	__u8   type;
	__u8   class;
	__le16 function;
	__le16 reserved;
	__le16 params[0];
} __attribute__((packed));

/* Ethernet packet type for communication control information to the DTE. */
struct csm_encaps_hdr {
	struct ethhdr ethhdr;
	/* CSM_ENCAPS HEADER */
	__be16 op_code;
	__u8   seq_num;
	__u8   control;
	__be16 channel;
	/* There is always at least one command. */
	struct csm_encaps_cmd cmd;
} __attribute__((packed));

#define CONTROL_PACKET_OPCODE  0x0001
/* Control bits */
#define LITTLE_ENDIAN	0x01
#define SUPPRESS_ACK	0x40
#define MESSAGE_PACKET	0x80

#define SUPERVISOR_CHANNEL 0xffff

/* Supervisor function codes */
#define SUPVSR_CREATE_CHANNEL	0x0010

#define MONITOR_LIVE_INDICATION_TYPE 0x75
#define VOIP_VCEINFO_TYPE	0x0e
#define CONFIG_CHANGE_TYPE	0x00
#define CONFIG_CHANNEL_CLASS	0x02
#define CONFIG_DEVICE_CLASS	0x06

/* Individual channel config commands */
#define MAX_FRAME_SIZE 1518
#define SFRAME_SIZE MAX_FRAME_SIZE

#define DEFAULT_RX_DRING_SIZE (1 << 6) /* Must be a power of two */

/* Keep the TX ring shorter in order to reduce the amount of time needed to
 * bring up channels when sending high priority csm_encaps packets. */
#define DEFAULT_TX_DRING_SIZE (1 << 4) /* Must be a power of two */
#define MIN_PACKET_LEN  64

/* Transcoder buffer (tcb) */
struct tcb {
	void *data;
	struct list_head node;
	unsigned long timeout;
	unsigned long retries;
#define TX_COMPLETE             (1 << 1)
#define DO_NOT_CAPTURE          (1 << 2)
#define WAIT_FOR_ACK		(1 << 3)
#define WAIT_FOR_RESPONSE	(1 << 4)
#define DTE_CMD_TIMEOUT         (1 << 5)
	u16 flags;
	u16 next_index;
	struct completion *complete;
	struct tcb *response;
	struct channel_pvt *cpvt;
	/* The number of bytes available in data. */
	int data_len;
};

static inline const struct csm_encaps_hdr *
response_header(struct tcb *cmd)
{
	BUG_ON(!cmd->response);
	return (const struct csm_encaps_hdr *)(cmd)->response->data;
}

static inline void
initialize_cmd(struct tcb *cmd, unsigned long cmd_flags)
{
	INIT_LIST_HEAD(&cmd->node);
	cmd->flags = cmd_flags;
}

#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 20)
/*! Used to allocate commands to submit to the dte. */
kmem_cache_t *cmd_cache;
#else
/*! Used to allocate commands to submit to the dte. */
static struct kmem_cache *cmd_cache;
#endif

static inline struct tcb *
__alloc_cmd(size_t size, gfp_t alloc_flags, unsigned long cmd_flags)
{
	struct tcb *cmd;

	if (unlikely(size > SFRAME_SIZE))
		return NULL;
	if (size < MIN_PACKET_LEN)
		size = MIN_PACKET_LEN;
	cmd = kmem_cache_alloc(cmd_cache, alloc_flags);
	if (likely(cmd)) {
		memset(cmd, 0, sizeof(*cmd));
		cmd->data = kzalloc(size, alloc_flags);
		if (unlikely(!cmd->data)) {
			kmem_cache_free(cmd_cache, cmd);
			return NULL;
		}
		cmd->data_len = size;
		initialize_cmd(cmd, cmd_flags);
	}
	return cmd;
}

static struct tcb *
alloc_cmd(size_t size)
{
	return __alloc_cmd(size, GFP_KERNEL, 0);
}

static void
__free_cmd(struct tcb *cmd)
{
	if (cmd)
		kfree(cmd->data);
	kmem_cache_free(cmd_cache, cmd);
	return;
}

static void
free_cmd(struct tcb *cmd)
{
	if (cmd->response)
		__free_cmd(cmd->response);
	__free_cmd(cmd);
}

struct channel_stats {
	atomic_t packets_sent;
	atomic_t packets_received;
};

struct channel_pvt {
	spinlock_t lock;	/* Lock for this structure */
	struct wcdte *wc;
	u16 seqno;
	u8 cmd_seqno;
	u8 ssrc;
	u8 last_rx_seq_num;
	u16 timeslot_in_num;	/* DTE timeslot to receive from */
	u16 timeslot_out_num;	/* DTE timeslot to send data to */
	u16 chan_in_num;	/* DTE channel to receive from */
	u16 chan_out_num;	/* DTE channel to send data to */
	u32 last_timestamp;
	struct {
		u8 encoder:1;	/* If we're an encoder */
	};
	struct channel_stats stats;
	struct list_head rx_queue; /* Transcoded packets for this channel. */

	/* Used to prevent user space from flooding the firmware. */
	long samples_in_flight;
	unsigned long send_time;
};

struct wcdte {
	char board_name[40];
	const char *variety;
	int pos;
	struct list_head node;
	spinlock_t reglock;
	wait_queue_head_t waitq;
	struct mutex chanlock;
#define DTE_READY	1
#define DTE_SHUTDOWN	2
#define DTE_POLLING	3
#define DTE_RELOAD	4
	unsigned long flags;

	/* This is a device-global list of commands that are waiting to be
	 * transmited (and did not fit on the transmit descriptor ring) */
	spinlock_t cmd_list_lock;
	struct list_head cmd_list;
	struct list_head waiting_for_response_list;

	spinlock_t rx_list_lock;
	struct list_head rx_list;
	spinlock_t rx_lock;

	unsigned int seq_num;
	int last_rx_seq_num;
	unsigned char numchannels;
	unsigned char complexname[40];

	/* This section contains the members necessary to communicate with the
	 * physical interface to the transcoding engine.  */
	struct pci_dev *pdev;
	unsigned int   intmask;
	void __iomem	*iobase;
	struct wctc4xxp_descriptor_ring *txd;
	struct wctc4xxp_descriptor_ring *rxd;

	struct dahdi_transcoder *uencode;
	struct dahdi_transcoder *udecode;
	struct channel_pvt *encoders;
	struct channel_pvt *decoders;

#if DEFERRED_PROCESSING == WORKQUEUE
	struct work_struct deferred_work;
#endif

	/*
	 * This section contains the members necessary for exporting the
	 * network interface to the host system.  This is only used for
	 * debugging purposes.
	 *
	 */
	struct sk_buff_head captured_packets;
	struct net_device *netdev;
	struct net_device_stats net_stats;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)
	struct napi_struct napi;
#endif
	struct timer_list watchdog;
	u16 open_channels;
	unsigned long reported_packet_errors;
};

struct wcdte_netdev_priv {
	struct wcdte *wc;
};

static inline struct wcdte *
wcdte_from_netdev(struct net_device *netdev)
{
	struct wcdte_netdev_priv *priv;
	priv = netdev_priv(netdev);
	return priv->wc;
}


static inline void wctc4xxp_set_ready(struct wcdte *wc)
{
	set_bit(DTE_READY, &wc->flags);
}

static inline int wctc4xxp_is_ready(struct wcdte *wc)
{
	return test_bit(DTE_READY, &wc->flags);
}

#define DTE_FORMAT_ULAW   0x00
#define DTE_FORMAT_G723_1 0x04
#define DTE_FORMAT_ALAW   0x08
#define DTE_FORMAT_G729A  0x12
#define DTE_FORMAT_UNDEF  0xFF

static inline u8 wctc4xxp_dahdifmt_to_dtefmt(unsigned int fmt)
{
	u8 pt;

	switch (fmt) {
	case DAHDI_FORMAT_G723_1:
		pt = DTE_FORMAT_G723_1;
		break;
	case DAHDI_FORMAT_ULAW:
		pt = DTE_FORMAT_ULAW;
		break;
	case DAHDI_FORMAT_ALAW:
		pt = DTE_FORMAT_ALAW;
		break;
	case DAHDI_FORMAT_G729A:
		pt = DTE_FORMAT_G729A;
		break;
	default:
		pt = DTE_FORMAT_UNDEF;
		break;
	}

	return pt;
}

static struct sk_buff *
tcb_to_skb(struct net_device *netdev, const struct tcb *cmd)
{
	struct sk_buff *skb;
	skb = alloc_skb(cmd->data_len, in_atomic() ? GFP_ATOMIC : GFP_KERNEL);
	if (skb) {
		skb->dev = netdev;
		skb_put(skb, cmd->data_len);
		memcpy(skb->data, cmd->data, cmd->data_len);
		skb->protocol = eth_type_trans(skb, netdev);
	}
	return skb;
}

/**
 * wctc4xxp_skb_to_cmd - Convert a socket buffer (skb) to a tcb
 * @wc: The transcoder that we're going to send this command to.
 * @skb: socket buffer to convert.
 *
 */
static struct tcb *
wctc4xxp_skb_to_cmd(struct wcdte *wc, const struct sk_buff *skb)
{
	const gfp_t alloc_flags = in_interrupt() ? GFP_ATOMIC : GFP_KERNEL;
	struct tcb *cmd;
	cmd = __alloc_cmd(skb->len, alloc_flags, 0);
	if (cmd) {
		int res;
		cmd->data_len = skb->len;
		res = skb_copy_bits(skb, 0, cmd->data, cmd->data_len);
		if (res) {
			dev_warn(&wc->pdev->dev,
			   "Failed call to skb_copy_bits.\n");
			free_cmd(cmd);
			cmd = NULL;
		}
	}
	return cmd;
}

#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 2, 0)
static void
wctc4xxp_net_set_multi(struct net_device *netdev)
{
	struct wcdte *wc = wcdte_from_netdev(netdev);
	DTE_DEBUG(DTE_DEBUG_GENERAL, "%s promiscuity:%d\n",
	   __func__, netdev->promiscuity);
}
#else
static void
wctc4xxp_set_rx_mode(struct net_device *netdev)
{
	struct wcdte *wc = wcdte_from_netdev(netdev);
	DTE_DEBUG(DTE_DEBUG_GENERAL, "%s promiscuity:%d\n",
	   __func__, netdev->promiscuity);
}
#endif

static int
wctc4xxp_net_up(struct net_device *netdev)
{
	struct wcdte *wc = wcdte_from_netdev(netdev);
	DTE_DEBUG(DTE_DEBUG_GENERAL, "%s\n", __func__);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
	netif_poll_enable(netdev);
#else
	napi_enable(&wc->napi);
#endif
	return 0;
}

static int
wctc4xxp_net_down(struct net_device *netdev)
{
	struct wcdte *wc = wcdte_from_netdev(netdev);
	DTE_DEBUG(DTE_DEBUG_GENERAL, "%s\n", __func__);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
	netif_poll_disable(netdev);
#else
	napi_disable(&wc->napi);
#endif
	return 0;
}

static void wctc4xxp_transmit_cmd(struct wcdte *, struct tcb *);

static int
wctc4xxp_net_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
{
	struct wcdte *wc = wcdte_from_netdev(netdev);
	struct tcb *cmd;

	/* We set DO_NOT_CAPTURE because this packet was already captured by
	 * in code higher up in the networking stack.  We don't want to
	 * capture it twice.
	 */
	cmd = wctc4xxp_skb_to_cmd(wc, skb);
	if (cmd) {
		cmd->flags |= DO_NOT_CAPTURE;
		wctc4xxp_transmit_cmd(wc, cmd);
	}

	dev_kfree_skb_any(skb);
	return NETDEV_TX_OK;
}

static int
wctc4xxp_net_receive(struct wcdte *wc, int max)
{
	int count = 0;
	struct sk_buff *skb;
	WARN_ON(0 == max);
	while ((skb = skb_dequeue(&wc->captured_packets))) {
		netif_receive_skb(skb);
		if (++count >= max)
			break;
	}
	return count;
}

#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
static int
wctc4xxp_poll(struct net_device *netdev, int *budget)
{
	struct wcdte *wc = wcdte_from_netdev(netdev);
	int count = 0;
	int quota = min(netdev->quota, *budget);

	count = wctc4xxp_net_receive(wc, quota);

	*budget -=       count;
	netdev->quota -= count;

	if (!skb_queue_len(&wc->captured_packets)) {
		netif_rx_complete(netdev);
		return 0;
	} else {
		return -1;
	}
}
#else
static int
wctc4xxp_poll(struct napi_struct *napi, int budget)
{
	struct wcdte *wc = container_of(napi, struct wcdte, napi);
	int count;

	count = wctc4xxp_net_receive(wc, budget);

	if (!skb_queue_len(&wc->captured_packets)) {
#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 29)
		netif_rx_complete(wc->netdev, &wc->napi);
#elif LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 30)
		netif_rx_complete(&wc->napi);
#else
		napi_complete(&wc->napi);
#endif
	}
	return count;
}
#endif

static struct net_device_stats *
wctc4xxp_net_get_stats(struct net_device *netdev)
{
	struct wcdte *wc = wcdte_from_netdev(netdev);
	return &wc->net_stats;
}

/* Wait until this device is put into promiscuous mode, or we timeout. */
static void
wctc4xxp_net_waitfor_promiscuous(struct wcdte *wc)
{
	unsigned int seconds = 15;
	unsigned long start = jiffies;
	struct net_device *netdev = wc->netdev;

	dev_info(&wc->pdev->dev,
	   "Waiting %d seconds for adapter to be placed in " \
	   "promiscuous mode for early trace.\n", seconds);

	while (!netdev->promiscuity) {
		if (signal_pending(current)) {
			dev_info(&wc->pdev->dev,
			   "Aborting wait due to signal.\n");
			break;
		}
		msleep(100);
		if (time_after(jiffies, start + (seconds * HZ))) {
			dev_info(&wc->pdev->dev,
			   "Aborting wait due to timeout.\n");
			break;
		}
	}
}

#ifdef HAVE_NET_DEVICE_OPS
static const struct net_device_ops wctc4xxp_netdev_ops = {
#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 2, 0)
	.ndo_set_multicast_list = &wctc4xxp_net_set_multi,
#else
	.ndo_set_rx_mode = &wctc4xxp_set_rx_mode,
#endif
	.ndo_open = &wctc4xxp_net_up,
	.ndo_stop = &wctc4xxp_net_down,
	.ndo_start_xmit = &wctc4xxp_net_hard_start_xmit,
	.ndo_get_stats = &wctc4xxp_net_get_stats,
};
#endif

/**
 * wctc4xxp_net_register - Register a new network interface.
 * @wc: transcoder card to register the interface for.
 *
 * The network interface is primarily used for debugging in order to watch the
 * traffic between the transcoder and the host.
 *
 */
static int
wctc4xxp_net_register(struct wcdte *wc)
{
	int res;
	struct net_device *netdev;
	struct wcdte_netdev_priv *priv;
	const char our_mac[] = { 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff};

#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 17, 0)
	netdev = alloc_netdev(sizeof(*priv), wc->board_name,
				NET_NAME_UNKNOWN, ether_setup);
#else
	netdev = alloc_netdev(sizeof(*priv), wc->board_name, ether_setup);
#endif

	if (!netdev)
		return -ENOMEM;
	priv = netdev_priv(netdev);
	priv->wc = wc;
	memcpy(netdev->dev_addr, our_mac, sizeof(our_mac));

#	ifdef HAVE_NET_DEVICE_OPS
	netdev->netdev_ops = &wctc4xxp_netdev_ops;
#	else
	netdev->set_multicast_list = &wctc4xxp_net_set_multi;
	netdev->open = &wctc4xxp_net_up;
	netdev->stop = &wctc4xxp_net_down;
	netdev->hard_start_xmit = &wctc4xxp_net_hard_start_xmit;
	netdev->get_stats = &wctc4xxp_net_get_stats;
#	endif

	netdev->promiscuity = 0;
	netdev->flags |= IFF_NOARP;

#	if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
	netdev->poll = &wctc4xxp_poll;
	netdev->weight = 64;
#	else
	netif_napi_add(netdev, &wc->napi, &wctc4xxp_poll, 64);
#	endif

	res = register_netdev(netdev);
	if (res) {
		dev_warn(&wc->pdev->dev,
		   "Failed to register network device %s.\n",
		   wc->board_name);
		goto error_sw;
	}

	wc->netdev = netdev;
	skb_queue_head_init(&wc->captured_packets);

	if (debug & DTE_DEBUG_NETWORK_EARLY)
		wctc4xxp_net_waitfor_promiscuous(wc);

	dev_info(&wc->pdev->dev,
	   "Created network device %s for debug.\n", wc->board_name);
	return 0;

error_sw:
	if (netdev)
		free_netdev(netdev);
	return res;
}

static void
wctc4xxp_net_unregister(struct wcdte *wc)
{
	struct sk_buff *skb;

	if (!wc->netdev)
		return;
	unregister_netdev(wc->netdev);
	while ((skb = skb_dequeue(&wc->captured_packets)))
		kfree_skb(skb);
	free_netdev(wc->netdev);
	wc->netdev = NULL;
}


/**
 * wctc4xxp_net_capture_cmd - Send a tcb to the network stack.
 * @wc: transcoder that received the command.
 * @cmd: command to send to network stack.
 *
 */
static void
wctc4xxp_net_capture_cmd(struct wcdte *wc, const struct tcb *cmd)
{
	struct sk_buff *skb;
	struct net_device *netdev = wc->netdev;

	if (!netdev)
		return;

	/* No need to capture if there isn't anyone listening. */
	if (!(netdev->flags & IFF_UP))
		return;

	if (skb_queue_len(&wc->captured_packets) > MAX_CAPTURED_PACKETS) {
		WARN_ON_ONCE(1);
		return;
	}

	skb = tcb_to_skb(netdev, cmd);
	if (!skb)
		return;

	skb_queue_tail(&wc->captured_packets, skb);
#	if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
	netif_rx_schedule(netdev);
#	elif LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 29)
	netif_rx_schedule(netdev, &wc->napi);
#	elif LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 30)
	netif_rx_schedule(&wc->napi);
#	else
	napi_schedule(&wc->napi);
#	endif
	return;
}


/*! In-memory structure shared by the host and the adapter. */
struct wctc4xxp_descriptor {
	__le32 des0;
	__le32 des1;
	__le32 buffer1;
	__le32 container; /* Unused */
} __attribute__((packed));

struct wctc4xxp_descriptor_ring {
	/* Pointer to an array of descriptors to give to hardware. */
	struct wctc4xxp_descriptor *desc;
	/* Read completed buffers from the head. */
	unsigned int 	head;
	/* Write ready buffers to the tail. */
	unsigned int 	tail;
	/* Array to save the kernel virtual address of pending commands. */
	struct tcb **pending;
	/* PCI Bus address of the descriptor list. */
	dma_addr_t	desc_dma;
	/*! either DMA_FROM_DEVICE or DMA_TO_DEVICE */
	unsigned int 	direction;
	/*! The number of buffers currently submitted to the hardware. */
	unsigned int    count;
	/*! The number of bytes to pad each descriptor for cache alignment. */
	unsigned int	padding;
	/*! Protects this structure from concurrent access. */
	spinlock_t      lock;
	/*! PCI device for the card associated with this ring. */
	struct pci_dev  *pdev;
	/*! The size of the dring. */
	unsigned long size;
	/*! Total number of packets completed. */
	unsigned long packet_count;
	/*! Total number of packets with errors. */
	unsigned long packet_errors;
};

/**
 * wctc4xxp_descriptor - Returns the desriptor at index.
 * @dr: The descriptor ring we're using.
 * @index: index of the descriptor we want.
 *
 * We need this function because we do not know what the padding on the
 * descriptors will be.  Otherwise, we would just use an array.
 */
static inline struct wctc4xxp_descriptor *
wctc4xxp_descriptor(struct wctc4xxp_descriptor_ring *dr, int index)
{
	return (struct wctc4xxp_descriptor *)((u8 *)dr->desc +
		((sizeof(*dr->desc) + dr->padding) * index));
}

static int
wctc4xxp_initialize_descriptor_ring(struct pci_dev *pdev,
	struct wctc4xxp_descriptor_ring *dr, u32 des1, unsigned int direction,
	unsigned long size)
{
	int i;
	const u32 END_OF_RING = 0x02000000;
	u8 cache_line_size = 0;
	int add_padding;
	struct wctc4xxp_descriptor *d = NULL;

	BUG_ON(!pdev);
	BUG_ON(!dr);

	if (pci_read_config_byte(pdev, 0x0c, &cache_line_size))
		return -EIO;

	memset(dr, 0, sizeof(*dr));
	dr->size = size;

	/*
	 * Add some padding to each descriptor to ensure that they are
	 * aligned on host system cache-line boundaries, but only for the
	 * cache-line sizes that we support.
	 *
	 */
	add_padding =   (0x08 == cache_line_size) ||
			(0x10 == cache_line_size) ||
			(0x20 == cache_line_size);
	if (add_padding)
		dr->padding = (cache_line_size*sizeof(u32)) - sizeof(*d);

	dr->pending = kmalloc(sizeof(struct tcb *) * dr->size, GFP_KERNEL);
	if (!dr->pending)
		return -ENOMEM;

	dr->desc = pci_alloc_consistent(pdev,
			(sizeof(*d)+dr->padding)*dr->size, &dr->desc_dma);
	if (!dr->desc) {
		kfree(dr->pending);
		return -ENOMEM;
	}

	memset(dr->desc, 0, (sizeof(*d) + dr->padding) * dr->size);
	for (i = 0; i < dr->size; ++i) {
		d = wctc4xxp_descriptor(dr, i);
		memset(d, 0, sizeof(*d));
		d->des1 = cpu_to_le32(des1);
	}

	d->des1 |= cpu_to_le32(END_OF_RING);
	dr->direction = direction;
	spin_lock_init(&dr->lock);
	dr->pdev = pdev;
	return 0;
}

#define OWN_BIT cpu_to_le32(0x80000000)
#define OWNED(_d_) (((_d_)->des0)&OWN_BIT)
#define SET_OWNED(_d_) do { wmb(); (_d_)->des0 |= OWN_BIT; wmb(); } while (0)

static const unsigned int BUFFER1_SIZE_MASK = 0x7ff;

static int
wctc4xxp_submit(struct wctc4xxp_descriptor_ring *dr, struct tcb *c)
{
	volatile struct wctc4xxp_descriptor *d;
	unsigned int len;
	unsigned long flags;

	WARN_ON(!c);
	len = (c->data_len < MIN_PACKET_LEN) ? MIN_PACKET_LEN : c->data_len;
	if (c->data_len > MAX_FRAME_SIZE) {
		WARN_ON_ONCE(!"Invalid command length passed\n");
		c->data_len = MAX_FRAME_SIZE;
	}

	spin_lock_irqsave(&dr->lock, flags);
	d = wctc4xxp_descriptor(dr, dr->tail);
	WARN_ON(!d);
	if (d->buffer1) {
		spin_unlock_irqrestore(&dr->lock, flags);
		/* Do not overwrite a buffer that is still in progress. */
		return -EBUSY;
	}
	d->des1 &= cpu_to_le32(~(BUFFER1_SIZE_MASK));
	d->des1 |= cpu_to_le32(len & BUFFER1_SIZE_MASK);
	d->buffer1 = cpu_to_le32(pci_map_single(dr->pdev, c->data,
			SFRAME_SIZE, dr->direction));

	SET_OWNED(d); /* That's it until the hardware is done with it. */
	dr->pending[dr->tail] = c;
	dr->tail = (dr->tail + 1) & (dr->size-1);
	++dr->count;
	spin_unlock_irqrestore(&dr->lock, flags);
	return 0;
}

static inline struct tcb*
wctc4xxp_retrieve(struct wctc4xxp_descriptor_ring *dr)
{
	volatile struct wctc4xxp_descriptor *d;
	struct tcb *c;
	unsigned int head = dr->head;
	unsigned long flags;
	u32 des0;
	spin_lock_irqsave(&dr->lock, flags);
	d = wctc4xxp_descriptor(dr, head);
	if (d->buffer1 && !OWNED(d)) {
		pci_unmap_single(dr->pdev, le32_to_cpu(d->buffer1),
			SFRAME_SIZE, dr->direction);
		c = dr->pending[head];
		WARN_ON(!c);
		dr->head = (++head) & (dr->size-1);
		d->buffer1 = 0;
		--dr->count;
		WARN_ON(!c);
		des0 = le32_to_cpu(d->des0);
		c->data_len = (des0 >> 16) & BUFFER1_SIZE_MASK;
		if (des0 & (1<<15)) {
			++dr->packet_errors;
			/* The upper layers won't be able to do anything with
			 * this packet. Free it up and log the error. */
			free_cmd(c);
			c = NULL;
		} else {
			++dr->packet_count;
			WARN_ON(c->data_len > SFRAME_SIZE);
		}
	} else {
		c = NULL;
	}
	spin_unlock_irqrestore(&dr->lock, flags);
	return c;
}

static inline int wctc4xxp_getcount(struct wctc4xxp_descriptor_ring *dr)
{
	int count;
	unsigned long flags;
	spin_lock_irqsave(&dr->lock, flags);
	count = dr->count;
	spin_unlock_irqrestore(&dr->lock, flags);
	return count;
}

static inline int wctc4xxp_get_packet_count(struct wctc4xxp_descriptor_ring *dr)
{
	unsigned long count;
	unsigned long flags;
	spin_lock_irqsave(&dr->lock, flags);
	count = dr->packet_count;
	spin_unlock_irqrestore(&dr->lock, flags);
	return count;
}

static inline int
wctc4xxp_get_packet_errors(struct wctc4xxp_descriptor_ring *dr)
{
	unsigned long count;
	unsigned long flags;
	spin_lock_irqsave(&dr->lock, flags);
	count = dr->packet_errors;
	spin_unlock_irqrestore(&dr->lock, flags);
	return count;
}

static inline void
wctc4xxp_set_packet_count(struct wctc4xxp_descriptor_ring *dr,
			  unsigned long count)
{
	unsigned long flags;
	spin_lock_irqsave(&dr->lock, flags);
	dr->packet_count = count;
	spin_unlock_irqrestore(&dr->lock, flags);
}

static inline void
__wctc4xxp_setctl(struct wcdte *wc, unsigned int addr, unsigned int val)
{
	writel(val, wc->iobase + addr);
	readl(wc->iobase + addr);
}

static inline unsigned int
__wctc4xxp_getctl(struct wcdte *wc, unsigned int addr)
{
	return readl(wc->iobase + addr);
}

static inline void
wctc4xxp_setctl(struct wcdte *wc, unsigned int addr, unsigned int val)
{
	unsigned long flags;
	spin_lock_irqsave(&wc->reglock, flags);
	__wctc4xxp_setctl(wc, addr, val);
	spin_unlock_irqrestore(&wc->reglock, flags);
}

static inline void
wctc4xxp_receive_demand_poll(struct wcdte *wc)
{
	__wctc4xxp_setctl(wc, 0x0010, 0x00000000);
}

static inline void
wctc4xxp_transmit_demand_poll(struct wcdte *wc)
{
	return;
# if 0
	__wctc4xxp_setctl(wc, 0x0008, 0x00000000);

	/* \todo Investigate why this register needs to be written twice in
	 * order to get it to poll reliably.  So far, most of the problems
	 * I've seen with timeouts had more to do with an untransmitted
	 * packet sitting in the outbound descriptor list as opposed to any
	 * problem with the dte firmware.
	 */
	__wctc4xxp_setctl(wc, 0x0008, 0x00000000);
#endif
}

#define LENGTH_WITH_N_PARAMETERS(__n) (((__n) * sizeof(u16)) + \
					sizeof(struct csm_encaps_cmd))

static const u8 dst_mac[6] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55};
static const u8 src_mac[6] = {0xAA, 0xBB, 0xCC, 0xDD, 0xEE, 0xFF};

static int wctc4xxp_transmit_cmd_and_wait(struct wcdte *wc, struct tcb *cmd);

static void
setup_common_header(struct wcdte *wc, struct csm_encaps_hdr *hdr)
{
	memcpy(hdr->ethhdr.h_dest, dst_mac, sizeof(dst_mac));
	memcpy(hdr->ethhdr.h_source, src_mac, sizeof(src_mac));
	hdr->ethhdr.h_proto = cpu_to_be16(ETH_P_CSM_ENCAPS);
}

static void
setup_supervisor_header(struct wcdte *wc, struct csm_encaps_hdr *hdr)
{
	setup_common_header(wc, hdr);

	hdr->op_code = cpu_to_be16(CONTROL_PACKET_OPCODE);
	hdr->control = LITTLE_ENDIAN;
	hdr->seq_num = (wc->seq_num++)&0xf;
	hdr->channel = cpu_to_be16(SUPERVISOR_CHANNEL);
}

static void
create_supervisor_cmd(struct wcdte *wc, struct tcb *cmd, u8 type, u8 class,
	u16 function, const u16 *parameters, const int num_parameters)
{
	struct csm_encaps_hdr *hdr = cmd->data;
	int i;

	if (cmd->response) {
		free_cmd(cmd->response);
		cmd->response = NULL;
	}

	setup_supervisor_header(wc, hdr);

	hdr->cmd.length =	LENGTH_WITH_N_PARAMETERS(num_parameters);
	hdr->cmd.index =	0;
	hdr->cmd.type =		type;
	hdr->cmd.class =	class;
	hdr->cmd.function =	cpu_to_le16(function);
	hdr->cmd.reserved =	0;

	for (i = 0; i < num_parameters; ++i)
		hdr->cmd.params[i] = cpu_to_le16(parameters[i]);

	cmd->flags = WAIT_FOR_RESPONSE;
	cmd->data_len = sizeof(struct csm_encaps_hdr) -
			sizeof(struct csm_encaps_cmd) +
			hdr->cmd.length;
	cmd->cpvt = NULL;
}

static void
setup_channel_header(struct channel_pvt *pvt, struct tcb *cmd)
{
	struct csm_encaps_hdr *hdr = cmd->data;

	if (cmd->response) {
		free_cmd(cmd->response);
		cmd->response = NULL;
	}

	setup_common_header(pvt->wc, hdr);
	hdr->op_code = cpu_to_be16(CONTROL_PACKET_OPCODE);
	hdr->seq_num = (pvt->cmd_seqno++)&0xf;
	hdr->channel = cpu_to_be16(pvt->chan_in_num);

	cmd->flags = WAIT_FOR_RESPONSE;
	cmd->data_len = sizeof(struct csm_encaps_hdr) -
				sizeof(struct csm_encaps_cmd);
	cmd->cpvt = pvt;
	cmd->next_index = 0;
}


static void
append_channel_cmd(struct tcb *cmd, u8 type, u8 class, u16 function,
		   const u16 *parameters, int num_parameters)
{
	int i;
	struct csm_encaps_cmd *csm_cmd = cmd->data + cmd->data_len;

	csm_cmd->length =	LENGTH_WITH_N_PARAMETERS(num_parameters);
	csm_cmd->index =	cmd->next_index++;
	csm_cmd->type =		type;
	csm_cmd->class =	class;
	csm_cmd->function =	cpu_to_le16(function);
	csm_cmd->reserved =	0;

	for (i = 0; i < num_parameters; ++i)
		csm_cmd->params[i] = cpu_to_le16(parameters[i]);

	cmd->data_len += csm_cmd->length;
	/* Pad it out to a DW boundary */
	if (cmd->data_len % 4)
		cmd->data_len += 4 - (cmd->data_len % 4);
	WARN_ON(cmd->data_len >= SFRAME_SIZE);
}

static void
create_channel_cmd(struct channel_pvt *pvt, struct tcb *cmd, u8 type, u8 class,
	u16 function, const u16 *parameters, int num_parameters)
{
	setup_channel_header(pvt, cmd);
	append_channel_cmd(cmd, type, class, function, parameters,
			   num_parameters);
}

static int
send_create_channel_cmd(struct wcdte *wc, struct tcb *cmd, u16 timeslot,
	u16 *channel_number)
{
	int res;
	const u16 parameters[] = {0x0002, timeslot};

	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, SUPVSR_CREATE_CHANNEL,
		parameters, ARRAY_SIZE(parameters));

	res = wctc4xxp_transmit_cmd_and_wait(wc, cmd);
	if (res)
		return res;

	if (0x0000 != response_header(cmd)->cmd.params[0]) {
		if (printk_ratelimit()) {
			dev_warn(&wc->pdev->dev,
				 "Failed to create channel in timeslot " \
				 "%d.  Response from DTE was (%04x).\n",
				 timeslot, response_header(cmd)->cmd.params[0]);
		}
		free_cmd(cmd->response);
		cmd->response = NULL;
		return -EIO;
	}

	*channel_number = le16_to_cpu(response_header(cmd)->cmd.params[1]);
	free_cmd(cmd->response);
	cmd->response = NULL;
	return 0;
}

static int
send_set_arm_clk_cmd(struct wcdte *wc, struct tcb *cmd)
{
	const u16 parameters[] = {0x012c, 0x0000};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0411, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
send_set_spu_clk_cmd(struct wcdte *wc, struct tcb *cmd)
{
	const u16 parameters[] = {0x012c, 0x0000};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0412, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
send_tdm_select_bus_mode_cmd(struct wcdte *wc, struct tcb *cmd)
{
	const u16 parameters[] = {0x0004};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0417, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
send_set_eth_header_cmd(struct wcdte *wc, struct tcb *cmd,
	const u8 *host_mac, const u8 *assigned_mac)
{
	u16 parameters[8];
	u16 *part;

	parameters[0] = 0x0001;
	part = (u16 *)host_mac;
	parameters[1] = part[0];
	parameters[2] = part[1];
	parameters[3] = part[2];
	part = (u16 *)assigned_mac;
	parameters[4] = part[0];
	parameters[5] = part[1];
	parameters[6] = part[2];
	parameters[7] = 0x0008;

	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0100, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
send_supvsr_setup_tdm_parms(struct wcdte *wc, struct tcb *cmd,
	u8 bus_number)
{
	const u16 parameters[] = {0x8380, 0x0c00, 0, (bus_number << 2)&0xc};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0407, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
send_ip_service_config_cmd(struct wcdte *wc, struct tcb *cmd)
{
	const u16 parameters[] = {0x0200};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0302, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
send_arp_service_config_cmd(struct wcdte *wc, struct tcb *cmd)
{
	const u16 parameters[] = {0x0001};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0105, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
send_icmp_service_config_cmd(struct wcdte *wc, struct tcb *cmd)
{
	const u16 parameters[] = {0xff01};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0304, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
send_device_set_country_code_cmd(struct wcdte *wc, struct tcb *cmd)
{
	const u16 parameters[] = {0x0000};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x041b, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
send_spu_features_control_cmd(struct wcdte *wc, struct tcb *cmd, u16 options)
{
	const u16 parameters[] = {options};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0013, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

/* Allows sending more than one CSM_ENCAPS packet in a single ethernet frame. */
static int send_csme_multi_cmd(struct wcdte *wc, struct tcb *cmd)
{
	const u16 parameters[] = {0x1};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x010a, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
send_tdm_opt_cmd(struct wcdte *wc, struct tcb *cmd)
{
	const u16 parameters[] = {0x0000};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0435, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
send_destroy_channel_cmd(struct wcdte *wc, struct tcb *cmd, u16 channel)
{
	int res;
	u16 result;
	const u16 parameters[] = {channel};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0011, parameters,
		ARRAY_SIZE(parameters));
	res = wctc4xxp_transmit_cmd_and_wait(wc, cmd);
	if (res)
		return res;
	/* Let's check the response for any error codes.... */
	result = le16_to_cpu(response_header(cmd)->cmd.params[0]);
	if (0x0000 != result) {
		dev_err(&wc->pdev->dev,
			"Failed to destroy channel %04d (%04x)\n",
			channel, result);
		return -EIO;
	}
	return 0;
}

static void
append_set_ip_hdr_channel_cmd(struct tcb *cmd)
{
	const u16 parameters[] = {0, 0x0045, 0, 0, 0x0040, 0x1180, 0,
		0xa8c0, 0x0309, 0xa8c0, 0x0309,
		swab16(cmd->cpvt->timeslot_out_num + 0x5000),
		swab16(cmd->cpvt->timeslot_in_num + 0x5000),
		0, 0};
	append_channel_cmd(cmd, CONFIG_CHANGE_TYPE, CONFIG_CHANNEL_CLASS,
		0x9000, parameters, ARRAY_SIZE(parameters));
}

static void
append_voip_vceopt_cmd(struct tcb *cmd, u16 length)
{
	const u16 parameters[] = {((length << 8)|0x21), 0x1c00,
				  0x0004, 0, 0};
	append_channel_cmd(cmd, CONFIG_CHANGE_TYPE, CONFIG_CHANNEL_CLASS,
		0x8001, parameters, ARRAY_SIZE(parameters));
}

static void
append_voip_tonectl_cmd(struct tcb *cmd)
{
	const u16 parameters[] = {0};
	append_channel_cmd(cmd, CONFIG_CHANGE_TYPE, CONFIG_CHANNEL_CLASS,
		0x805b, parameters, ARRAY_SIZE(parameters));
}

static void
append_voip_dtmfopt_cmd(struct tcb *cmd)
{
	const u16 parameters[] = {0x0008};
	append_channel_cmd(cmd, CONFIG_CHANGE_TYPE, CONFIG_CHANNEL_CLASS,
		0x8002, parameters, ARRAY_SIZE(parameters));
}

static void
append_voip_indctrl_cmd(struct tcb *cmd)
{
	const u16 parameters[] = {0x0007};
	append_channel_cmd(cmd, CONFIG_CHANGE_TYPE, CONFIG_CHANNEL_CLASS,
		0x8084, parameters, ARRAY_SIZE(parameters));
}

static void
send_voip_vopena_cmd(struct channel_pvt *pvt, struct tcb *cmd, u8 format)
{
	const u16 parameters[] = {1, ((format<<8)|0x80), 0, 0, 0,
		0x3412, 0x7856};
	create_channel_cmd(pvt, cmd, CONFIG_CHANGE_TYPE, CONFIG_CHANNEL_CLASS,
		0x8000, parameters, ARRAY_SIZE(parameters));
	wctc4xxp_transmit_cmd(pvt->wc, cmd);
}

static int
send_voip_vopena_close_cmd(struct channel_pvt *pvt, struct tcb *cmd)
{
	int res;
	const u16 parameters[] = {0};
	create_channel_cmd(pvt, cmd, CONFIG_CHANGE_TYPE, CONFIG_CHANNEL_CLASS,
		0x8000, parameters, ARRAY_SIZE(parameters));
	res = wctc4xxp_transmit_cmd_and_wait(pvt->wc, cmd);
	if (res)
		return res;
	/* Let's check the response for any error codes.... */
	if (0x0000 != response_header(cmd)->cmd.params[0]) {
		WARN_ON(1);
		return -EIO;
	}
	return 0;
}

static int
send_ip_options_cmd(struct wcdte *wc, struct tcb *cmd)
{
	const u16 parameters[] = {0x0002};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0306, parameters,
		ARRAY_SIZE(parameters));
	return wctc4xxp_transmit_cmd_and_wait(wc, cmd);
}

static int
_send_trans_connect_cmd(struct wcdte *wc, struct tcb *cmd, u16 enable, u16
	encoder_channel, u16 decoder_channel, u16 encoder_format,
	u16 decoder_format)
{
	int res;
	const u16 parameters[] = {enable, encoder_channel, encoder_format,
		decoder_channel, decoder_format};
	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x9322, parameters,
		ARRAY_SIZE(parameters));
	res = wctc4xxp_transmit_cmd_and_wait(wc, cmd);
	if (res)
		return res;

	/* Let's check the response for any error codes.... */
	if (0x0000 != response_header(cmd)->cmd.params[0]) {
		WARN_ON(1);
		return -EIO;
	}
	return 0;
}

static int
send_trans_connect_cmd(struct wcdte *wc, struct tcb *cmd, const u16
	encoder_channel, const u16 decoder_channel, const u16 encoder_format,
	const u16 decoder_format)
{
	return _send_trans_connect_cmd(wc, cmd, 1, encoder_channel,
		decoder_channel, encoder_format, decoder_format);
}

static int
send_trans_disconnect_cmd(struct wcdte *wc, struct tcb *cmd, const u16
	encoder_channel, const u16 decoder_channel, const u16 encoder_format,
	const u16 decoder_format)
{
	return _send_trans_connect_cmd(wc, cmd, 0, encoder_channel,
		decoder_channel, encoder_format, decoder_format);
}

static int
send_voip_vceinfo_cmd(struct channel_pvt *pvt, struct tcb *cmd)
{
	int res;
	const u16 parameters[] = {0};
	static const int CONFIG_CHANNEL_STATS_CLASS = 1;
	create_channel_cmd(pvt, cmd,
		VOIP_VCEINFO_TYPE, CONFIG_CHANNEL_STATS_CLASS,
		0x0000, parameters, 0);
	res = wctc4xxp_transmit_cmd_and_wait(pvt->wc, cmd);
	return res;
}

static int
send_eth_statistics_cmd(struct wcdte *wc, struct tcb *cmd)
{
	int res;
	const u16 parameters[] = {0};

	create_supervisor_cmd(wc, cmd, 0x00, 0x05, 0x0000,
		parameters, ARRAY_SIZE(parameters));
	res = wctc4xxp_transmit_cmd_and_wait(wc, cmd);
	if (res)
		return -EIO;
	if (0x0000 != response_header(cmd)->cmd.params[0]) {
		dev_info(&wc->pdev->dev,
			 "Failed to get ethernet stats: 0x%04x\n",
			 response_header(cmd)->cmd.params[0]);
		res = -EIO;
	}
	return res;
}

static void wctc4xxp_match_packet_counts(struct wcdte *wc)
{
	struct tcb *cmd  = alloc_cmd(SFRAME_SIZE);
	int res;
	u32 *parms;

	res = send_eth_statistics_cmd(wc, cmd);
	if (0 == res) {
		parms = (u32 *)(&response_header(cmd)->cmd.params[0]);
		wctc4xxp_set_packet_count(wc->rxd, parms[1]);
		wctc4xxp_set_packet_count(wc->txd, parms[2]);
	}
	free_cmd(cmd);
}

static inline u32 wctc4xxp_bytes_to_samples(u32 fmt, size_t count)
{
	switch (fmt) {
	case DAHDI_FORMAT_G723_1:
		return count * (G723_SAMPLES/G723_5K_BYTES);
	case DAHDI_FORMAT_ULAW:
	case DAHDI_FORMAT_ALAW:
		return count;
	case DAHDI_FORMAT_G729A:
		return count * (G729_SAMPLES/G729_BYTES);
	default:
		WARN_ON(1);
		return 0;
	}
}

static struct tcb *
wctc4xxp_create_rtp_cmd(struct wcdte *wc, struct dahdi_transcoder_channel *dtc,
	size_t inbytes)
{
	struct channel_pvt *cpvt = dtc->pvt;
	struct rtp_packet *packet;
	struct tcb *cmd;

	cmd = alloc_cmd(sizeof(*packet) + inbytes);
	if (!cmd)
		return NULL;

	cmd->cpvt = cpvt;
	packet = cmd->data;

	BUG_ON(cmd->data_len < sizeof(*packet));

	/* setup the ethernet header */
	memcpy(packet->ethhdr.h_dest, dst_mac, sizeof(dst_mac));
	memcpy(packet->ethhdr.h_source, src_mac, sizeof(src_mac));
	packet->ethhdr.h_proto = cpu_to_be16(ETH_P_IP);

	/* setup the IP header */
	packet->iphdr.ihl =		5;
	packet->iphdr.version =		4;
	packet->iphdr.tos =		0;
	packet->iphdr.tot_len =		cpu_to_be16(inbytes+40);
	packet->iphdr.id =		0;
	packet->iphdr.frag_off =	cpu_to_be16(0x4000);
	packet->iphdr.ttl =		64;
	packet->iphdr.protocol =	0x11; /* UDP */
	packet->iphdr.check =		0;
	packet->iphdr.saddr =		cpu_to_be32(0xc0a80903);
	packet->iphdr.daddr =		cpu_to_be32(0xc0a80903);

	packet->iphdr.check =	ip_fast_csum((void *)&packet->iphdr,
					packet->iphdr.ihl);

	/* setup the UDP header */
	packet->udphdr.source =	cpu_to_be16(cpvt->timeslot_out_num + 0x5000);
	packet->udphdr.dest =	cpu_to_be16(cpvt->timeslot_in_num + 0x5000);
	packet->udphdr.len  =	cpu_to_be16(inbytes + sizeof(struct rtphdr) +
					sizeof(struct udphdr));
	packet->udphdr.check =	0;

	/* Setup the RTP header */
	packet->rtphdr.ver =	    2;
	packet->rtphdr.padding =    0;
	packet->rtphdr.extension =  0;
	packet->rtphdr.csrc_count = 0;
	packet->rtphdr.marker =	    0;
	packet->rtphdr.type =	    wctc4xxp_dahdifmt_to_dtefmt(dtc->srcfmt);
	packet->rtphdr.seqno =	    cpu_to_be16(cpvt->seqno);
	packet->rtphdr.timestamp =  cpu_to_be32(cpvt->last_timestamp);
	packet->rtphdr.ssrc =	    cpu_to_be32(cpvt->ssrc);

	cpvt->last_timestamp +=     wctc4xxp_bytes_to_samples(dtc->srcfmt,
							      inbytes);

	WARN_ON(cmd->data_len > SFRAME_SIZE);
	return cmd;
}
static void
wctc4xxp_cleanup_descriptor_ring(struct wctc4xxp_descriptor_ring *dr)
{
	int i;
	struct wctc4xxp_descriptor *d;

	if (!dr || !dr->desc)
		return;

	for (i = 0; i < dr->size; ++i) {
		d = wctc4xxp_descriptor(dr, i);
		if (d->buffer1) {
			pci_unmap_single(dr->pdev, d->buffer1,
				SFRAME_SIZE, dr->direction);
			d->buffer1 = 0;
			/* Commands will also be sitting on the waiting for
			 * response list, so we want to make sure to delete
			 * them from that list as well. */
			list_del_init(&(dr->pending[i])->node);
			free_cmd(dr->pending[i]);
			dr->pending[i] = NULL;
		}
	}
	dr->head = 0;
	dr->tail = 0;
	dr->count = 0;
	pci_free_consistent(dr->pdev, (sizeof(*d)+dr->padding) * dr->size,
		dr->desc, dr->desc_dma);
	kfree(dr->pending);
}

static void wctc4xxp_timeout_all_commands(struct wcdte *wc)
{
	struct tcb *cmd;
	struct tcb *temp;
	unsigned long flags;
	LIST_HEAD(local_list);

	spin_lock_irqsave(&wc->cmd_list_lock, flags);
	list_splice_init(&wc->waiting_for_response_list, &local_list);
	list_splice_init(&wc->cmd_list, &local_list);
	spin_unlock_irqrestore(&wc->cmd_list_lock, flags);

	list_for_each_entry_safe(cmd, temp, &local_list, node) {
		list_del_init(&cmd->node);
		if (cmd->complete) {
			cmd->flags |= DTE_CMD_TIMEOUT;
			complete(cmd->complete);
		} else {
			free_cmd(cmd);
		}
	}
}

static void wctc4xxp_cleanup_command_list(struct wcdte *wc)
{
	struct tcb *cmd;
	unsigned long flags;
	LIST_HEAD(local_list);

	spin_lock_irqsave(&wc->cmd_list_lock, flags);
	list_splice_init(&wc->cmd_list, &local_list);
	list_splice_init(&wc->waiting_for_response_list, &local_list);
	list_splice_init(&wc->rx_list, &local_list);
	spin_unlock_irqrestore(&wc->cmd_list_lock, flags);

	while (!list_empty(&local_list)) {
		cmd = list_entry(local_list.next, struct tcb, node);
		list_del_init(&cmd->node);
		free_cmd(cmd);
	}
}

static inline bool is_rtp_packet(const struct tcb *cmd)
{
	const struct ethhdr *ethhdr = cmd->data;
	return (cpu_to_be16(ETH_P_IP) == ethhdr->h_proto);
}

static void
wctc4xxp_transmit_cmd(struct wcdte *wc, struct tcb *cmd)
{
	int res;
	unsigned long flags;

	/* If we're shutdown all commands will timeout. Just complete the
	 * command here with the timeout flag */
	if (unlikely(test_bit(DTE_SHUTDOWN, &wc->flags))) {
		if (cmd->complete) {
			cmd->flags |= DTE_CMD_TIMEOUT;
			list_del_init(&cmd->node);
			complete(cmd->complete);
		} else {
			list_del(&cmd->node);
			free_cmd(cmd);
		}
		return;
	}

	if (cmd->data_len < MIN_PACKET_LEN) {
		memset((u8 *)(cmd->data) + cmd->data_len, 0,
		       MIN_PACKET_LEN-cmd->data_len);
		cmd->data_len = MIN_PACKET_LEN;
	}
	WARN_ON(cmd->response);
	WARN_ON(cmd->flags & TX_COMPLETE);
	cmd->timeout = jiffies + HZ/4;

	spin_lock_irqsave(&wc->cmd_list_lock, flags);
	if (cmd->flags & (WAIT_FOR_ACK | WAIT_FOR_RESPONSE)) {
		if (cmd->flags & WAIT_FOR_RESPONSE) {
			/* We don't need both an ACK and a response.  Let's
			 * tell the DTE not to generate an ACK, and we'll just
			 * retry if we do not get the response within the
			 * timeout period. */
			struct csm_encaps_hdr *hdr = cmd->data;
			hdr->control |= SUPPRESS_ACK;
		}
		WARN_ON(!list_empty(&cmd->node));
		list_add_tail(&cmd->node, &wc->waiting_for_response_list);
		mod_timer(&wc->watchdog, jiffies + HZ/2);
	}
	if (!list_empty(&wc->cmd_list)) {
		if (is_rtp_packet(cmd))
			list_add_tail(&cmd->node, &wc->cmd_list);
		else
			list_move(&cmd->node, &wc->cmd_list);
		spin_unlock_irqrestore(&wc->cmd_list_lock, flags);
		return;
	}
	res = wctc4xxp_submit(wc->txd, cmd);
	if (-EBUSY == res) {
		/* Looks like we're out of room in the descriptor
		 * ring.  We'll add this command to the pending list
		 * and the interrupt service routine will pull from
		 * this list as it clears up room in the descriptor
		 * ring. */
		list_move_tail(&cmd->node, &wc->cmd_list);
	} else if (0 == res) {
		if (!(cmd->flags & DO_NOT_CAPTURE))
			wctc4xxp_net_capture_cmd(wc, cmd);
		wctc4xxp_transmit_demand_poll(wc);
	} else {
		/* Unknown return value... */
		WARN_ON(1);
	}
	spin_unlock_irqrestore(&wc->cmd_list_lock, flags);
}

static int
wctc4xxp_transmit_cmd_and_wait(struct wcdte *wc, struct tcb *cmd)
{
	DECLARE_COMPLETION_ONSTACK(done);
	cmd->complete = &done;
	wctc4xxp_transmit_cmd(wc, cmd);
	wait_for_completion(&done);
	cmd->complete = NULL;
	if (cmd->flags & DTE_CMD_TIMEOUT) {
		DTE_DEBUG(DTE_DEBUG_GENERAL, "Timeout waiting for command.\n");
		return -EIO;
	}
	return 0;
}

static int wctc4xxp_create_channel_pair(struct wcdte *wc,
		struct channel_pvt *cpvt, u8 simple, u8 complicated);
static int wctc4xxp_destroy_channel_pair(struct wcdte *wc,
		struct channel_pvt *cpvt);

static void
wctc4xxp_init_state(struct channel_pvt *cpvt, int encoder,
	unsigned int channel, struct wcdte *wc)
{
	memset(cpvt, 0, sizeof(*cpvt));
	cpvt->encoder = encoder;
	cpvt->wc = wc;
	cpvt->chan_in_num = INVALID;
	cpvt->chan_out_num = INVALID;
	cpvt->ssrc = 0x78;
	cpvt->timeslot_in_num = channel*2;
	cpvt->timeslot_out_num = channel*2;
	cpvt->last_rx_seq_num = 0xff;
	if (encoder)
		++cpvt->timeslot_out_num;
	else
		++cpvt->timeslot_in_num;
	spin_lock_init(&cpvt->lock);
	INIT_LIST_HEAD(&cpvt->rx_queue);
}

static unsigned int
wctc4xxp_getctl(struct wcdte *wc, unsigned int addr)
{
	unsigned int val;
	unsigned long flags;
	spin_lock_irqsave(&wc->reglock, flags);
	val = __wctc4xxp_getctl(wc, addr);
	spin_unlock_irqrestore(&wc->reglock, flags);
	return val;
}

static void
wctc4xxp_cleanup_channel_private(struct wcdte *wc,
	struct dahdi_transcoder_channel *dtc)
{
	struct tcb *cmd, *temp;
	struct channel_pvt *cpvt = dtc->pvt;
	unsigned long flags;
	LIST_HEAD(local_list);

	/* Once we cleanup this channel, we do not want any queued packets
	 * waiting to be transmitted. Anything on the hardware descriptor ring
	 * will be flushed by the csm_encaps command to shutdown the channel. */
	spin_lock_irqsave(&wc->cmd_list_lock, flags);
	list_for_each_entry_safe(cmd, temp, &wc->cmd_list, node) {
		if (cmd->cpvt == cpvt)
			list_move(&cmd->node, &local_list);
	}
	spin_unlock_irqrestore(&wc->cmd_list_lock, flags);

	spin_lock_irqsave(&cpvt->lock, flags);
	list_splice_init(&cpvt->rx_queue, &local_list);
	dahdi_tc_clear_data_waiting(dtc);
	cpvt->samples_in_flight = 0;
	spin_unlock_irqrestore(&cpvt->lock, flags);

	memset(&cpvt->stats, 0, sizeof(cpvt->stats));
	list_for_each_entry_safe(cmd, temp, &local_list, node) {
		list_del(&cmd->node);
		free_cmd(cmd);
	}
}

static void
wctc4xxp_mark_channel_complement_built(struct wcdte *wc,
	struct dahdi_transcoder_channel *dtc)
{
	int index;
	struct channel_pvt *cpvt = dtc->pvt;
	struct dahdi_transcoder_channel *compl_dtc;
	struct channel_pvt *compl_cpvt;

	BUG_ON(!cpvt);
	index = cpvt->timeslot_in_num/2;
	BUG_ON(index >= wc->numchannels);
	if (cpvt->encoder)
		compl_dtc = &(wc->udecode->channels[index]);
	else
		compl_dtc = &(wc->uencode->channels[index]);

	/* It shouldn't already have been built... */
	WARN_ON(dahdi_tc_is_built(compl_dtc));
	compl_dtc->built_fmts = dtc->dstfmt | dtc->srcfmt;
	compl_cpvt = compl_dtc->pvt;
	DTE_DEBUG(DTE_DEBUG_CHANNEL_SETUP,
		"dtc: %p is the complement to %p\n", compl_dtc, dtc);
	compl_cpvt->chan_in_num = cpvt->chan_out_num;
	compl_cpvt->chan_out_num = cpvt->chan_in_num;
	dahdi_tc_set_built(compl_dtc);
	wctc4xxp_cleanup_channel_private(wc, dtc);
}

static int
do_channel_allocate(struct dahdi_transcoder_channel *dtc)
{
	struct channel_pvt *cpvt = dtc->pvt;
	struct wcdte *wc = cpvt->wc;
	u8 wctc4xxp_srcfmt; /* Digium Transcoder Engine Source Format */
	u8 wctc4xxp_dstfmt; /* Digium Transcoder Engine Dest Format */
	int res;

	/* Check again to see if the channel was built after grabbing the
	 * channel lock, in case the previous holder of the lock
	 * built this channel as a complement to itself. */
	if (dahdi_tc_is_built(dtc)) {
		DTE_DEBUG(DTE_DEBUG_CHANNEL_SETUP,
		  "Allocating channel %p which is already built.\n", dtc);
		return 0;
	}

	DTE_DEBUG(DTE_DEBUG_CHANNEL_SETUP,
		"Entering %s for channel %p.\n", __func__, dtc);
	/* Anything on the rx queue now is old news... */
	wctc4xxp_cleanup_channel_private(wc, dtc);
	DTE_DEBUG(DTE_DEBUG_CHANNEL_SETUP,
		"Allocating a new channel: %p.\n", dtc);
	wctc4xxp_srcfmt = wctc4xxp_dahdifmt_to_dtefmt(dtc->srcfmt);
	wctc4xxp_dstfmt = wctc4xxp_dahdifmt_to_dtefmt(dtc->dstfmt);
	res = wctc4xxp_create_channel_pair(wc, cpvt, wctc4xxp_srcfmt,
		wctc4xxp_dstfmt);
	if (res) {
		dev_err(&wc->pdev->dev, "Failed to create channel pair.\n");
		/* A failure to create a channel pair is normally a critical
		 * error in the firmware state. Reload the firmware when this
		 * handle is closed. */
		set_bit(DTE_RELOAD, &wc->flags);
		set_bit(DTE_SHUTDOWN, &wc->flags);
		return res;
	}
	/* Mark this channel as built */
	dahdi_tc_set_built(dtc);
	dtc->built_fmts = dtc->dstfmt | dtc->srcfmt;
	DTE_DEBUG(DTE_DEBUG_CHANNEL_SETUP,
	  "Channel %p has dstfmt=%x and srcfmt=%x\n", dtc, dtc->dstfmt,
	  dtc->srcfmt);
	/* Mark the channel complement (other half of encoder/decoder pair) as
	 * built */
	wctc4xxp_mark_channel_complement_built(wc, dtc);
	dahdi_transcoder_alert(dtc);
	return 0;
}

static void
wctc4xxp_setintmask(struct wcdte *wc, unsigned int intmask)
{
	wc->intmask = intmask;
	wctc4xxp_setctl(wc, 0x0038, intmask);
}

static const u32 DEFAULT_INTERRUPTS = 0x0001a0c0;

static void
wctc4xxp_enable_interrupts(struct wcdte *wc)
{
	wctc4xxp_setintmask(wc, DEFAULT_INTERRUPTS);
}

static void
wctc4xxp_disable_interrupts(struct wcdte *wc)
{
	/* Disable interrupts */
	wctc4xxp_setintmask(wc, 0x00000000);
	wctc4xxp_setctl(wc, 0x0084, 0x00000000);
}

static void
wctc4xxp_enable_polling(struct wcdte *wc)
{
	set_bit(DTE_POLLING, &wc->flags);
	wctc4xxp_setctl(wc, 0x0058, 0x10003);
	/* Enable the general purpose timer interrupt. */
	wctc4xxp_setintmask(wc, (DEFAULT_INTERRUPTS | (1 << 11)) & ~0x41);
}

static int wctc4xxp_reset_driver_state(struct wcdte *wc);

static bool wctc4xxp_need_firmware_reload(struct wcdte *wc)
{
	return !!test_bit(DTE_RELOAD, &wc->flags) &&
		(1 == wc->open_channels);
}

static int wctc4xxp_reload_firmware(struct wcdte *wc)
{
	int res;
	clear_bit(DTE_SHUTDOWN, &wc->flags);
	res = wctc4xxp_reset_driver_state(wc);
	if (res)
		set_bit(DTE_SHUTDOWN, &wc->flags);
	else
		clear_bit(DTE_RELOAD, &wc->flags);
	return res;
}

static int
wctc4xxp_operation_allocate(struct dahdi_transcoder_channel *dtc)
{
	int res = 0;
	struct wcdte *wc = ((struct channel_pvt *)(dtc->pvt))->wc;

#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
	mutex_lock(&wc->chanlock);
#else
	res = mutex_lock_killable(&wc->chanlock);
	if (res)
		return res;
#endif

	++wc->open_channels;

	if (test_bit(DTE_SHUTDOWN, &wc->flags)) {
		res = -EIO;
		if (wctc4xxp_need_firmware_reload(wc)) 
			res = wctc4xxp_reload_firmware(wc);
	} else if (wctc4xxp_need_firmware_reload(wc)) {
		res = wctc4xxp_reload_firmware(wc);
	}

	if (res)
		goto error_exit;

	if (wc->open_channels > POLLING_CALL_THRESHOLD) {
		if (!test_bit(DTE_POLLING, &wc->flags))
			wctc4xxp_enable_polling(wc);
	}

	if (dahdi_tc_is_built(dtc)) {
		DTE_DEBUG(DTE_DEBUG_CHANNEL_SETUP,
		  "Allocating channel %p which is already built.\n", dtc);
		res = 0;
	} else {
		res = do_channel_allocate(dtc);
	}

error_exit:
	mutex_unlock(&wc->chanlock);
	return res;
}

static void
wctc4xxp_disable_polling(struct wcdte *wc)
{
	clear_bit(DTE_POLLING, &wc->flags);
	wctc4xxp_setctl(wc, 0x0058, 0x0);
	wctc4xxp_enable_interrupts(wc);
}

static void wctc4xxp_check_for_rx_errors(struct wcdte *wc)
{
	/* get_packet_errors() returns the accumulated total errors */
	unsigned long errors = wctc4xxp_get_packet_errors(wc->rxd);

	/* Print warning when the number of errors changes */
	if (wc->reported_packet_errors != errors) {
		if (printk_ratelimit()) {
			dev_err(&wc->pdev->dev,
				"%lu errored receive packets.\n",
				errors - wc->reported_packet_errors);
			wc->reported_packet_errors = errors;
		}
	}
}

static int
wctc4xxp_operation_release(struct dahdi_transcoder_channel *dtc)
{
	int res = 0;
	int index;
	/* This is the 'complimentary channel' to dtc.  I.e., if dtc is an
	 * encoder, compl_dtc is the decoder and vice-versa */
	struct dahdi_transcoder_channel *compl_dtc;
	struct channel_pvt *compl_cpvt;
	struct channel_pvt *cpvt = dtc->pvt;
	struct wcdte *wc = cpvt->wc;
	int packets_received, packets_sent;

	BUG_ON(!cpvt);
	BUG_ON(!wc);

#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
	mutex_lock(&wc->chanlock);
#else
	res = mutex_lock_killable(&wc->chanlock);
	if (res)
		return res;
#endif

	if (test_bit(DTE_SHUTDOWN, &wc->flags)) {
		/* On shutdown, if we reload the firmware we will reset the
		 * state of all the channels. Therefore we do not want to
		 * process any of the channel release logic even if the firmware
		 * was reloaded successfully. */
		if (wctc4xxp_need_firmware_reload(wc)) 
			wctc4xxp_reload_firmware(wc);
		res = -EIO;
	} else if (wctc4xxp_need_firmware_reload(wc)) {
		wctc4xxp_reload_firmware(wc);
		res = -EIO;
	}

	if (wc->open_channels) {
		--wc->open_channels;

#if !defined(CONFIG_WCTC4XXP_POLLING)
		if (wc->open_channels < POLLING_CALL_THRESHOLD) {
			if (test_bit(DTE_POLLING, &wc->flags))
				wctc4xxp_disable_polling(wc);
		}
#endif
	}

	if (res)
		goto error_exit;

	packets_received = atomic_read(&cpvt->stats.packets_received);
	packets_sent = atomic_read(&cpvt->stats.packets_sent);

	DTE_DEBUG(DTE_DEBUG_ETH_STATS,
		"%s channel %d sent %d packets and received %d packets.\n",
		(cpvt->encoder) ?  "encoder" : "decoder", cpvt->chan_out_num,
		packets_sent, packets_received);


	/* Remove any packets that are waiting on the outbound queue. */
	dahdi_tc_clear_busy(dtc);
	wctc4xxp_cleanup_channel_private(wc, dtc);
	index = cpvt->timeslot_in_num/2;
	BUG_ON(index >= wc->numchannels);
	if (cpvt->encoder)
		compl_dtc = &(wc->udecode->channels[index]);
	else
		compl_dtc = &(wc->uencode->channels[index]);
	BUG_ON(!compl_dtc);
	if (!dahdi_tc_is_built(compl_dtc)) {
		DTE_DEBUG(DTE_DEBUG_CHANNEL_SETUP,
			"Releasing a channel that was never built.\n");
		res = 0;
		goto error_exit;
	}
	/* If the channel complement (other half of the encoder/decoder pair) is
	 * being used. */
	if (dahdi_tc_is_busy(compl_dtc)) {
		res = 0;
		goto error_exit;
	}
	res = wctc4xxp_destroy_channel_pair(wc, cpvt);
	if (res)
		goto error_exit;

	DTE_DEBUG(DTE_DEBUG_CHANNEL_SETUP, "Releasing channel: %p\n", dtc);
	/* Mark this channel as not built */
	dahdi_tc_clear_built(dtc);
	dtc->built_fmts = 0;
	cpvt->chan_in_num = INVALID;
	cpvt->chan_out_num = INVALID;
	/* Mark the channel complement as not built */
	dahdi_tc_clear_built(compl_dtc);
	compl_dtc->built_fmts = 0;
	compl_cpvt = compl_dtc->pvt;
	compl_cpvt->chan_in_num = INVALID;
	compl_cpvt->chan_out_num = INVALID;

	wctc4xxp_check_for_rx_errors(wc);

error_exit:
	mutex_unlock(&wc->chanlock);
	return res;
}

static inline struct tcb*
get_ready_cmd(struct dahdi_transcoder_channel *dtc)
{
	struct channel_pvt *cpvt = dtc->pvt;
	struct tcb *cmd;
	unsigned long flags;
	spin_lock_irqsave(&cpvt->lock, flags);
	if (!list_empty(&cpvt->rx_queue)) {
		WARN_ON(!dahdi_tc_is_data_waiting(dtc));
		cmd = list_entry(cpvt->rx_queue.next, struct tcb, node);
		list_del_init(&cmd->node);
	} else {
		cmd = NULL;
	}
	if (list_empty(&cpvt->rx_queue))
		dahdi_tc_clear_data_waiting(dtc);
	spin_unlock_irqrestore(&cpvt->lock, flags);
	return cmd;
}

static int
wctc4xxp_handle_receive_ring(struct wcdte *wc)
{
	struct tcb *cmd;
	unsigned long flags;
	unsigned int count = 0;

	/* If we can't grab this lock, another thread must already be checking
	 * the receive ring...so we should just finish up, and we'll try again
	 * later. */
#if defined(spin_trylock_irqsave)
	if (!spin_trylock_irqsave(&wc->rx_lock, flags))
		return 0;
#else
	if (spin_is_locked(&wc->rx_lock))
		return 0;
	spin_lock_irqsave(&wc->rx_lock, flags);
#endif

	while ((cmd = wctc4xxp_retrieve(wc->rxd))) {
		++count;
		spin_lock(&wc->rx_list_lock);
		list_add_tail(&cmd->node, &wc->rx_list);
		spin_unlock(&wc->rx_list_lock);
		cmd = __alloc_cmd(SFRAME_SIZE, GFP_ATOMIC, 0);
		if (!cmd) {
			dev_err(&wc->pdev->dev,
				"Out of memory in %s.\n", __func__);
		} else {
			if (wctc4xxp_submit(wc->rxd, cmd)) {
				dev_err(&wc->pdev->dev, "Failed submit in %s\n",
					__func__);
				free_cmd(cmd);
			}
		}
	}
	spin_unlock_irqrestore(&wc->rx_lock, flags);
	return count;
}

/* Called with a buffer in which to copy a transcoded frame. */
static ssize_t
wctc4xxp_read(struct file *file, char __user *frame, size_t count, loff_t *ppos)
{
	ssize_t ret;
	struct dahdi_transcoder_channel *dtc = file->private_data;
	struct channel_pvt *cpvt = dtc->pvt;
	struct wcdte *wc = cpvt->wc;
	struct tcb *cmd;
	struct rtp_packet *packet;
	ssize_t payload_bytes;
	ssize_t returned_bytes = 0;
	unsigned long flags;

	BUG_ON(!dtc);
	BUG_ON(!cpvt);

	if (unlikely(test_bit(DTE_SHUTDOWN, &wc->flags))) {
		/* The shudown flags can also be set if there is a
		 * catastrophic failure. */
		return -EIO;
	}

	cmd = get_ready_cmd(dtc);
	if (!cmd) {
		if (file->f_flags & O_NONBLOCK)
			return -EAGAIN;
		ret = wait_event_interruptible(dtc->ready,
				dahdi_tc_is_data_waiting(dtc));
		if (-ERESTARTSYS == ret)
			return -EINTR;
		/* List went not empty. */
		cmd = get_ready_cmd(dtc);
	}

	do {
		BUG_ON(!cmd);
		packet = cmd->data;

		payload_bytes = be16_to_cpu(packet->udphdr.len) -
					sizeof(struct rtphdr) -
					sizeof(struct udphdr);

		if (count < (payload_bytes + returned_bytes)) {
			if (returned_bytes) {
				/* If we have already returned at least one
				 * packets worth of data, we'll add this next
				 * packet to the head of the receive queue so
				 * it will be picked up next time. */
				spin_lock_irqsave(&cpvt->lock, flags);
				list_add(&cmd->node, &cpvt->rx_queue);
				dahdi_tc_set_data_waiting(dtc);
				spin_unlock_irqrestore(&cpvt->lock, flags);
				return returned_bytes;
			}

			if (printk_ratelimit()) {
				dev_err(&wc->pdev->dev,
				  "Cannot copy %zd bytes into %zd byte user " \
				  "buffer.\n", payload_bytes, count);
			}
			free_cmd(cmd);
			return -EFBIG;
		}

		atomic_inc(&cpvt->stats.packets_received);

		ret = copy_to_user(&frame[returned_bytes],
				   &packet->payload[0], payload_bytes);
		if (unlikely(ret)) {
			dev_err(&wc->pdev->dev, "Failed to copy data in %s\n",
				   __func__);
			free_cmd(cmd);
			return -EFAULT;
		}

		returned_bytes += payload_bytes;

		free_cmd(cmd);

	} while ((cmd = get_ready_cmd(dtc)));

	return returned_bytes;
}

/* Called with a frame in the srcfmt to be transcoded into the dstfmt. */
static ssize_t
wctc4xxp_write(struct file *file, const char __user *frame,
	size_t count, loff_t *ppos)
{
	struct dahdi_transcoder_channel *dtc = file->private_data;
	struct channel_pvt *cpvt = dtc->pvt;
	struct wcdte *wc = cpvt->wc;
	struct tcb *cmd;
	u32 samples;
	unsigned long flags;
	const unsigned long MAX_SAMPLES_IN_FLIGHT = 640;
	const unsigned long MAX_RTP_PAYLOAD = 500;

	BUG_ON(!cpvt);
	BUG_ON(!wc);

	if (unlikely(test_bit(DTE_SHUTDOWN, &wc->flags)))
		return -EIO;

	if (!test_bit(DAHDI_TC_FLAG_CHAN_BUILT, &dtc->flags))
		return -EAGAIN;

	if (count < 2) {
		DTE_DEBUG(DTE_DEBUG_GENERAL,
		   "Cannot request to transcode a packet that is less than " \
		   "2 bytes.\n");
		return -EINVAL;
	}

	if (count > MAX_RTP_PAYLOAD) {
		DTE_DEBUG(DTE_DEBUG_GENERAL,
		   "Cannot transcode packet of %Zu bytes. This exceeds the maximum size of %lu bytes.\n",
		   count, MAX_RTP_PAYLOAD);
		return -EINVAL;
	}

	if (DAHDI_FORMAT_G723_1 == dtc->srcfmt) {
		if ((G723_5K_BYTES != count) && (G723_6K_BYTES != count) &&
		    (G723_SID_BYTES != count)) {
			DTE_DEBUG(DTE_DEBUG_GENERAL,
			   "Trying to transcode packet into G723 format " \
			   "that is %Zu bytes instead of the expected " \
			   "%d/%d/%d bytes.\n", count, G723_5K_BYTES,
			   G723_6K_BYTES, G723_SID_BYTES);
			return -EINVAL;
		}
	}

	/* Do not flood the firmware with packets. This can result in out of
	 * memory conditions in the firmware. */
	spin_lock_irqsave(&cpvt->lock, flags);
	if (time_after(jiffies, cpvt->send_time)) {
		cpvt->samples_in_flight = max(0L,
					      cpvt->samples_in_flight - 160L);
	}
	samples = wctc4xxp_bytes_to_samples(dtc->srcfmt, count);
	if ((cpvt->samples_in_flight + samples) > MAX_SAMPLES_IN_FLIGHT) {
		spin_unlock_irqrestore(&cpvt->lock, flags);
		/* This should most likely be an error, but it results in
		 * codec_dahdi spamming when it's not set to wait for new
		 * packets. Instead we will silently drop the bytes. */
		return count;
	}
	cpvt->send_time = jiffies + msecs_to_jiffies(20);
	spin_unlock_irqrestore(&cpvt->lock, flags);

	cmd = wctc4xxp_create_rtp_cmd(wc, dtc, count);
	if (!cmd)
		return -ENOMEM;
	/* Copy the data directly from user space into the command buffer. */
	if (copy_from_user(&((struct rtp_packet *)(cmd->data))->payload[0],
		frame, count)) {
		dev_err(&wc->pdev->dev,
			"Failed to copy packet from userspace.\n");
		free_cmd(cmd);
		return -EFAULT;
	}
	cpvt->seqno += 1;

	DTE_DEBUG(DTE_DEBUG_RTP_TX,
	    "Sending packet of %Zu byte on channel (%p).\n", count, dtc);

	atomic_inc(&cpvt->stats.packets_sent);
	wctc4xxp_transmit_cmd(wc, cmd);

	return count;
}

static void
wctc4xxp_send_ack(struct wcdte *wc, u8 seqno, __be16 channel, __le16 function)
{
	struct tcb *cmd;
	struct csm_encaps_hdr *hdr;
	cmd = __alloc_cmd(sizeof(*hdr), ALLOC_FLAGS, 0);
	if (!cmd) {
		WARN_ON(1);
		return;
	}
	hdr = cmd->data;
	BUG_ON(sizeof(*hdr) > cmd->data_len);
	setup_common_header(wc, hdr);
	hdr->op_code = cpu_to_be16(0x0001);
	hdr->seq_num = seqno;
	hdr->control = 0xe0;
	hdr->channel = channel;
	hdr->cmd.function = function;

	wctc4xxp_transmit_cmd(wc, cmd);
}


static void do_rx_response_packet(struct wcdte *wc, struct tcb *cmd)
{
	struct csm_encaps_hdr *rxhdr;
	const struct csm_encaps_hdr *listhdr;
	struct tcb *pos, *temp;
	unsigned long flags;
	bool handled = false;
	rxhdr = cmd->data;

	/* Check if duplicated response on the supervisor channel. */
	if (SUPERVISOR_CHANNEL == rxhdr->channel) {
		if (rxhdr->seq_num == wc->last_rx_seq_num) {
			free_cmd(cmd);
			return;
		}
		wc->last_rx_seq_num = rxhdr->seq_num;
	}

	spin_lock_irqsave(&wc->cmd_list_lock, flags);
	list_for_each_entry_safe(pos, temp,
		&wc->waiting_for_response_list, node) {
		listhdr = pos->data;
		if ((listhdr->cmd.function == rxhdr->cmd.function) &&
		    (listhdr->channel == rxhdr->channel)) {

			/* If this is a channel command, do not complete it if
			 * the seq_num is the same as previous. */
			if (pos->cpvt) {
				if (rxhdr->seq_num ==
				    pos->cpvt->last_rx_seq_num) {
					break;
				}
				pos->cpvt->last_rx_seq_num = rxhdr->seq_num;
			}

			list_del_init(&pos->node);
			pos->flags &= ~(WAIT_FOR_RESPONSE);
			pos->response = cmd;
			/* If this isn't TX_COMPLETE yet, then this packet will
			 * be completed in service_tx_ring. */
			if (pos->flags & TX_COMPLETE && pos->complete)
				complete(pos->complete);
			handled = true;

			break;
		}
	}
	spin_unlock_irqrestore(&wc->cmd_list_lock, flags);

	if (!handled) {
		DTE_DEBUG(DTE_DEBUG_GENERAL,
			"Freeing unhandled response ch:(%04x)\n",
			be16_to_cpu(rxhdr->channel));
		free_cmd(cmd);
	}
}

static void
do_rx_ack_packet(struct wcdte *wc, struct tcb *cmd)
{
	const struct csm_encaps_hdr *listhdr, *rxhdr;
	struct tcb *pos, *temp;
	unsigned long flags;

	rxhdr = cmd->data;

	spin_lock_irqsave(&wc->cmd_list_lock, flags);
	list_for_each_entry_safe(pos, temp,
		&wc->waiting_for_response_list, node) {
		listhdr = pos->data;
		if (cpu_to_be16(0xefed) == listhdr->ethhdr.h_proto) {
			wc->seq_num = (rxhdr->seq_num + 1) & 0xff;
			WARN_ON(!(pos->complete));
			WARN_ON(!(pos->flags & TX_COMPLETE));
			list_del_init(&pos->node);
			if (pos->complete)
				complete(pos->complete);
		} else if ((listhdr->seq_num == rxhdr->seq_num) &&
			   (listhdr->channel == rxhdr->channel)) {
			if (pos->flags & WAIT_FOR_RESPONSE) {
				pos->flags &= ~(WAIT_FOR_ACK);
			} else {
				list_del_init(&pos->node);

				if (pos->complete) {
					WARN_ON(!(pos->flags & TX_COMPLETE));
					complete(pos->complete);
				} else {
					free_cmd(pos);
				}
			}
			break;
		}
	}
	spin_unlock_irqrestore(&wc->cmd_list_lock, flags);

	/* There is never a reason to store up the ack packets. */
	free_cmd(cmd);
}

static inline int
is_response(const struct csm_encaps_hdr *hdr)
{
	return ((0x02 == hdr->cmd.type) ||
		(0x04 == hdr->cmd.type) ||
		(0x0e == hdr->cmd.type) ||
		(0x00 == hdr->cmd.type)) ? 1 : 0;
}

static void
print_command(struct wcdte *wc, const struct csm_encaps_hdr *hdr)
{
	int i, curlength;
	char *buffer;
	const int BUFFER_SIZE = 1024;
	int parameters = ((hdr->cmd.length - 8)/sizeof(__le16));

	buffer = kzalloc(BUFFER_SIZE + 1, GFP_ATOMIC);
	if (!buffer) {
		dev_info(&wc->pdev->dev, "Failed print_command\n");
		return;
	}
	curlength = snprintf(buffer, BUFFER_SIZE,
		"opcode: %04x seq: %02x control: %02x "
		"channel: %04x ", be16_to_cpu(hdr->op_code),
		hdr->seq_num, hdr->control, be16_to_cpu(hdr->channel));
	curlength += snprintf(buffer + curlength, BUFFER_SIZE - curlength,
		"length: %02x index: %02x type: %02x "
		"class: %02x function: %04x",
		hdr->cmd.length, hdr->cmd.index, hdr->cmd.type, hdr->cmd.class,
		le16_to_cpu(hdr->cmd.function));
	for (i = 0; i < parameters; ++i) {
		curlength += snprintf(buffer + curlength,
			BUFFER_SIZE - curlength, " %04x",
			le16_to_cpu(hdr->cmd.params[i]));
	}
	dev_info(&wc->pdev->dev, "%s\n", buffer);
	kfree(buffer);
}

static inline void wctc4xxp_reset_processor(struct wcdte *wc)
{
	wctc4xxp_setctl(wc, 0x00A0, 0x04000000);
}


static void handle_csm_alert(struct wcdte *wc,
			      const struct csm_encaps_hdr *hdr)
{
	const struct csm_encaps_cmd *c = &hdr->cmd;
	if (c->function == 0x0000) {
		u16 alert_type = le16_to_cpu(c->params[0]);
		u16 action_required = le16_to_cpu(c->params[1]) >> 8;
		const bool fatal_error = action_required != 0;

		dev_err(&wc->pdev->dev,
			"Received alert (0x%04x) from dsp. Firmware will be reloaded when possible.\n",
			alert_type);

		if (fatal_error) {
			/* If any fatal errors are reported we'll just shut
			 * everything down so that we do not hang up any user
			 * process trying to wait for commands to complete. */
			wctc4xxp_reset_processor(wc);
			set_bit(DTE_RELOAD, &wc->flags);
			set_bit(DTE_SHUTDOWN, &wc->flags);
			wctc4xxp_timeout_all_commands(wc);
		} else {
			/* For non-fatal errors we'll try to proceed and reload
			 * the firmware when all open channels are closed. This
			 * will prevent impacting any normal calls in progress.
			 *
			 */
			set_bit(DTE_RELOAD, &wc->flags);
		}
	} else {
		if (debug) {
			dev_warn(&wc->pdev->dev,
				 "Received diagnostic message:\n");
		}
	}

	if (debug) {
		print_command(wc, hdr);
	}
}

static void
receive_csm_encaps_packet(struct wcdte *wc, struct tcb *cmd)
{
	const struct csm_encaps_hdr *hdr = cmd->data;
	const struct csm_encaps_cmd *c = &hdr->cmd;

	if (!(hdr->control & MESSAGE_PACKET)) {
		const bool suppress_ack = ((hdr->control & SUPPRESS_ACK) > 0);

		if (!suppress_ack) {
			wctc4xxp_send_ack(wc, hdr->seq_num, hdr->channel,
					  c->function);
		}

		if (is_response(hdr)) {

			do_rx_response_packet(wc, cmd);

		} else if (0xc1 == c->type) {

			if (0x75 == c->class) {
				dev_warn(&wc->pdev->dev,
				   "Received alert (0x%04x) from dsp\n",
				   le16_to_cpu(c->params[0]));
			}
			free_cmd(cmd);
		} else if (0xd4 == c->type) {
			if (c->params[0] != le16_to_cpu(0xffff)) {
				dev_warn(&wc->pdev->dev,
				   "DTE Failed self test (%04x).\n",
				   le16_to_cpu(c->params[0]));
			} else if ((c->params[1] != le16_to_cpu(0x000c)) &&
				(c->params[1] != le16_to_cpu(0x010c))) {
				dev_warn(&wc->pdev->dev,
				   "Unexpected ERAM status (%04x).\n",
				   le16_to_cpu(c->params[1]));
			} else {
				wctc4xxp_set_ready(wc);
				wake_up(&wc->waitq);
			}
			free_cmd(cmd);
		} else if (MONITOR_LIVE_INDICATION_TYPE == c->type) {
			handle_csm_alert(wc, hdr);
			free_cmd(cmd);
		} else {
			dev_warn(&wc->pdev->dev,
				 "Unknown command type received. %02x\n",
				 c->type);
			free_cmd(cmd);
		}
	} else {
		do_rx_ack_packet(wc, cmd);
	}
}

static void
queue_rtp_packet(struct wcdte *wc, struct tcb *cmd)
{
	unsigned index;
	struct dahdi_transcoder_channel *dtc;
	struct channel_pvt *cpvt;
	struct rtp_packet *packet = cmd->data;
	unsigned long flags;
	long samples;

	if (unlikely(ip_fast_csum((void *)(&packet->iphdr),
		packet->iphdr.ihl))) {
		DTE_DEBUG(DTE_DEBUG_GENERAL,
			"Invalid checksum in RTP packet %04x\n",
			ip_fast_csum((void *)(&packet->iphdr),
			packet->iphdr.ihl));
		free_cmd(cmd);
		return;
	}

	index = (be16_to_cpu(packet->udphdr.dest) - 0x5000) / 2;
	if (unlikely(!(index < wc->numchannels))) {
		dev_err(&wc->pdev->dev,
		  "Invalid channel number in response from DTE.\n");
		free_cmd(cmd);
		return;
	}

	switch (packet->rtphdr.type) {
	case 0x00:
	case 0x08:
		dtc = &(wc->udecode->channels[index]);
		break;
	case 0x04:
	case 0x12:
		dtc = &(wc->uencode->channels[index]);
		break;
	default:
		dev_err(&wc->pdev->dev, "Unknown codec in packet (0x%02x).\n",\
			packet->rtphdr.type);
		free_cmd(cmd);
		return;
	}

	cpvt = dtc->pvt;
	if (!dahdi_tc_is_busy(dtc)) {
		free_cmd(cmd);
		return;
	}

	spin_lock_irqsave(&cpvt->lock, flags);
	samples = wctc4xxp_bytes_to_samples(dtc->dstfmt,
			be16_to_cpu(packet->udphdr.len) -
			sizeof(struct rtphdr) - sizeof(struct udphdr));
	cpvt->samples_in_flight = max(cpvt->samples_in_flight - samples, 0L);
	list_add_tail(&cmd->node, &cpvt->rx_queue);
	dahdi_tc_set_data_waiting(dtc);
	spin_unlock_irqrestore(&cpvt->lock, flags);
	dahdi_transcoder_alert(dtc);
	return;
}

static void service_tx_ring(struct wcdte *wc)
{
	struct tcb *cmd;
	unsigned long flags;
	spin_lock_irqsave(&wc->cmd_list_lock, flags);
	while ((cmd = wctc4xxp_retrieve(wc->txd))) {
		cmd->flags |= TX_COMPLETE;
		if (!(cmd->flags & (WAIT_FOR_ACK | WAIT_FOR_RESPONSE))) {
			/* If we're not waiting for an ACK or Response from
			 * the DTE, this message should not be sitting on any
			 * lists. */
			WARN_ON(!list_empty(&cmd->node));
			if (cmd->complete) {
				WARN_ON(!(cmd->flags & TX_COMPLETE));
				complete(cmd->complete);
			} else {
				free_cmd(cmd);
			}
		}

		/* We've freed up a spot in the hardware ring buffer.  If
		 * another packet is queued up, let's submit it to the
		 * hardware. */
		if (!list_empty(&wc->cmd_list)) {
			cmd = list_entry(wc->cmd_list.next, struct tcb, node);
			list_del_init(&cmd->node);
			if (cmd->flags & (WAIT_FOR_ACK | WAIT_FOR_RESPONSE)) {
				list_add_tail(&cmd->node,
					      &wc->waiting_for_response_list);
			}
			wctc4xxp_submit(wc->txd, cmd);
		}
	}
	spin_unlock_irqrestore(&wc->cmd_list_lock, flags);
}

static void service_rx_ring(struct wcdte *wc)
{
	struct tcb *cmd;
	unsigned long flags;
	LIST_HEAD(local_list);
	spin_lock_irqsave(&wc->rx_list_lock, flags);
	list_splice_init(&wc->rx_list, &local_list);
	spin_unlock_irqrestore(&wc->rx_list_lock, flags);

	/*
	 * Process the received packets
	 */
	while (!list_empty(&local_list)) {
		const struct ethhdr *ethhdr;

		cmd = container_of(local_list.next, struct tcb, node);
		ethhdr = (const struct ethhdr *)(cmd->data);
		list_del_init(&cmd->node);

		wctc4xxp_net_capture_cmd(wc, cmd);
		if (cpu_to_be16(ETH_P_IP) == ethhdr->h_proto) {
			queue_rtp_packet(wc, cmd);
		} else if (cpu_to_be16(ETH_P_CSM_ENCAPS) == ethhdr->h_proto) {
			receive_csm_encaps_packet(wc, cmd);
		} else {
			DTE_DEBUG(DTE_DEBUG_GENERAL,
			   "Unknown packet protocol received: %04x.\n",
			   be16_to_cpu(ethhdr->h_proto));
			free_cmd(cmd);
		}
	}
	wctc4xxp_receive_demand_poll(wc);
}

#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 20)
static void deferred_work_func(void *param)
{
	struct wcdte *wc = param;
#else
static void deferred_work_func(struct work_struct *work)
{
	struct wcdte *wc = container_of(work, struct wcdte, deferred_work);
#endif
	service_rx_ring(wc);
}

DAHDI_IRQ_HANDLER(wctc4xxp_interrupt)
{
	struct wcdte *wc = dev_id;
	bool packets_to_process = false;
	u32 ints;
#define NORMAL_INTERRUPT_SUMMARY (1<<16)
#define ABNORMAL_INTERRUPT_SUMMARY (1<<15)

#define TX_COMPLETE_INTERRUPT 0x00000001
#define RX_COMPLETE_INTERRUPT 0x00000040
#define TIMER_INTERRUPT	      (1<<11)
#define NORMAL_INTERRUPTS (TX_COMPLETE_INTERRUPT | RX_COMPLETE_INTERRUPT | \
			   TIMER_INTERRUPT)

	/* Read and clear interrupts */
	ints = __wctc4xxp_getctl(wc, 0x0028);

	if (!(ints & (NORMAL_INTERRUPT_SUMMARY|ABNORMAL_INTERRUPT_SUMMARY)))
		return IRQ_NONE;

	/* Clear all the pending interrupts. */
	__wctc4xxp_setctl(wc, 0x0028, ints);

	if (ints & (RX_COMPLETE_INTERRUPT | TIMER_INTERRUPT)) {
		packets_to_process = wctc4xxp_handle_receive_ring(wc) > 0;
		service_tx_ring(wc);

#if DEFERRED_PROCESSING == WORKQUEUE
		if (packets_to_process)
			schedule_work(&wc->deferred_work);
#elif DEFERRED_PROCESSING == INTERRUPT
#error "You will need to change the locks if you want to run the processing " \
		"in the interrupt handler."
#else
#error "Define a deferred processing function in kernel/wctc4xxp/wctc4xxp.h"
#endif

	} else {
		if ((ints & 0x00008000) && debug)
			dev_info(&wc->pdev->dev, "Abnormal Interrupt.\n");

		if (ints & 0x00002000)
			dev_err(&wc->pdev->dev, "Fatal Bus Error Detected.\n");

		if ((ints & 0x00000100) && debug)
			dev_info(&wc->pdev->dev, "Receive Stopped INT\n");

		if ((ints & 0x00000080) && debug) {
			dev_info(&wc->pdev->dev,
				 "Receive Desciptor Unavailable INT " \
				 "(%d)\n", wctc4xxp_getcount(wc->rxd));
		}

		if ((ints & 0x00000020) && debug)
			dev_info(&wc->pdev->dev, "Transmit Under-flow INT\n");

		if ((ints & 0x00000008) && debug)
			dev_info(&wc->pdev->dev, "Jabber Timer Time-out INT\n");

		if ((ints & 0x00000002) && debug) {
			dev_info(&wc->pdev->dev,
				 "Transmit Processor Stopped INT\n");
		}
	}
	return IRQ_HANDLED;
}

static int
wctc4xxp_hardware_init(struct wcdte *wc)
{
	/* Hardware stuff */
	enum {
		/* Software Reset */
		SWR		= (1 << 0),
		/* Bus Arbitration (1 for priority transmit) */
		BAR		= (1 << 1),
		/* Memory Write Invalidate */
		MWI		= (1 << 24),
		/* Memory Read Line */
		MRL		= (1 << 23),
		/* Descriptor Skip Length */
		DSLShift	= 2,
		/* Cache Alignment */
		CALShift	= 14,
		/* Transmit Auto Pollling */
		TAPShift	= 17,
	};
	u32 reg;
	unsigned long newjiffies;
	u8 cache_line_size;
	const u32 DEFAULT_PCI_ACCESS = (MWI | (11 << TAPShift));

	if (pci_read_config_byte(wc->pdev, 0x0c, &cache_line_size))
		return -EIO;

	switch (cache_line_size) {
	case 0x08:
		reg = DEFAULT_PCI_ACCESS | (0x1 << CALShift);
		break;
	case 0x10:
		reg = DEFAULT_PCI_ACCESS | (0x2 << CALShift);
		break;
	case 0x20:
		reg = DEFAULT_PCI_ACCESS | (0x3 << CALShift);
		break;
	default:
		reg = (11 << TAPShift);
		break;
	}

	reg |= ((wc->txd->padding / sizeof(u32)) << 2) & 0x7c;

	/* Reset the DTE... */
	wctc4xxp_setctl(wc, 0x0000, reg | 1);
	newjiffies = jiffies + HZ; /* One second timeout */
	/* ...and wait for it to come out of reset. */
	while (((wctc4xxp_getctl(wc, 0x0000)) & 0x00000001) &&
		(newjiffies > jiffies))
		msleep(1);

	wctc4xxp_setctl(wc, 0x0000, reg | 0x60000);

	/* Configure watchdogs, access, etc */
	wctc4xxp_setctl(wc, 0x0030, 0x00280048);
	wctc4xxp_setctl(wc, 0x0078, 0x00000013);
	reg = wctc4xxp_getctl(wc, 0x00fc);
	wctc4xxp_setctl(wc, 0x00fc, (reg & ~0x7) | 0x7);
	reg = wctc4xxp_getctl(wc, 0x00fc);
	return 0;
}

static void
wctc4xxp_start_dma(struct wcdte *wc)
{
	int res;
	int i;
	u32 reg;
	struct tcb *cmd;

	for (i = 0; i < wc->rxd->size; ++i) {
		cmd = alloc_cmd(SFRAME_SIZE);
		if (!cmd) {
			WARN_ALWAYS();
			return;
		}
		WARN_ON(SFRAME_SIZE != cmd->data_len);
		res = wctc4xxp_submit(wc->rxd, cmd);
		if (res) {
			/* When we're starting the DMA, we should always be
			 * able to fill the ring....so something is wrong
			 * here. */
			WARN_ALWAYS();
			free_cmd(cmd);
			break;
		}
	}
	wmb();
	wctc4xxp_setctl(wc, 0x0020, wc->txd->desc_dma);
	wctc4xxp_setctl(wc, 0x0018, wc->rxd->desc_dma);

	/* Start receiver/transmitter */
	reg = wctc4xxp_getctl(wc, 0x0030);
	wctc4xxp_setctl(wc, 0x0030, reg | 0x00002002);
	wctc4xxp_receive_demand_poll(wc);
	reg = wctc4xxp_getctl(wc, 0x0028);
	wctc4xxp_setctl(wc, 0x0028, reg);

}

static void
_wctc4xxp_stop_dma(struct wcdte *wc)
{
	/* Disable interrupts and reset */
	unsigned int reg;
	/* Disable interrupts */
	wctc4xxp_setintmask(wc, 0x00000000);
	wctc4xxp_setctl(wc, 0x0084, 0x00000000);
	wctc4xxp_setctl(wc, 0x0048, 0x00000000);
	/* Reset the part to be on the safe side */
	reg = wctc4xxp_getctl(wc, 0x0000);
	reg |= 0x00000001;
	wctc4xxp_setctl(wc, 0x0000, reg);
}

static void
wctc4xxp_stop_dma(struct wcdte *wc)
{
	unsigned long newjiffies;

	_wctc4xxp_stop_dma(wc);
	newjiffies = jiffies + HZ; /* One second timeout */
	/* We'll wait here for the part to come out of reset */
	while (((wctc4xxp_getctl(wc, 0x0000)) & 0x00000001) &&
		(newjiffies > jiffies))
			msleep(1);
}

#define MDIO_SHIFT_CLK		0x10000
#define MDIO_DATA_WRITE1 	0x20000
#define MDIO_ENB		0x00000
#define MDIO_ENB_IN		0x40000
#define MDIO_DATA_READ		0x80000

static int
wctc4xxp_read_phy(struct wcdte *wc, int location)
{
	int i;
	long mdio_addr = 0x0048;
	int read_cmd = (0xf6 << 10) | (1 << 5) | location;
	int retval = 0;

	/* Establish sync by sending at least 32 logic ones. */
	for (i = 32; i >= 0; --i) {
		wctc4xxp_setctl(wc, mdio_addr,
			MDIO_ENB | MDIO_DATA_WRITE1);
		wctc4xxp_getctl(wc, mdio_addr);
		wctc4xxp_setctl(wc, mdio_addr,
			MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK);
		wctc4xxp_getctl(wc, mdio_addr);
	}

	/* Shift the read command bits out. */
	for (i = 17; i >= 0; --i) {
		int dataval = (read_cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;

		wctc4xxp_setctl(wc, mdio_addr, MDIO_ENB | dataval);
		wctc4xxp_getctl(wc, mdio_addr);
		wctc4xxp_setctl(wc, mdio_addr,
			MDIO_ENB | dataval | MDIO_SHIFT_CLK);
		wctc4xxp_getctl(wc, mdio_addr);
	}

	/* Read the two transition, 16 data, and wire-idle bits. */
	for (i = 19; i > 0; --i) {
		wctc4xxp_setctl(wc, mdio_addr, MDIO_ENB_IN);
		wctc4xxp_getctl(wc, mdio_addr);
		retval = (retval << 1) |
			((wctc4xxp_getctl(wc, mdio_addr) & MDIO_DATA_READ) ?
			1 : 0);
		wctc4xxp_setctl(wc, mdio_addr, MDIO_ENB_IN | MDIO_SHIFT_CLK);
		wctc4xxp_getctl(wc, mdio_addr);
	}
	retval = (retval>>1) & 0xffff;
	return retval;
}

static void
wctc4xxp_write_phy(struct wcdte *wc, int location, int value)
{
	int i;
	int cmd = (0x5002 << 16) | (1 << 23) | (location<<18) | value;
	long mdio_addr = 0x0048;

	/* Establish sync by sending 32 logic ones. */
	for (i = 32; i >= 0; --i) {
		wctc4xxp_setctl(wc, mdio_addr, MDIO_ENB | MDIO_DATA_WRITE1);
		wctc4xxp_getctl(wc, mdio_addr);
		wctc4xxp_setctl(wc, mdio_addr,
			MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK);
		wctc4xxp_getctl(wc, mdio_addr);
	}
	/* Shift the command bits out. */
	for (i = 31; i >= 0; --i) {
		int dataval = (cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
		wctc4xxp_setctl(wc, mdio_addr, MDIO_ENB | dataval);
		wctc4xxp_getctl(wc, mdio_addr);
		wctc4xxp_setctl(wc, mdio_addr,
			MDIO_ENB | dataval | MDIO_SHIFT_CLK);
		wctc4xxp_getctl(wc, mdio_addr);
	}
	/* Clear out extra bits. */
	for (i = 2; i > 0; --i) {
		wctc4xxp_setctl(wc, mdio_addr, MDIO_ENB_IN);
		wctc4xxp_getctl(wc, mdio_addr);
		wctc4xxp_setctl(wc, mdio_addr, MDIO_ENB_IN | MDIO_SHIFT_CLK);
		wctc4xxp_getctl(wc, mdio_addr);
	}
	return;
}

static int
wctc4xxp_wait_for_link(struct wcdte *wc)
{
	int reg;
	unsigned int delay_count = 0;
	do {
		reg = wctc4xxp_getctl(wc, 0x00fc);
		msleep(2);
		delay_count++;

		if (delay_count >= 5000) {
			dev_err(&wc->pdev->dev,
				"Failed to link to DTE processor!\n");
			return -EIO;
		}
	} while ((reg & 0xE0000000) != 0xE0000000);
	return 0;
}

static int
wctc4xxp_load_firmware(struct wcdte *wc, const struct firmware *firmware)
{
	unsigned int byteloc;
	unsigned int length;
	struct tcb *cmd;
	DECLARE_COMPLETION_ONSTACK(done);

	byteloc = 17;

	cmd = alloc_cmd(SFRAME_SIZE);
	if (!cmd)
		return -ENOMEM;

#if defined(CONFIG_WCTC4XXP_POLLING)
	wctc4xxp_enable_polling(wc);
#endif

	clear_bit(DTE_READY, &wc->flags);

	while (byteloc < (firmware->size-20)) {
		length = (firmware->data[byteloc] << 8) |
				firmware->data[byteloc+1];
		byteloc += 2;
		cmd->data_len = length;
		BUG_ON(length > cmd->data_len);
		memcpy(cmd->data, &firmware->data[byteloc], length);
		byteloc += length;
		cmd->flags = WAIT_FOR_ACK;
		cmd->complete = &done;
		wctc4xxp_transmit_cmd(wc, cmd);
		wait_for_completion(&done);
		if (cmd->flags & DTE_CMD_TIMEOUT) {
			free_cmd(cmd);
			dev_err(&wc->pdev->dev, "Failed to load firmware.\n");
#if defined(CONFIG_WCTC4XXP_POLLING)
			wctc4xxp_disable_polling(wc);
#endif
			return -EIO;
		}
	}
	free_cmd(cmd);
	if (!wait_event_timeout(wc->waitq, wctc4xxp_is_ready(wc), 15*HZ)) {
		dev_err(&wc->pdev->dev, "Failed to boot firmware.\n");
#if defined(CONFIG_WCTC4XXP_POLLING)
		wctc4xxp_disable_polling(wc);
#endif
		return -EIO;
	}

#if defined(CONFIG_WCTC4XXP_POLLING)
	wctc4xxp_disable_polling(wc);
#endif
	return 0;
}

static int
wctc4xxp_turn_off_booted_led(struct wcdte *wc)
{
	int ret = 0;
	int reg;
	/* Turn off auto negotiation */
	wctc4xxp_write_phy(wc, 0, 0x2100);
	DTE_DEBUG(DTE_DEBUG_GENERAL, "PHY register 0 = %X\n",
	   wctc4xxp_read_phy(wc, 0));

	wctc4xxp_reset_processor(wc);

	/* Wait 4 ms to ensure processor reset */
	msleep(4);

	/* Clear reset */
	wctc4xxp_setctl(wc, 0x00A0, 0x04080000);

	/* Wait for the ethernet link */
	ret = wctc4xxp_wait_for_link(wc);
	if (ret)
		return ret;

	/* Turn off booted LED */
	wctc4xxp_setctl(wc, 0x00A0, 0x04084000);
	reg = wctc4xxp_getctl(wc, 0x00fc);
	DTE_DEBUG(DTE_DEBUG_GENERAL, "LINK STATUS: reg(0xfc) = %X\n", reg);

	reg = wctc4xxp_getctl(wc, 0x00A0);

	return ret;
}

static void
wctc4xxp_turn_on_booted_led(struct wcdte *wc)
{
	wctc4xxp_setctl(wc, 0x00A0, 0x04080000);
}

static int
wctc4xxp_boot_processor(struct wcdte *wc, const struct firmware *firmware)
{
	int ret;

	wctc4xxp_turn_off_booted_led(wc);
	ret = wctc4xxp_load_firmware(wc, firmware);
	if (ret)
		return ret;

	wctc4xxp_turn_on_booted_led(wc);

	DTE_DEBUG(DTE_DEBUG_GENERAL, "Successfully booted DTE processor.\n");
	return 0;
}

static void
setup_half_channel(struct channel_pvt *pvt, struct tcb *cmd, u16 length)
{
	setup_channel_header(pvt, cmd);

	append_set_ip_hdr_channel_cmd(cmd);
	append_voip_vceopt_cmd(cmd, length);
	append_voip_tonectl_cmd(cmd);
	append_voip_dtmfopt_cmd(cmd);
	append_voip_indctrl_cmd(cmd);

	/* To indicate the end of multiple messages. */
	cmd->data_len += 4;
	WARN_ON(cmd->data_len >= SFRAME_SIZE);

	wctc4xxp_transmit_cmd(pvt->wc, cmd);
}

static int wctc4xxp_setup_channels(struct wcdte *wc,
				   struct channel_pvt *encoder_pvt,
				   struct channel_pvt *decoder_pvt,
				   u16 length)
{
	int res = 0;
	struct tcb *encoder_cmd;
	struct tcb *decoder_cmd;
	DECLARE_COMPLETION_ONSTACK(encoder_done);
	DECLARE_COMPLETION_ONSTACK(decoder_done);

	encoder_cmd = alloc_cmd(SFRAME_SIZE);
	decoder_cmd = alloc_cmd(SFRAME_SIZE);

	if (!encoder_cmd || !decoder_cmd) {
		res = -ENOMEM;
		goto error_exit;
	}

	encoder_cmd->complete = &encoder_done;
	decoder_cmd->complete = &decoder_done;

	setup_half_channel(encoder_pvt, encoder_cmd, length);
	setup_half_channel(decoder_pvt, decoder_cmd, length);

	wait_for_completion(&decoder_done);
	wait_for_completion(&encoder_done);

	if (encoder_cmd->flags & DTE_CMD_TIMEOUT ||
	    decoder_cmd->flags & DTE_CMD_TIMEOUT) {
		DTE_DEBUG(DTE_DEBUG_GENERAL, "Timeout waiting for command.\n");
		res = -EIO;
	}

	if ((0x0000 != response_header(encoder_cmd)->cmd.params[0]) ||
	    (0x0000 != response_header(encoder_cmd)->cmd.params[0]))
		res = -EIO;

error_exit:
	free_cmd(encoder_cmd);
	free_cmd(decoder_cmd);
	return res;
}

static int wctc4xxp_enable_channels(struct wcdte *wc,
				    struct channel_pvt *encoder_pvt,
				    struct channel_pvt *decoder_pvt,
				    u8 complicated, u8 simple)
{
	int res = 0;
	struct tcb *encoder_cmd;
	struct tcb *decoder_cmd;
	DECLARE_COMPLETION_ONSTACK(encoder_done);
	DECLARE_COMPLETION_ONSTACK(decoder_done);

	encoder_cmd = alloc_cmd(SFRAME_SIZE);
	decoder_cmd = alloc_cmd(SFRAME_SIZE);

	if (!encoder_cmd || !decoder_cmd) {
		res = -ENOMEM;
		goto error_exit;
	}

	encoder_cmd->complete = &encoder_done;
	decoder_cmd->complete = &decoder_done;

	send_voip_vopena_cmd(encoder_pvt, encoder_cmd, complicated);
	send_voip_vopena_cmd(decoder_pvt, decoder_cmd, simple);

	wait_for_completion(&decoder_done);
	wait_for_completion(&encoder_done);

	if ((0x0000 != response_header(encoder_cmd)->cmd.params[0]) ||
	    (0x0000 != response_header(decoder_cmd)->cmd.params[0]))
		res = -EIO;

error_exit:
	free_cmd(encoder_cmd);
	free_cmd(decoder_cmd);
	return res;
}

static int
wctc4xxp_create_channel_pair(struct wcdte *wc, struct channel_pvt *cpvt,
	u8 simple, u8 complicated)
{
	struct channel_pvt *encoder_pvt, *decoder_pvt;
	u16 encoder_timeslot, decoder_timeslot;
	u16 encoder_channel, decoder_channel;
	struct tcb *cmd;
	u16 length;

	cmd = alloc_cmd(SFRAME_SIZE);
	if (!cmd)
		return -ENOMEM;

	BUG_ON(!wc || !cpvt);
	if (cpvt->encoder) {
		encoder_timeslot = cpvt->timeslot_in_num;
		decoder_timeslot = cpvt->timeslot_out_num;
	} else {
		u8 temp;
		encoder_timeslot = cpvt->timeslot_out_num;
		decoder_timeslot = cpvt->timeslot_in_num;
		temp = simple;
		simple = complicated;
		complicated = temp;
	}

	length = (DTE_FORMAT_G729A == complicated) ? G729_LENGTH :
		(DTE_FORMAT_G723_1 == complicated) ? G723_LENGTH : 0;


	BUG_ON(encoder_timeslot/2 >= wc->numchannels);
	BUG_ON(decoder_timeslot/2 >= wc->numchannels);
	encoder_pvt = wc->uencode->channels[encoder_timeslot/2].pvt;
	decoder_pvt = wc->udecode->channels[decoder_timeslot/2].pvt;
	BUG_ON(!encoder_pvt);
	BUG_ON(!decoder_pvt);
	encoder_pvt->last_rx_seq_num = 0xff;
	decoder_pvt->last_rx_seq_num = 0xff;

	WARN_ON(encoder_timeslot == decoder_timeslot);
	/* First, let's create two channels, one for the simple -> complex
	 * encoder and another for the complex->simple decoder. */
	if (send_create_channel_cmd(wc, cmd, encoder_timeslot,
		&encoder_channel))
		goto error_exit;

	if (send_create_channel_cmd(wc, cmd, decoder_timeslot,
		&decoder_channel))
		goto error_exit;

	DTE_DEBUG(DTE_DEBUG_CHANNEL_SETUP,
	   "DTE is using the following channels encoder_channel: " \
	   "%d decoder_channel: %d\n", encoder_channel, decoder_channel);

	WARN_ON(encoder_channel == decoder_channel);
	/* Now set all the default parameters for the encoder. */
	encoder_pvt->chan_in_num = encoder_channel;
	encoder_pvt->chan_out_num = decoder_channel;

	decoder_pvt->chan_in_num = decoder_channel;
	decoder_pvt->chan_out_num = encoder_channel;

	if (wctc4xxp_setup_channels(wc, encoder_pvt, decoder_pvt, length))
		goto error_exit;

	if (send_trans_connect_cmd(wc, cmd, encoder_channel,
		decoder_channel, complicated, simple))
		goto error_exit;

	if (wctc4xxp_enable_channels(wc, encoder_pvt, decoder_pvt,
				     complicated, simple))
		goto error_exit;

	DTE_DEBUG(DTE_DEBUG_CHANNEL_SETUP,
	  "DTE has completed setup and connected the " \
	  "two channels together.\n");

	free_cmd(cmd);
	return 0;
error_exit:
	free_cmd(cmd);
	return -EIO;
}

static void print_vceinfo_packet(struct wcdte *wc, struct tcb *cmd)
{
	int i;
	struct device *const dev = &wc->pdev->dev;

	static const struct {
		const char *name;
		bool show;
	} PARAMETERS[] = {
		{ "Format Revision                                   ", false},
		{ "Reserved                                          ", false},
		{ "Call Timer (seconds)                              ", false},
		{ "Current Playout Delay [to PCM]                    ", false},
		{ "Minimum Playout Delay [to PCM]                    ", false},
		{ "Maximum Playout Delay [to PCM]                    ", false},
		{ "Clock Offset                                      ", false},
		{ "PeakJitter (ms)                                   ", true},
		{ "Interpolative Concealment [to PCM]                ", false},
		{ "Silence Concealment [to PCM]                      ", false},
		{ "Jitter Buffer Overflow Discard [from IP]          ", true},
		{ "End-point Detection Errors                        ", true},
		{ "Number of Tx Voice Packets [to IP]                ", true},
		{ "Number of Tx Signalling Packets [to IP]           ", true},
		{ "Number of Tx Comfort Noise Packets [to IP]        ", true},
		{ "Total Transmit Duration [to IP]                   ", true},
		{ "Voice Transmit Duration [to IP]                   ", true},
		{ "Number of Rx Voice Packets [from IP]              ", true},
		{ "Number of Rx Signalling Packets [from IP]         ", true},
		{ "Number of Rx Comfort Noise Packets [from IP]      ", true},
		{ "Total Receive Duration [from IP]                  ", true},
		{ "Voice Receive Duration [from IP]                  ", true},
		{ "Packets Out of Sequence [from IP]                 ", true},
		{ "Bad Protocol Headers [from IP]                    ", true},
		{ "Late Packets [from IP]                            ", true},
		{ "Reserved (Early Packets) always zero              ", false},
		{ "Number of Rx Voice bytes                          ", true},
		{ "Number of Lost Packets [from IP]                  ", true},
		{ "Current Transmit Power [from PCM]                 ", false},
		{ "Mean Transmit Power [from PCM]                    ", false},
		{ "Current Receive Power [to PCM]                    ", false},
		{ "Mean Receive Power [to PCM]                       ", false},
		{ "Background Noise [to PCM]                         ", false},
		{ "ERL Level [to PCM]                                ", false},
		{ "ACOM Level [from PCM]                             ", false},
		{ "Current Transmit Activity [from PCM]              ", false},
		{ "Current Receive Activity [to PCM]                 ", false},
		{ "Discarded Unexpected Packets                      ", true},
		{ "Discard Packets Due to Rx Disabled                ", true},
		{ "Discarded Duplicate Packets                       ", true},
		{ "Discarded Packets Due to Incorrect Payload Length ", true},
		{ "Discarded Packets Due to Channel Inactive         ", true},
		{ "Discarded Packets Due to Insufficient Memory      ", true}
	};

	u32 *parms = (u32 *)(&response_header(cmd)->cmd.params[0]);
	for (i = 0; i < 43; ++i) {
		if (PARAMETERS[i].show)
			dev_info(dev, "%s%d\n", PARAMETERS[i].name, parms[i]);
	}
}

static void print_eth_statistics_packet(struct wcdte *wc, struct tcb *cmd)
{
	int i;
	struct device *const dev = &wc->pdev->dev;

	static const struct {
		const char *name;
		bool show;
	} PARAMETERS[] = {
		{ "Format Revision                 ", true},
		{ "Emitted Frames                  ", true},
		{ "Received Frames                 ", true},
		{ "Unknown Packet Type             ", true},
		{ "Received Broadcast Packets      ", true},
		{ "Unknown Broadcast               ", true},
		{ "Emitted VLAN frames             ", true},
		{ "Received VLAN frames            ", true},
		{ "Received VLAN frames with E-RIF ", true}
	};

	u32 *parms = (u32 *)(&response_header(cmd)->cmd.params[0]);
	for (i = 0; i < sizeof(PARAMETERS)/sizeof(PARAMETERS[0]); ++i) {
		if (PARAMETERS[i].show)
			dev_info(dev, "%s%d\n", PARAMETERS[i].name, parms[i]);
	}
}

static int
wctc4xxp_destroy_channel_pair(struct wcdte *wc, struct channel_pvt *cpvt)
{
	struct dahdi_transcoder_channel *dtc1, *dtc2;
	struct channel_pvt *encoder_pvt, *decoder_pvt;
	int chan1, chan2, timeslot1, timeslot2;
	struct tcb *cmd;

	cmd = alloc_cmd(SFRAME_SIZE);
	if (!cmd)
		return -ENOMEM;

	if (cpvt->encoder) {
		chan1 = cpvt->chan_in_num;
		timeslot1 = cpvt->timeslot_in_num;
		chan2 = cpvt->chan_out_num;
		timeslot2 = cpvt->timeslot_out_num;
	} else {
		chan1 = cpvt->chan_out_num;
		timeslot1 = cpvt->timeslot_out_num;
		chan2 = cpvt->chan_in_num;
		timeslot2 = cpvt->timeslot_in_num;
	}

	if (timeslot1/2 >= wc->numchannels || timeslot2/2 >= wc->numchannels) {
		dev_warn(&wc->pdev->dev,
		 "Invalid channel numbers in %s. chan1:%d chan2: %d\n",
		 __func__, timeslot1/2, timeslot2/2);
		return 0;
	}

	dtc1 = &(wc->uencode->channels[timeslot1/2]);
	dtc2 = &(wc->udecode->channels[timeslot2/2]);
	encoder_pvt = dtc1->pvt;
	decoder_pvt = dtc2->pvt;

	if (debug & DTE_DEBUG_ETH_STATS) {
		if (send_voip_vceinfo_cmd(encoder_pvt, cmd))
			goto error_exit;
		dev_warn(&wc->pdev->dev,
			 "****************************************\n");
		dev_warn(&wc->pdev->dev,
			 "Encoder stats (ch: %d):\n",
			 encoder_pvt->timeslot_in_num);
		print_vceinfo_packet(wc, cmd);

		if (send_voip_vceinfo_cmd(decoder_pvt, cmd))
			goto error_exit;
		dev_warn(&wc->pdev->dev,
			 "****************************************\n");
		dev_warn(&wc->pdev->dev,
			 "Decoder stats (ch: %d):\n",
			 decoder_pvt->timeslot_in_num);
		print_vceinfo_packet(wc, cmd);
	}

	if (send_voip_vopena_close_cmd(encoder_pvt, cmd))
		goto error_exit;
	if (send_voip_vopena_close_cmd(decoder_pvt, cmd))
		goto error_exit;
	if (send_trans_disconnect_cmd(wc, cmd, chan1, chan2, 0, 0))
		goto error_exit;
	if (send_destroy_channel_cmd(wc, cmd, chan1))
		goto error_exit;
	if (send_destroy_channel_cmd(wc, cmd, chan2))
		goto error_exit;

	if (debug & DTE_DEBUG_ETH_STATS) {
		if (send_eth_statistics_cmd(wc, cmd))
			goto error_exit;
		print_eth_statistics_packet(wc, cmd);
		dev_info(&wc->pdev->dev, "AN983 tx packets: %d rx packets: %d\n",
			 wctc4xxp_get_packet_count(wc->txd),
			 wctc4xxp_get_packet_count(wc->rxd));
	}

	free_cmd(cmd);
	return 0;
error_exit:
	free_cmd(cmd);
	return -1;
}


static int wctc4xxp_setup_device(struct wcdte *wc)
{
	struct tcb *cmd;
	int tdm_bus;

	cmd = alloc_cmd(SFRAME_SIZE);
	if (!cmd)
		return -ENOMEM;

	if (send_set_arm_clk_cmd(wc, cmd))
		goto error_exit;

	if (send_set_spu_clk_cmd(wc, cmd))
		goto error_exit;

	if (send_tdm_select_bus_mode_cmd(wc, cmd))
		goto error_exit;

	for (tdm_bus = 0; tdm_bus < 4; ++tdm_bus) {
		if (send_supvsr_setup_tdm_parms(wc, cmd, tdm_bus))
			goto error_exit;
	}

	if (send_set_eth_header_cmd(wc, cmd, src_mac, dst_mac))
		goto error_exit;

	if (send_ip_service_config_cmd(wc, cmd))
		goto error_exit;

	if (send_arp_service_config_cmd(wc, cmd))
		goto error_exit;

	if (send_icmp_service_config_cmd(wc, cmd))
		goto error_exit;

	if (send_device_set_country_code_cmd(wc, cmd))
		goto error_exit;

	if (send_spu_features_control_cmd(wc, cmd, 0x02))
		goto error_exit;

	if (send_ip_options_cmd(wc, cmd))
		goto error_exit;

	if (send_spu_features_control_cmd(wc, cmd, 0x04))
		goto error_exit;

	if (send_csme_multi_cmd(wc, cmd))
		goto error_exit;

	if (send_tdm_opt_cmd(wc, cmd))
		goto error_exit;

	free_cmd(cmd);
	return 0;
error_exit:
	free_cmd(cmd);
	return -1;
}

static void wctc4xxp_setup_file_operations(struct file_operations *fops)
{
	fops->owner = THIS_MODULE;
	fops->read =  wctc4xxp_read;
	fops->write = wctc4xxp_write;
}

static int
initialize_channel_pvt(struct wcdte *wc, int encoder,
	struct channel_pvt **cpvt)
{
	int chan;
	*cpvt = kmalloc(sizeof(struct channel_pvt) * wc->numchannels,
			GFP_KERNEL);
	if (!(*cpvt))
		return -ENOMEM;
	for (chan = 0; chan < wc->numchannels; ++chan)
		wctc4xxp_init_state((*cpvt) + chan, encoder, chan, wc);
	return 0;
}

static int
initialize_transcoder(struct wcdte *wc, unsigned int srcfmts,
	unsigned int dstfmts, struct channel_pvt *pvts,
	struct dahdi_transcoder **zt)
{
	int chan;
	*zt = dahdi_transcoder_alloc(wc->numchannels);
	if (!(*zt))
		return -ENOMEM;
	(*zt)->srcfmts = srcfmts;
	(*zt)->dstfmts = dstfmts;
	(*zt)->allocate = wctc4xxp_operation_allocate;
	(*zt)->release = wctc4xxp_operation_release;
	wctc4xxp_setup_file_operations(&((*zt)->fops));
	for (chan = 0; chan < wc->numchannels; ++chan)
		(*zt)->channels[chan].pvt = &pvts[chan];
	return 0;
}

static int initialize_encoders(struct wcdte *wc, unsigned int complexfmts)
{
	int res;
	res = initialize_channel_pvt(wc, 1, &wc->encoders);
	if (res)
		return res;

	res = initialize_transcoder(wc, DAHDI_FORMAT_ULAW | DAHDI_FORMAT_ALAW,
		complexfmts, wc->encoders, &wc->uencode);
	if (res)
		return res;
	sprintf(wc->uencode->name, "DTE Encoder");
	return res;
}

static int
initialize_decoders(struct wcdte *wc, unsigned int complexfmts)
{
	int res;
	res = initialize_channel_pvt(wc, 0, &wc->decoders);
	if (res)
		return res;

	res = initialize_transcoder(wc, complexfmts,
		DAHDI_FORMAT_ULAW | DAHDI_FORMAT_ALAW,
		wc->decoders, &wc->udecode);
	if (res)
		return res;

	sprintf(wc->udecode->name, "DTE Decoder");
	return res;
}

static void
wctc4xxp_send_commands(struct wcdte *wc, struct list_head *to_send)
{
	struct tcb *cmd;
	while (!list_empty(to_send)) {
		cmd = container_of(to_send->next, struct tcb, node);
		list_del_init(&cmd->node);
		wctc4xxp_transmit_cmd(wc, cmd);
	}
}

static void
#ifndef init_timer
wctc4xxp_watchdog(struct timer_list *t)
{
	struct wcdte *wc = from_timer(wc, t, watchdog);
#else	/* Compatibility for pre 4.15 interface */
wctc4xxp_watchdog(unsigned long data)
{
	struct wcdte *wc = (struct wcdte *)data;
#endif
	struct tcb *cmd, *temp;
	LIST_HEAD(cmds_to_retry);
	const int MAX_RETRIES = 5;
	int reschedule_timer = 0;
	unsigned long flags;

	service_tx_ring(wc);

	spin_lock_irqsave(&wc->cmd_list_lock, flags);
	/* Go through the list of messages that are waiting for responses from
	 * the DTE, and complete or retry any that have timed out. */
	list_for_each_entry_safe(cmd, temp,
		&wc->waiting_for_response_list, node) {

		if (!time_after(jiffies, cmd->timeout))
			continue;

		if (++cmd->retries > MAX_RETRIES) {
			if (!(cmd->flags & TX_COMPLETE)) {

				cmd->flags |= DTE_CMD_TIMEOUT;
				list_del_init(&cmd->node);
				if (cmd->complete)
					complete(cmd->complete);

				wctc4xxp_reset_processor(wc);
				set_bit(DTE_SHUTDOWN, &wc->flags);
				spin_unlock_irqrestore(&wc->cmd_list_lock,
						       flags);
				_wctc4xxp_stop_dma(wc);
				dev_err(&wc->pdev->dev,
				  "Board malfunctioning. Halting operation.\n");
				reschedule_timer = 0;
				spin_lock_irqsave(&wc->cmd_list_lock, flags);
				break;
			}
			/* ERROR:  We've retried the command and
			 * haven't received the ACK or the response.
			 */
			cmd->flags |= DTE_CMD_TIMEOUT;
			list_del_init(&cmd->node);
			if (cmd->complete)
				complete(cmd->complete);
		} else if (cmd->flags & TX_COMPLETE) {
			/* Move this to the local list because we're
			 * going to resend it once we free the locks
			 */
			list_move_tail(&cmd->node, &cmds_to_retry);
			cmd->flags &= ~(TX_COMPLETE);
		} else {
			/* The command is still sitting on the tx
			 * descriptor ring.  We don't want to move it
			 * off any lists, lets just reset the timeout
			 * and tell the hardware to look for another
			 * command . */
			dev_warn(&wc->pdev->dev,
			  "Retrying command that was still on descriptor list.\n");
			cmd->timeout = jiffies + HZ/4;
			wctc4xxp_transmit_demand_poll(wc);
			reschedule_timer = 1;
		}
	}
	spin_unlock_irqrestore(&wc->cmd_list_lock, flags);

	if (list_empty(&cmds_to_retry) && reschedule_timer)
		mod_timer(&wc->watchdog, jiffies + HZ/2);
	else if (!list_empty(&cmds_to_retry))
		wctc4xxp_send_commands(wc, &cmds_to_retry);
}

/**
 * Insert an struct wcdte on the global list in sorted order
 *
 */
static int __devinit
wctc4xxp_add_to_device_list(struct wcdte *wc)
{
	struct wcdte *cur;
	int pos = 0;
	INIT_LIST_HEAD(&wc->node);
	spin_lock(&wctc4xxp_list_lock);
	list_for_each_entry(cur, &wctc4xxp_list, node) {
		if (cur->pos != pos) {
			/* Add the new entry before the one here */
			list_add_tail(&wc->node, &cur->node);
			break;
		} else {
			++pos;
		}
	}
	/* If we didn't already add the new entry to the list, add it now */
	if (list_empty(&wc->node))
		list_add_tail(&wc->node, &wctc4xxp_list);
	spin_unlock(&wctc4xxp_list_lock);
	return pos;
}

static void wctc4xxp_remove_from_device_list(struct wcdte *wc)
{
	spin_lock(&wctc4xxp_list_lock);
	list_del(&wc->node);
	spin_unlock(&wctc4xxp_list_lock);
}

struct wctc4xxp_desc {
	const char *short_name;
	const char *long_name;
};

static struct wctc4xxp_desc wctc400p = {
	.short_name = "tc400b",
	.long_name = "Wildcard TC400P+TC400M",
};

static struct wctc4xxp_desc wctce400 = {
	.short_name = "tce400",
	.long_name = "Wildcard TCE400+TC400M",
};

static void wctc4xxp_cleanup_channels(struct wcdte *wc);

static int wctc4xxp_reset_and_reload_firmware(struct wcdte *wc,
					      const struct firmware *firmware)
{
	int res;

	wctc4xxp_cleanup_command_list(wc);
	wctc4xxp_cleanup_channels(wc);

	res = wctc4xxp_boot_processor(wc, firmware);
	if (res)
		return res;

#if defined(CONFIG_WCTC4XXP_POLLING)
	wctc4xxp_enable_polling(wc);
#endif
	res = wctc4xxp_setup_device(wc);
	if (res) {
		dev_err(&wc->pdev->dev, "Failed to setup DTE\n");
		return res;
	}

	return 0;
}

static int wctc4xxp_reset_driver_state(struct wcdte *wc)
{
	int res;
	struct firmware embedded_firmware;
	unsigned long flags;
	const struct firmware *firmware = &embedded_firmware;
#if !defined(HOTPLUG_FIRMWARE)
	extern void _binary_dahdi_fw_tc400m_bin_size;
	extern u8 _binary_dahdi_fw_tc400m_bin_start[];
	embedded_firmware.data = _binary_dahdi_fw_tc400m_bin_start;
	embedded_firmware.size = (size_t) &_binary_dahdi_fw_tc400m_bin_size;
#else
	static const char tc400m_firmware[] = "dahdi-fw-tc400m.bin";

	res = request_firmware(&firmware, tc400m_firmware, &wc->pdev->dev);
	if (res || !firmware) {
		dev_err(&wc->pdev->dev,
		  "Firmware %s not available from userspace. (%d)\n",
		  tc400m_firmware, res);
		return res;
	}
#endif
	res = wctc4xxp_reset_and_reload_firmware(wc, firmware);
	if (firmware != &embedded_firmware)
		release_firmware(firmware);
	spin_lock_irqsave(&wc->rxd->lock, flags);
	wc->rxd->packet_errors = 0;
	wc->reported_packet_errors = 0;
	spin_unlock_irqrestore(&wc->rxd->lock, flags);
	return res;
}

#ifdef EXPORT_FOR_ALERT_ATTRIBUTE

static ssize_t wctc4xxp_force_alert_store(struct device *dev,
				    struct device_attribute *attr,
				    const char *buf, size_t count)
{
	int res;
	unsigned int alert_type;
	struct wcdte *wc = dev_get_drvdata(dev);
	struct tcb *cmd  = alloc_cmd(SFRAME_SIZE);
	u16 parameters[] = {0};
	if (!cmd)
		return -ENOMEM;

	res = sscanf(buf, "%x", &alert_type);
	if (1 != res) {
		free_cmd(cmd);
		return -EINVAL;
	}

	dev_info(&wc->pdev->dev, "Forcing alert type: 0x%x\n", alert_type);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
	mutex_lock(&wc->chanlock);
#else
	res = mutex_lock_killable(&wc->chanlock);
	if (res) {
		free_cmd(cmd);
		return -EAGAIN;
	}
#endif


	parameters[0] = alert_type;

	create_supervisor_cmd(wc, cmd, CONFIG_CHANGE_TYPE,
		CONFIG_DEVICE_CLASS, 0x0409, parameters,
		ARRAY_SIZE(parameters));

	wctc4xxp_transmit_cmd(wc, cmd);

	mutex_unlock(&wc->chanlock);

	return count;
}

static DEVICE_ATTR(force_alert, 0200, NULL, wctc4xxp_force_alert_store);

static void wctc4xxp_create_sysfs_files(struct wcdte *wc)
{
	int ret;
	ret = device_create_file(&wc->pdev->dev, &dev_attr_force_alert);
	if (ret) {
		dev_info(&wc->pdev->dev,
			"Failed to create device attributes.\n");
	}
}

static void wctc4xxp_remove_sysfs_files(struct wcdte *wc)
{
	device_remove_file(&wc->pdev->dev, &dev_attr_force_alert);
}

#else
static inline void wctc4xxp_create_sysfs_files(struct wcdte *wc) { return; }
static inline void wctc4xxp_remove_sysfs_files(struct wcdte *wc) { return; }
#endif

static int __devinit
wctc4xxp_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	int res, reg, position_on_list;
	struct wcdte *wc = NULL;
	struct wctc4xxp_desc *d = (struct wctc4xxp_desc *)ent->driver_data;
	unsigned char g729_numchannels, g723_numchannels, min_numchannels;
	unsigned char wctc4xxp_firmware_ver, wctc4xxp_firmware_ver_minor;
	unsigned int complexfmts;
	struct firmware embedded_firmware;
	const struct firmware *firmware = &embedded_firmware;
#if !defined(HOTPLUG_FIRMWARE)
	extern void _binary_dahdi_fw_tc400m_bin_size;
	extern u8 _binary_dahdi_fw_tc400m_bin_start[];
#else
	static const char tc400m_firmware[] = "dahdi-fw-tc400m.bin";
#endif

	/* ------------------------------------------------------------------
	 * Setup the pure software constructs internal to this driver.
	 * --------------------------------------------------------------- */

	wc = kzalloc(sizeof(*wc), GFP_KERNEL);
	if (!wc)
		return -ENOMEM;

	position_on_list = wctc4xxp_add_to_device_list(wc);
	snprintf(wc->board_name, sizeof(wc->board_name)-1, "%s%d",
		d->short_name, position_on_list);
	wc->iobase           = pci_iomap(pdev, 1, 0);
	wc->pdev             = pdev;
	wc->pos              = position_on_list;
	wc->variety          = d->long_name;
	wc->last_rx_seq_num  = -1;

	if (!request_mem_region(pci_resource_start(pdev, 1),
	    pci_resource_len(pdev, 1), wc->board_name)) {
		dev_err(&pdev->dev, "IO Registers are in use by another "
			"module.\n");
		wctc4xxp_remove_from_device_list(wc);
		kfree(wc);
		return -EIO;
	}

	mutex_init(&wc->chanlock);
	spin_lock_init(&wc->reglock);
	spin_lock_init(&wc->cmd_list_lock);
	spin_lock_init(&wc->rx_list_lock);
	spin_lock_init(&wc->rx_lock);
	INIT_LIST_HEAD(&wc->cmd_list);
	INIT_LIST_HEAD(&wc->waiting_for_response_list);
	INIT_LIST_HEAD(&wc->rx_list);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 20)
	INIT_WORK(&wc->deferred_work, deferred_work_func, wc);
#else
	INIT_WORK(&wc->deferred_work, deferred_work_func);
#endif
	init_waitqueue_head(&wc->waitq);

	if (pci_set_dma_mask(wc->pdev, DMA_BIT_MASK(32))) {
		release_mem_region(pci_resource_start(wc->pdev, 1),
			pci_resource_len(wc->pdev, 1));
		if (wc->iobase)
			pci_iounmap(wc->pdev, wc->iobase);
		pci_clear_mwi(wc->pdev);
		dev_warn(&wc->pdev->dev, "No suitable DMA available.\n");
		return -EIO;
	}

	wc->txd = kmalloc(sizeof(*wc->txd), GFP_KERNEL);
	if (!wc->txd) {
		res = -ENOMEM;
		goto error_exit_swinit;
	}

	res = wctc4xxp_initialize_descriptor_ring(wc->pdev, wc->txd,
		0xe0800000, DMA_TO_DEVICE, DEFAULT_TX_DRING_SIZE);
	if (res)
		goto error_exit_swinit;

	wc->rxd = kmalloc(sizeof(*wc->rxd), GFP_KERNEL);
	if (!wc->rxd) {
		res = -ENOMEM;
		goto error_exit_swinit;
	}

	res = wctc4xxp_initialize_descriptor_ring(wc->pdev, wc->rxd, 0,
		DMA_FROM_DEVICE, DEFAULT_RX_DRING_SIZE);
	if (res)
		goto error_exit_swinit;

#if defined(HOTPLUG_FIRMWARE)
	res = request_firmware(&firmware, tc400m_firmware, &wc->pdev->dev);
	if (res || !firmware) {
		dev_err(&wc->pdev->dev,
		  "Firmware %s not available from userspace. (%d)\n",
		  tc400m_firmware, res);
		goto error_exit_swinit;
	}
#else
	embedded_firmware.data = _binary_dahdi_fw_tc400m_bin_start;
	embedded_firmware.size = (size_t) &_binary_dahdi_fw_tc400m_bin_size;
#endif

	wctc4xxp_firmware_ver = firmware->data[0];
	wctc4xxp_firmware_ver_minor = firmware->data[16];
	g729_numchannels = firmware->data[1];
	g723_numchannels = firmware->data[2];

	min_numchannels = min(g723_numchannels, g729_numchannels);

	if (!mode || strlen(mode) < 4) {
		sprintf(wc->complexname, "G.729a / G.723.1");
		complexfmts = DAHDI_FORMAT_G729A | DAHDI_FORMAT_G723_1;
		wc->numchannels = min_numchannels;
	} else if (mode[3] == '9') {	/* "G.729" */
		sprintf(wc->complexname, "G.729a");
		complexfmts = DAHDI_FORMAT_G729A;
		wc->numchannels = g729_numchannels;
	} else if (mode[3] == '3') {	/* "G.723.1" */
		sprintf(wc->complexname, "G.723.1");
		complexfmts = DAHDI_FORMAT_G723_1;
		wc->numchannels = g723_numchannels;
	} else {
		sprintf(wc->complexname, "G.729a / G.723.1");
		complexfmts = DAHDI_FORMAT_G729A | DAHDI_FORMAT_G723_1;
		wc->numchannels = min_numchannels;
	}

	res = initialize_encoders(wc, complexfmts);
	if (res)
		goto error_exit_swinit;
	res = initialize_decoders(wc, complexfmts);
	if (res)
		goto error_exit_swinit;

	if (DTE_DEBUG_NETWORK_IF & debug) {
		res = wctc4xxp_net_register(wc);
		if (res)
			goto error_exit_swinit;
	}

#	if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
	wc->watchdog.function = wctc4xxp_watchdog;
	wc->watchdog.data = (unsigned long)wc;
	init_timer(&wc->watchdog);
#	else
	timer_setup(&wc->watchdog, wctc4xxp_watchdog, 0);
#	endif

	/* ------------------------------------------------------------------
	 * Load the firmware and start the DTE.
	 * --------------------------------------------------------------- */

	res = pci_enable_device(pdev);
	if (res) {
		dev_err(&wc->pdev->dev, "Failed to enable device.\n");
		goto error_exit_swinit;;
	}
	res = pci_set_mwi(wc->pdev);
	if (res) {
		dev_warn(&wc->pdev->dev,
			 "Failed to set Memory-Write Invalidate Command Bit..\n");
	}
	pci_set_master(pdev);
	pci_set_drvdata(pdev, wc);
	res = request_irq(pdev->irq, wctc4xxp_interrupt,
			  IRQF_SHARED, wc->board_name, wc);
	if (res) {
		dev_err(&wc->pdev->dev,
			"Unable to request IRQ %d\n", pdev->irq);
		if (firmware != &embedded_firmware)
			release_firmware(firmware);
		goto error_exit_hwinit;
	}
	res = wctc4xxp_hardware_init(wc);
	if (res) {
		if (firmware != &embedded_firmware)
			release_firmware(firmware);
		goto error_exit_hwinit;
	}
	wctc4xxp_enable_interrupts(wc);
	wctc4xxp_start_dma(wc);

	res = wctc4xxp_reset_and_reload_firmware(wc, firmware);
	if (firmware != &embedded_firmware)
		release_firmware(firmware);
	if (res)
		goto error_exit_hwinit;

	/* \todo Read firmware version directly from tc400b.*/
	dev_info(&wc->pdev->dev, "(%s) Transcoder support LOADED " \
	   "(firm ver = %d.%d)\n", wc->complexname, wctc4xxp_firmware_ver,
	   wctc4xxp_firmware_ver_minor);

	reg = wctc4xxp_getctl(wc, 0x00fc);

	DTE_DEBUG(DTE_DEBUG_GENERAL,
	   "debug: (post-boot) Reg fc is %08x\n", reg);

	dev_info(&wc->pdev->dev, "Installed a Wildcard TC: %s\n", wc->variety);
	DTE_DEBUG(DTE_DEBUG_GENERAL, "Operating in DEBUG mode.\n");
	dahdi_transcoder_register(wc->uencode);
	dahdi_transcoder_register(wc->udecode);

	wctc4xxp_match_packet_counts(wc);

	wctc4xxp_create_sysfs_files(wc);

	return 0;

error_exit_hwinit:
#if defined(CONFIG_WCTC4XXP_POLLING)
	wctc4xxp_disable_polling(wc);
#endif
	wctc4xxp_stop_dma(wc);
	wctc4xxp_cleanup_command_list(wc);
	free_irq(pdev->irq, wc);
	pci_set_drvdata(pdev, NULL);
error_exit_swinit:
	wctc4xxp_net_unregister(wc);
	kfree(wc->encoders);
	kfree(wc->decoders);
	dahdi_transcoder_free(wc->uencode);
	dahdi_transcoder_free(wc->udecode);
	wctc4xxp_cleanup_descriptor_ring(wc->txd);
	kfree(wc->txd);
	wctc4xxp_cleanup_descriptor_ring(wc->rxd);
	kfree(wc->rxd);
	release_mem_region(pci_resource_start(wc->pdev, 1),
		pci_resource_len(wc->pdev, 1));
	if (wc->iobase)
		pci_iounmap(wc->pdev, wc->iobase);
	pci_clear_mwi(wc->pdev);
	wctc4xxp_remove_from_device_list(wc);
	kfree(wc);
	return res;
}

static void wctc4xxp_cleanup_channels(struct wcdte *wc)
{
	int i;
	struct dahdi_transcoder_channel *dtc_en, *dtc_de;
	struct channel_pvt *cpvt;

	for (i = 0; i < wc->numchannels; ++i) {
		dtc_en = &(wc->uencode->channels[i]);
		wctc4xxp_cleanup_channel_private(wc, dtc_en);
		dahdi_tc_clear_busy(dtc_en);
		dahdi_tc_clear_built(dtc_en);

		dtc_en->built_fmts = 0;
		cpvt = dtc_en->pvt;
		cpvt->chan_in_num = INVALID;
		cpvt->chan_out_num = INVALID;


		dtc_de = &(wc->udecode->channels[i]);
		wctc4xxp_cleanup_channel_private(wc, dtc_de);
		dahdi_tc_clear_busy(dtc_de);
		dahdi_tc_clear_built(dtc_de);

		dtc_de->built_fmts = 0;
		cpvt = dtc_de->pvt;
		cpvt->chan_in_num = INVALID;
		cpvt->chan_out_num = INVALID;
	}
}

static void __devexit wctc4xxp_remove_one(struct pci_dev *pdev)
{
	struct wcdte *wc = pci_get_drvdata(pdev);

	if (!wc)
		return;

	wctc4xxp_remove_sysfs_files(wc);

	wctc4xxp_remove_from_device_list(wc);

	set_bit(DTE_SHUTDOWN, &wc->flags);
	if (del_timer_sync(&wc->watchdog))
		del_timer_sync(&wc->watchdog);

	/* This should already be stopped, but it doesn't hurt to make sure. */
	clear_bit(DTE_POLLING, &wc->flags);
	wctc4xxp_net_unregister(wc);

	/* Stop any DMA */
	wctc4xxp_stop_dma(wc);

	/* In case hardware is still there */
	wctc4xxp_disable_interrupts(wc);

	free_irq(pdev->irq, wc);

	/* There isn't anything that would run in the workqueue that will wait
	 * on an interrupt. */

	dahdi_transcoder_unregister(wc->udecode);
	dahdi_transcoder_unregister(wc->uencode);

	/* Free Resources */
	release_mem_region(pci_resource_start(wc->pdev, 1),
		pci_resource_len(wc->pdev, 1));
	if (wc->iobase)
		pci_iounmap(wc->pdev, wc->iobase);
	pci_clear_mwi(wc->pdev);
	wctc4xxp_cleanup_descriptor_ring(wc->txd);
	kfree(wc->txd);
	wctc4xxp_cleanup_descriptor_ring(wc->rxd);
	kfree(wc->rxd);

	wctc4xxp_cleanup_command_list(wc);
	wctc4xxp_cleanup_channels(wc);

	pci_set_drvdata(pdev, NULL);

	dahdi_transcoder_free(wc->uencode);
	dahdi_transcoder_free(wc->udecode);
	kfree(wc->encoders);
	kfree(wc->decoders);
	kfree(wc);
}

static DEFINE_PCI_DEVICE_TABLE(wctc4xxp_pci_tbl) = {
	{ 0xd161, 0x3400, PCI_ANY_ID, PCI_ANY_ID,
		0, 0, (unsigned long) &wctc400p }, /* Digium board */
	{ 0xd161, 0x8004, PCI_ANY_ID, PCI_ANY_ID,
		0, 0, (unsigned long) &wctce400 }, /* Digium board */
	{ 0 }
};

MODULE_DEVICE_TABLE(pci, wctc4xxp_pci_tbl);

static int wctc4xxp_suspend(struct pci_dev *pdev, pm_message_t state)
{
	return -ENOSYS;
}

static struct pci_driver wctc4xxp_driver = {
	.name = "wctc4xxp",
	.probe = wctc4xxp_init_one,
	.remove = __devexit_p(wctc4xxp_remove_one),
	.id_table = wctc4xxp_pci_tbl,
	.suspend = wctc4xxp_suspend,
};

static int __init wctc4xxp_init(void)
{
	int res;
	unsigned long cache_flags;

#if defined(CONFIG_SLUB) && (LINUX_VERSION_CODE == KERNEL_VERSION(2, 6, 22))
	cache_flags = SLAB_HWCACHE_ALIGN | SLAB_STORE_USER | SLAB_DEBUG_FREE;
#else
	cache_flags = SLAB_HWCACHE_ALIGN;
#endif

#	if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
	cmd_cache = kmem_cache_create(THIS_MODULE->name, sizeof(struct tcb),
			0, cache_flags, NULL, NULL);
#	else
	cmd_cache = kmem_cache_create(THIS_MODULE->name, sizeof(struct tcb),
			0, cache_flags, NULL);
#	endif

	if (!cmd_cache)
		return -ENOMEM;
	spin_lock_init(&wctc4xxp_list_lock);
	INIT_LIST_HEAD(&wctc4xxp_list);
	res = dahdi_pci_module(&wctc4xxp_driver);
	if (res) {
		kmem_cache_destroy(cmd_cache);
		return -ENODEV;
	}
	return 0;
}

static void __exit wctc4xxp_cleanup(void)
{
	pci_unregister_driver(&wctc4xxp_driver);
	kmem_cache_destroy(cmd_cache);
}

module_param(debug, int, S_IRUGO | S_IWUSR);
module_param(mode, charp, S_IRUGO);
MODULE_PARM_DESC(mode, "'g729', 'g723.1', or 'any'.  Default 'any'.");
MODULE_DESCRIPTION("Wildcard TC400P+TC400M Driver");
MODULE_AUTHOR("Digium Incorporated <support@digium.com>");
MODULE_LICENSE("GPL");

module_init(wctc4xxp_init);
module_exit(wctc4xxp_cleanup);