1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
|
/*
*
* (c) 2005 Laurent Vivier <LaurentVivier@wanadoo.fr>
* from BootX, (c) Benjamin Herrenschmidt
*
*/
.chip 68020
.equ PC, 0x00FC
.equ GPR, 0x0100
.equ FPR, 0x0200
#define pc %sp@(PC)
#define gpr(a) %sp@(GPR + 8 * a + 4)
#define fpr0(a) %sp@(FPR + 8 * a)
#define fpr1(a) %sp@(FPR + 8 * a + 4)
.macro copy_GPR from=0, to=31
move.l %a1@+, gpr(\from)
.if \to-\from
copy_GPR "(\from+1)",\to
.endif
.endm
.macro copy_FPR from=0, to=31
move.l %a1@+, fpr0(\from)
move.l %a1@+, fpr1(\from)
.if \to-\from
copy_FPR "(\from+1)",\to
.endif
.endm
.align 4
.global enter_kernelPPC
enter_kernelPPC:
link.w %fp,#0
/* get physical start address of kernel */
move.l 8(%fp), %a0
/* get PPC registers values */
move.l 12(%fp), %a1
/* prepare stack */
move.l %sp, %d0
andi.l #0xFFFFFC00, %d0
move.l %d0, %sp
move.l #0x00BF, %d0
loop:
clr.l -(%sp)
dbra %d0, loop
/* Initialize PPC registers */
/* set up program counter */
/* PC */
move.l %a1@+, pc
/* GPR */
copy_GPR
/* FPR */
copy_FPR
/* Switch to PPC */
move.l #0x47617279, %a0 /* 'Gary' */
move.l #0x05051956, %a1
move.l #0x0000C000, %d0
moveq #0, %d2
reset
move.l %sp,-(%sp)
wait:
dc.w 0xFE03
beq wait
unlk %fp
rts
|
