1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323
|
/* This file is part of the FaCT++ DL reasoner
Copyright (C) 2003-2015 Dmitry Tsarkov and The University of Manchester
Copyright (C) 2015-2016 Dmitry Tsarkov
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "dlDag.h"
#include "logging.h"
#include "tDataEntry.h"
#include "tConcept.h"
DLDag :: DLDag ( const ifOptionSet* Options )
: indexAnd(*this)
, indexAll(*this)
, indexLE(*this)
, finalDagSize(0)
, nCacheHits(0)
, useDLVCache(true)
{
Heap.push_back ( new DLVertex (dtBad) ); // empty vertex -- bpINVALID
Heap.push_back ( new DLVertex (dtTop) );
readConfig ( Options );
}
DLDag :: ~DLDag ( void )
{
for ( HeapType::iterator p = Heap.begin(), p_end = Heap.end(); p < p_end; ++p )
delete *p;
}
void
DLDag :: removeQuery ( void )
{
for ( size_t i = size()-1; i >= finalDagSize; --i )
{
DLVertex* v = Heap[i];
switch ( v->Type() )
{
case dtData:
static_cast<TDataEntry*>(v->getConcept())->setBP(bpINVALID);
break;
case dtConcept:
static_cast<TConcept*>(v->getConcept())->clear();
break;
default:
break;
}
delete v;
}
Heap.resize(finalDagSize);
}
void DLDag :: readConfig ( const ifOptionSet* Options )
{
fpp_assert ( Options != NULL ); // safety check
orSortSat = Options->getText ( "orSortSat" ).c_str();
orSortSub = Options->getText ( "orSortSub" ).c_str();
if ( !isCorrectOption(orSortSat) || !isCorrectOption(orSortSub) )
throw EFaCTPlusPlus ( "DAG: wrong OR sorting options" );
}
/// set defaults of OR orderings
void
DLDag :: setOrderDefaults ( const char* defSat, const char* defSub )
{
// defaults should be correct
fpp_assert ( isCorrectOption(defSat) && isCorrectOption(defSub) );
if ( LLM.isWritable(llAlways) )
LL << "orSortSat: initial=" << orSortSat << ", default=" << defSat;
if ( orSortSat[0] == '0' )
orSortSat = defSat;
if ( LLM.isWritable(llAlways) )
LL << ", used=" << orSortSat << "\n"
<< "orSortSub: initial=" << orSortSub << ", default=" << defSub;
if ( orSortSub[0] == '0' )
orSortSub = defSub;
if ( LLM.isWritable(llAlways) )
LL << ", used=" << orSortSub << "\n";
}
/// set OR sort flags based on given option string
void DLDag :: setOrderOptions ( const char* opt )
{
// 0x means not to use OR sort
if ( opt[0] == '0' )
return;
sortAscend = (opt[1] == 'a');
preferNonGen = (opt[2] == 'p');
// all statistics use negative version (as it is used in disjunctions)
iSort = opt[0] == 'S' ? DLVertex::getStatIndexSize(false)
: opt[0] == 'D' ? DLVertex::getStatIndexDepth(false)
: opt[0] == 'B' ? DLVertex::getStatIndexBranch(false)
: opt[0] == 'G' ? DLVertex::getStatIndexGener(false)
: DLVertex::getStatIndexFreq(false);
Recompute();
}
void
DLDag :: computeVertexStat ( BipolarPointer p )
{
DLVertex& v = (*this)[p];
bool pos = isPositive(p);
// this vertex is already processed
if ( v.isProcessed(pos) )
return;
// in case of cycle: mark concept as such
if ( v.isVisited(pos) )
{
v.setInCycle(pos);
return;
}
v.setVisited(pos);
// ensure that the statistic is gather for all sub-concepts of the expression
switch ( v.Type() )
{
case dtAnd: // check all the conjuncts
for ( DLVertex::const_iterator q = v.begin(), q_end = v.end(); q < q_end; ++q )
computeVertexStat ( *q, pos );
break;
case dtProj:
if ( !pos ) // ~Proj -- nothing to do
break;
// fallthrough
case dtName:
case dtForall:
case dtChoose:
case dtLE: // check a single referenced concept
computeVertexStat ( v.getC(), pos );
break;
default: // nothing to do
break;
}
v.setProcessed(pos);
// here all the necessary statistics is gathered -- use it in the init
updateVertexStat(p);
}
void
DLDag :: updateVertexStat ( BipolarPointer p )
{
DLVertex& v = (*this)[p];
bool pos = isPositive(p);
DLVertex::StatType d = 0, s = 1, b = 0, g = 0;
if ( !v.omitStat(pos) )
{
if ( isValid(v.getC()) )
updateVertexStat ( v, v.getC(), pos );
else
for ( DLVertex::const_iterator q = v.begin(), q_end = v.end(); q < q_end; ++q )
updateVertexStat ( v, *q, pos );
}
// correct values wrt POS
d = v.getDepth(pos);
switch ( v.Type() )
{
case dtAnd:
if ( !pos )
++b; // OR is branching
break;
case dtForall:
++d; // increase depth
if ( !pos )
++g; // SOME is generating
break;
case dtLE:
++d; // increase depth
if ( !pos )
++g; // >= is generating
else if ( v.getNumberLE() != 1 )
++b; // <= is branching
break;
case dtProj:
if ( pos )
++b; // projection sometimes involves branching
break;
default:
break;
}
v.updateStatValues ( d, s, b, g, pos );
}
/// gather vertex freq statistics
void
DLDag :: computeVertexFreq ( BipolarPointer p )
{
DLVertex& v = (*this)[p];
bool pos = isPositive(p);
if ( v.isVisited(pos) ) // avoid cycles
return;
v.incFreqValue(pos); // increment frequence of current vertex
v.setVisited(pos);
if ( v.omitStat(pos) ) // negation of primitive concept-like
return;
// increment frequence of all subvertex
if ( isValid(v.getC()) )
computeVertexFreq ( v.getC(), pos );
else
for ( DLVertex::const_iterator q = v.begin(), q_end = v.end(); q != q_end; ++q )
computeVertexFreq ( *q, pos );
}
void
DLDag :: gatherStatistic ( void )
{
// gather main statistics for disjunctions
for ( StatVector::iterator p = listAnds.begin(), p_end = listAnds.end(); p < p_end; ++p )
computeVertexStat(inverse(*p));
// if necessary -- gather frequency
if ( orSortSat[0] != 'F' && orSortSub[0] != 'F' )
return;
clearDFS();
for ( BipolarPointer i = (BipolarPointer)size()-1; i > 1; --i )
{
if ( isCNameTag((*this)[i].Type()) )
computeVertexFreq(i);
}
}
//---------------------------------------------------
// change order of ADD elements with respect to Freq
//---------------------------------------------------
/// return true if p1 is less than p2 using chosen sort order
// the overall sorted entry structure looks like
// fffA..M..Zlll if sortAscend set, and
// fffZ..M..Alll if sortAscend cleared.
// here 's' means "always first" entries, like neg-primconcepts,
// and 'l' means "always last" entries, like looped concepts
// note that the statistics is given for disjunctions,
// so inversed (neg) values are taken into account
bool DLDag :: less ( BipolarPointer p1, BipolarPointer p2 ) const
{
# ifdef ENABLE_CHECKING
fpp_assert ( isValid(p1) && isValid(p2) );
# endif
// idea: any positive entry should go first
if ( preferNonGen )
{
if ( isNegative(p1) && isPositive(p2) )
return true;
if ( isPositive(p1) && isNegative(p2) )
return false;
}
const DLVertex& v1 = (*this)[p1];
const DLVertex& v2 = (*this)[p2];
/*
// prefer non-cyclical
if ( !v1.isInCycle(false) && v2.isInCycle(false) )
return true;
if ( !v2.isInCycle(false) && v1.isInCycle(false) )
return false;
*/
DLVertex::StatType key1 = v1.getStat(iSort);
DLVertex::StatType key2 = v2.getStat(iSort);
// return "less" wrt sortAscend
if ( sortAscend )
return key1 < key2;
else
return key2 < key1;
}
#ifdef RKG_PRINT_DAG_USAGE
/// print usage of DAG
void DLDag :: PrintDAGUsage ( std::ostream& o ) const
{
unsigned int n = 0; // number of no-used DAG entries
unsigned int total = Heap.size()*2-2; // number of total DAG entries
for ( HeapType::const_iterator i = Heap.begin(), i_end = Heap.end(); i < i_end; ++i )
{
if ( (*i)->getUsage(true) == 0 ) // positive and...
++n;
if ( (*i)->getUsage(false) == 0 ) // negative ones
++n;
}
o << "There are " << n << " unused DAG entries (" << (unsigned long)(n*100/total)
<< "% of " << total << " total)\n";
}
#endif
|