1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
|
#
# $Id: misc_pci_vhdl_con.src,v 1.5 2009-08-17 14:15:38 potyra Exp $
#
# Copyright (C) 2009 FAUmachine Team <info@faumachine.org>.
# This program is free software. You can redistribute it and/or modify it
# under the terms of the GNU General Public License, either version 2 of
# the License, or (at your option) any later version. See COPYING.
[options]
wordswap=yes
rotate_labels=no
sort_labels=no
generate_pinseq=no
sym_width=2600
pinwidthvertical=200
pinwidthhorizontal=200
[geda_attr]
version=20080723
name=FAUM_pcicon
device=misc_pci_vhdl_con
refdes=U?
footprint=SO20
description=PCI bus converter
documentation=http://
author=Stefan Potyra
numslots=0
[pins]
#-----------------------------------------------------
#pinnr seq type style posit. net label
#-----------------------------------------------------
1 1 io line l pci pci_bus
2 2 io line r cbe_n_0 std_logic
3 3 io line r cbe_n_1 std_logic
4 4 io line r cbe_n_2 std_logic
5 5 io line r cbe_n_3 std_logic
6 6 io line r ad_0 std_logic
7 7 io line r ad_1 std_logic
8 8 io line r ad_2 std_logic
9 9 io line r ad_3 std_logic
10 10 io line r ad_4 std_logic
11 11 io line r ad_5 std_logic
12 12 io line r ad_6 std_logic
13 13 io line r ad_7 std_logic
14 14 io line r ad_8 std_logic
15 15 io line r ad_9 std_logic
16 16 io line r ad_10 std_logic
17 17 io line r ad_11 std_logic
18 18 io line r ad_12 std_logic
19 19 io line r ad_13 std_logic
20 20 io line r ad_14 std_logic
21 21 io line r ad_15 std_logic
22 22 io line r ad_16 std_logic
23 23 io line r ad_17 std_logic
24 24 io line r ad_18 std_logic
25 25 io line r ad_19 std_logic
26 26 io line r ad_20 std_logic
27 27 io line r ad_21 std_logic
28 28 io line r ad_22 std_logic
29 29 io line r ad_23 std_logic
30 30 io line r ad_24 std_logic
31 31 io line r ad_25 std_logic
32 32 io line r ad_26 std_logic
33 33 io line r ad_27 std_logic
34 34 io line r ad_28 std_logic
35 35 io line r ad_29 std_logic
36 36 io line r ad_30 std_logic
37 37 io line r ad_31 std_logic
38 38 io line r par std_logic
39 39 io line r frame_n std_logic
40 40 io line r trdy_n std_logic
41 41 io line r irdy_n std_logic
42 42 io line r stop_n std_logic
43 43 io line r devsel_n std_logic
44 44 out line r idsel std_logic
45 45 io line r perr_n std_logic
46 46 io line r serr_n std_logic
#47 47 in line r req_n std_logic
#48 48 out line r ack_n std_logic
47 47 out line r clk std_logic
48 48 out line r rst_n std_logic
|
