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.TH fcml-disasm 1 "February 2, 2015" fcml
.SH NAME
fcml\-disasm \- single-line disassembler
.SH SYNOPSIS
.B fcml\-disasm
.RB [ \-s "] [" \-e "] [" \-rc "] [" \-rh "] [" \-rz "] [" \-rs "] [" \-gas ]
.RB [ \-asa "<\fIsize\fP>]"
.RB [ \-osa "<\fIsize\fP>]"
.BR \-m <\fIsize\fP>
.BR \-ip " <\fIaddress\fP>"
.RI < code >
.SH DESCRIPTION
.B fcml\-disasm
is a single-line disassembler for Intel \fIi\fPAP\fIx\fP86, IA-32 and
EM64T CPUs, and compatible CPUs from other manufacturers.
.PP
It displays all possible interpretations of the given machine code.
.PP
.SH OPTIONS
.B fcml\-disasm
accepts the following options:
.TP
.BR \-s
Prefer short instruction forms.
.TP
.BR \-e
Extend displacement sizes to address size attribute.
.TP
.BR \-rc
Render instruction code.
.TP
.BR \-rh
Render immediate values and displacements as hexadecimal.
.TP
.BR \-rz
Remove leading zeroes.
.TP
.BR \-rs
Render segment prefixes even when they are optional.
.TP
.BR \-gas
Use GNU Assembler dialect (also known as AT&T). The Intel dialect is
used by default.
.TP
.BR \-asa <\fIsize\fP>
Specify the size of the address size attribute (\fR16\fP, \fR32\fP or
\fR64\fP for respectively 16, 32 and 63 bits).
.TP
.BR \-osa <\fIsize\fP>
Specify the size of the operand size attribute (\fR16\fP, \fR32\fP or
\fR64\fP for respectively 16, 32 and 63 bits).
.TP
.BR \-m <\fIsize\fP>
Specify the addressing mode (\fR16\fP, \fR32\fP or \fR64\fP).
.TP
.BR \-ip " <\fIaddress\fP>"
Specify the instruction pointer address (IP, EIP or RIP).
.SH AUTHORS
\fBfcml\-disasm\fP was written by Slawomir Wojtasiak.
.PP
This manual page was written by Stephen Kitt <skitt@debian.org>, for
the Debian GNU/Linux system (but may be used by others).
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