1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
|
{
Copyright (c) 2008 by Florian Klaempfl
Code generation for add nodes on the AVR
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
****************************************************************************
}
unit navradd;
{$i fpcdefs.inc}
interface
uses
node,ncgadd,cpubase;
type
tavraddnode = class(tcgaddnode)
private
function GetResFlags(unsigned:Boolean):TResFlags;
protected
function pass_1 : tnode;override;
procedure second_cmpordinal;override;
procedure second_cmpsmallset;override;
procedure second_cmp64bit;override;
procedure second_cmp;
end;
implementation
uses
globtype,systems,
cutils,verbose,globals,
symconst,symdef,paramgr,
aasmbase,aasmtai,aasmdata,aasmcpu,defutil,htypechk,
cgbase,cgutils,cgcpu,
cpuinfo,pass_1,pass_2,regvars,procinfo,
cpupara,
ncon,nset,nadd,
ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32;
{*****************************************************************************
TSparcAddNode
*****************************************************************************}
function tavraddnode.GetResFlags(unsigned:Boolean):TResFlags;
begin
case NodeType of
equaln:
GetResFlags:=F_EQ;
unequaln:
GetResFlags:=F_NE;
else
if not(unsigned) then
begin
if nf_swapped in flags then
case NodeType of
ltn:
GetResFlags:=F_NotPossible;
lten:
GetResFlags:=F_GE;
gtn:
GetResFlags:=F_LT;
gten:
GetResFlags:=F_NotPossible;
end
else
case NodeType of
ltn:
GetResFlags:=F_LT;
lten:
GetResFlags:=F_NotPossible;
gtn:
GetResFlags:=F_NotPossible;
gten:
GetResFlags:=F_GE;
end;
end
else
begin
if nf_swapped in Flags then
case NodeType of
ltn:
GetResFlags:=F_NotPossible;
lten:
GetResFlags:=F_CS;
gtn:
GetResFlags:=F_CC;
gten:
GetResFlags:=F_NotPossible;
end
else
case NodeType of
ltn:
GetResFlags:=F_CC;
lten:
GetResFlags:=F_NotPossible;
gtn:
GetResFlags:=F_NotPossible;
gten:
GetResFlags:=F_CS;
end;
end;
end;
end;
procedure tavraddnode.second_cmpsmallset;
procedure gencmp(tmpreg1,tmpreg2 : tregister);
var
i : byte;
begin
current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CP,tmpreg1,tmpreg2));
for i:=2 to tcgsize2size[left.location.size] do
begin
tmpreg1:=GetNextReg(tmpreg1);
tmpreg2:=GetNextReg(tmpreg2);
current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CPC,tmpreg1,tmpreg2));
end;
end;
var
tmpreg : tregister;
begin
pass_left_right;
location_reset(location,LOC_FLAGS,OS_NO);
force_reg_left_right(false,false);
case nodetype of
equaln:
begin
gencmp(left.location.register,right.location.register);
location.resflags:=F_EQ;
end;
unequaln:
begin
gencmp(left.location.register,right.location.register);
location.resflags:=F_NE;
end;
lten,
gten:
begin
if (not(nf_swapped in flags) and
(nodetype = lten)) or
((nf_swapped in flags) and
(nodetype = gten)) then
swapleftright;
tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_AND,location.size,
left.location.register,right.location.register,tmpreg);
gencmp(tmpreg,right.location.register);
location.resflags:=F_EQ;
end;
else
internalerror(2004012401);
end;
end;
procedure tavraddnode.second_cmp;
var
unsigned : boolean;
tmpreg1,tmpreg2 : tregister;
i : longint;
begin
pass_left_right;
force_reg_left_right(true,false);
unsigned:=not(is_signed(left.resultdef)) or
not(is_signed(right.resultdef));
if getresflags(unsigned)=F_NotPossible then
swapleftright;
current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CP,left.location.register,right.location.register));
tmpreg1:=left.location.register;
tmpreg2:=right.location.register;
for i:=2 to tcgsize2size[left.location.size] do
begin
tmpreg1:=GetNextReg(tmpreg1);
tmpreg2:=GetNextReg(tmpreg2);
if i=5 then
begin
tmpreg1:=left.location.registerhi;
tmpreg2:=right.location.registerhi;
end;
current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CPC,tmpreg1,tmpreg2));
end;
location_reset(location,LOC_FLAGS,OS_NO);
location.resflags:=getresflags(unsigned);
end;
procedure tavraddnode.second_cmp64bit;
begin
second_cmp;
end;
function tavraddnode.pass_1 : tnode;
begin
result:=inherited pass_1;
{
if not(assigned(result)) then
begin
unsigned:=not(is_signed(left.resultdef)) or
not(is_signed(right.resultdef));
if is_64bit(left.resultdef) and
((nodetype in [equaln,unequaln]) or
(unsigned and (nodetype in [ltn,lten,gtn,gten]))
) then
expectloc:=LOC_FLAGS;
end;
{ handling boolean expressions }
if not(assigned(result)) and
(
not(is_boolean(left.resultdef)) or
not(is_boolean(right.resultdef)) or
is_dynamic_array(left.resultdef)
) then
expectloc:=LOC_FLAGS;
}
end;
procedure tavraddnode.second_cmpordinal;
begin
second_cmp;
end;
begin
caddnode:=tavraddnode;
end.
|
