1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
|
/* Verify that overloaded built-ins for vec_cmp with long long
inputs produce the right code. */
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_p8vector_ok } */
/* { dg-options "-mpower8-vector -O2" } */
#include <altivec.h>
vector bool long long
test3_eq (vector signed long long x, vector signed long long y)
{
return vec_cmpeq (x, y);
}
vector bool long long
test6_eq (vector unsigned long long x, vector unsigned long long y)
{
return vec_cmpeq (x, y);
}
vector bool long long
test3_ge (vector signed long long x, vector signed long long y)
{
return vec_cmpge (x, y);
}
vector bool long long
test6_ge (vector unsigned long long x, vector unsigned long long y)
{
return vec_cmpge (x, y);
}
vector bool long long
test3_gt (vector signed long long x, vector signed long long y)
{
return vec_cmpgt (x, y);
}
vector bool long long
test6_gt (vector unsigned long long x, vector unsigned long long y)
{
return vec_cmpgt (x, y);
}
vector bool long long
test3_le (vector signed long long x, vector signed long long y)
{
return vec_cmple (x, y);
}
vector bool long long
test6_le (vector unsigned long long x, vector unsigned long long y)
{
return vec_cmple (x, y);
}
vector bool long long
test3_lt (vector signed long long x, vector signed long long y)
{
return vec_cmplt (x, y);
}
vector bool long long
test6_lt (vector unsigned long long x, vector unsigned long long y)
{
return vec_cmplt (x, y);
}
vector bool long long
test3_ne (vector signed long long x, vector signed long long y)
{
return vec_cmpne (x, y);
}
vector bool long long
test6_ne (vector unsigned long long x, vector unsigned long long y)
{
return vec_cmpne (x, y);
}
/* { dg-final { scan-assembler-times "vcmpequd" 4 } } */
/* { dg-final { scan-assembler-times "vcmpgtsd" 4 } } */
/* { dg-final { scan-assembler-times "vcmpgtud" 4 } } */
/* { dg-final { scan-assembler-times "xxlnor" 6 } } */
|
