File: vec-rotate-3.c

package info (click to toggle)
gcc-arm-none-eabi 15%3A12.2.rel1-1
  • links: PTS, VCS
  • area: main
  • in suites: bookworm
  • size: 959,712 kB
  • sloc: cpp: 3,275,382; ansic: 2,061,766; ada: 840,956; f90: 208,513; makefile: 76,132; asm: 73,433; xml: 50,448; exp: 34,146; sh: 32,436; objc: 15,637; fortran: 14,012; python: 11,991; pascal: 6,787; awk: 4,779; perl: 3,054; yacc: 338; ml: 285; lex: 201; haskell: 122
file content (40 lines) | stat: -rw-r--r-- 1,063 bytes parent folder | download | duplicates (2) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
 
/* { dg-options "-O3 -maltivec" } */
/* { dg-require-effective-target powerpc_altivec_ok } */

/* Check vectorizer can exploit vector rotation instructions on Power, mainly
   for the case rotation count isn't const number.

   Check for instructions vrlb/vrlh/vrlw only available if altivec supported. */

#define N 256
unsigned int suw[N], ruw[N];
unsigned short suh[N], ruh[N];
unsigned char sub[N], rub[N];
extern unsigned char rot_cnt;

void
testUW ()
{
  for (int i = 0; i < 256; ++i)
    ruw[i] = (suw[i] >> rot_cnt) | (suw[i] << (sizeof (suw[0]) * 8 - rot_cnt));
}

void
testUH ()
{
  for (int i = 0; i < 256; ++i)
    ruh[i] = (unsigned short) (suh[i] >> rot_cnt)
	     | (unsigned short) (suh[i] << (sizeof (suh[0]) * 8 - rot_cnt));
}

void
testUB ()
{
  for (int i = 0; i < 256; ++i)
    rub[i] = (unsigned char) (sub[i] >> rot_cnt)
	     | (unsigned char) (sub[i] << (sizeof (sub[0]) * 8 - rot_cnt));
}

/* { dg-final { scan-assembler {\mvrlw\M} } } */
/* { dg-final { scan-assembler {\mvrlh\M} } } */
/* { dg-final { scan-assembler {\mvrlb\M} } } */