File: shift-and-1.c

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gcc-arm-none-eabi 15%3A12.2.rel1-1
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/* { dg-do compile } */
/* { dg-options "-march=rv32gc -mabi=ilp32" } */
/* { dg-skip-if "" { *-*-* } { "-O0" } } */

/* Test for <optab>si3_mask.  */
int
sub1 (int i, int j)
{
  return i << (j & 0x1f);
}
/* { dg-final { scan-assembler-not "andi" } } */