File: ira-shrinkwrap-prep-2.c

package info (click to toggle)
gcc-riscv64-unknown-elf 8.3.0.2019.08%2Bdfsg-1
  • links: PTS, VCS
  • area: main
  • in suites: bullseye
  • size: 680,956 kB
  • sloc: ansic: 3,237,715; cpp: 896,882; ada: 772,854; f90: 144,254; asm: 68,788; makefile: 67,456; sh: 29,743; exp: 28,045; objc: 15,273; fortran: 11,885; python: 7,369; pascal: 5,375; awk: 3,725; perl: 2,872; yacc: 316; xml: 311; ml: 285; lex: 198; haskell: 122
file content (35 lines) | stat: -rw-r--r-- 859 bytes parent folder | download | duplicates (4) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
 
/* { dg-do compile { target { { { i?86-*-* x86_64-*-* } && lp64 } || { { powerpc*-*-* && lp64 } || { arm_nothumb || { aarch64*-*-* && lp64 } } } } } } */
/* { dg-options "-O3 -fdump-rtl-ira -fdump-rtl-pro_and_epilogue -fno-ipa-ra"  } */

long __attribute__((noinline, noclone))
foo (long a)
{
  return a + 5;
}

static long g;

long __attribute__((noinline, noclone))
bar (long a)
{
  long r;

  if (a)
    {
      r = a;
      while (r < 500)
	if (r % 2)
	  r = foo (r);
	else
	  r = foo (r+1);
      g = r + a;
    }
  else
    r = g+1;
  return r;
}

/* { dg-final { scan-rtl-dump "Will split live ranges of parameters" "ira"  } } */
/* { dg-final { scan-rtl-dump "Split live-range of register" "ira"  } } */
/* XFAIL due to PR70681.  */ 
/* { dg-final { scan-rtl-dump "Performing shrink-wrapping" "pro_and_epilogue" { xfail arm*-*-* powerpc*-*-* } } } */