1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
|
# frv testcase for smulicc $GRi,$GRj,$GRk
# mach: all
.include "testutils.inc"
start
.global smulicc
smulicc:
; Positive operands
set_gr_immed 3,gr7 ; multiply small numbers
set_icc 0x0,0
smulicc gr7,2,gr8,icc0
test_icc 0 0 0 0 icc0
test_gr_immed 0,gr8
test_gr_immed 6,gr9
set_gr_immed 1,gr7 ; multiply by 1
set_icc 0x1,0
smulicc gr7,2,gr8,icc0
test_icc 0 0 0 1 icc0
test_gr_immed 0,gr8
test_gr_immed 2,gr9
set_gr_immed 2,gr7 ; multiply by 1
set_icc 0x2,0
smulicc gr7,1,gr8,icc0
test_icc 0 0 1 0 icc0
test_gr_immed 0,gr8
test_gr_immed 2,gr9
set_gr_immed 0,gr7 ; multiply by 0
set_icc 0x3,0
smulicc gr7,2,gr8,icc0
test_icc 0 1 1 1 icc0
test_gr_immed 0,gr8
test_gr_immed 0,gr9
set_gr_immed 2,gr7 ; multiply by 0
set_icc 0x4,0
smulicc gr7,0,gr8,icc0
test_icc 0 1 0 0 icc0
test_gr_immed 0,gr8
test_gr_immed 0,gr9
set_gr_limmed 0x3fff,0xffff,gr7 ; 31 bit result
set_icc 0x5,0
smulicc gr7,2,gr8,icc0
test_icc 0 0 0 1 icc0
test_gr_immed 0,gr8
test_gr_limmed 0x7fff,0xfffe,gr9
set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result
set_icc 0x6,0
smulicc gr7,2,gr8,icc0
test_icc 0 0 1 0 icc0
test_gr_immed 0,gr8
test_gr_limmed 0x8000,0x0000,gr9
set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result
set_icc 0x7,0
smulicc gr7,4,gr8,icc0
test_icc 0 0 1 1 icc0
test_gr_immed 1,gr8
test_gr_limmed 0x0000,0x0000,gr9
set_gr_limmed 0x7fff,0xffff,gr7 ; max positive result
set_icc 0x8,0
smulicc gr7,0x1ff,gr8,icc0
test_icc 0 0 0 0 icc0
test_gr_immed 0xff,gr8
test_gr_limmed 0x7fff,0xfe01,gr9
; Mixed operands
set_gr_immed -3,gr7 ; multiply small numbers
set_icc 0x9,0
smulicc gr7,2,gr8,icc0
test_icc 1 0 0 1 icc0
test_gr_immed -1,gr8
test_gr_immed -6,gr9
set_gr_immed 3,gr7 ; multiply small numbers
set_icc 0xa,0
smulicc gr7,-2,gr8,icc0
test_icc 1 0 1 0 icc0
test_gr_immed -1,gr8
test_gr_immed -6,gr9
set_gr_immed 1,gr7 ; multiply by 1
set_icc 0xb,0
smulicc gr7,-2,gr8,icc0
test_icc 1 0 1 1 icc0
test_gr_immed -1,gr8
test_gr_immed -2,gr9
set_gr_immed -2,gr7 ; multiply by 1
set_icc 0xc,0
smulicc gr7,1,gr8,icc0
test_icc 1 0 0 0 icc0
test_gr_immed -1,gr8
test_gr_immed -2,gr9
set_gr_immed 0,gr7 ; multiply by 0
set_icc 0xd,0
smulicc gr7,-2,gr8,icc0
test_icc 0 1 0 1 icc0
test_gr_immed 0,gr8
test_gr_immed 0,gr9
set_gr_immed -2,gr7 ; multiply by 0
set_icc 0xe,0
smulicc gr7,0,gr8,icc0
test_icc 0 1 1 0 icc0
test_gr_immed 0,gr8
test_gr_immed 0,gr9
set_gr_limmed 0x2000,0x0001,gr7 ; 31 bit result
set_icc 0xf,0
smulicc gr7,-2,gr8,icc0
test_icc 1 0 1 1 icc0
test_gr_limmed 0xffff,0xffff,gr8
test_gr_limmed 0xbfff,0xfffe,gr9
set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result
set_icc 0x0,0
smulicc gr7,-2,gr8,icc0
test_icc 1 0 0 0 icc0
test_gr_limmed 0xffff,0xffff,gr8
test_gr_limmed 0x8000,0x0000,gr9
set_gr_limmed 0x4000,0x0001,gr7 ; 32 bit result
set_icc 0x1,0
smulicc gr7,-2,gr8,icc0
test_icc 1 0 0 1 icc0
test_gr_limmed 0xffff,0xffff,gr8
test_gr_limmed 0x7fff,0xfffe,gr9
set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result
set_icc 0x2,0
smulicc gr7,-4,gr8,icc0
test_icc 1 0 1 0 icc0
test_gr_limmed 0xffff,0xffff,gr8
test_gr_limmed 0x0000,0x0000,gr9
set_gr_limmed 0x7fff,0xffff,gr7 ; max negative result
set_icc 0x3,0
smulicc gr7,-512,gr8,icc0
test_icc 1 0 1 1 icc0
test_gr_limmed 0xffff,0xff00,gr8
test_gr_limmed 0x0000,0x0200,gr9
; Negative operands
set_gr_immed -3,gr7 ; multiply small numbers
set_icc 0x4,0
smulicc gr7,-2,gr8,icc0
test_icc 0 0 0 0 icc0
test_gr_immed 0,gr8
test_gr_immed 6,gr9
set_gr_immed -1,gr7 ; multiply by 1
set_icc 0x5,0
smulicc gr7,-2,gr8,icc0
test_icc 0 0 0 1 icc0
test_gr_immed 0,gr8
test_gr_immed 2,gr9
set_gr_immed -2,gr7 ; multiply by 1
set_icc 0x6,0
smulicc gr7,-1,gr8,icc0
test_icc 0 0 1 0 icc0
test_gr_immed 0,gr8
test_gr_immed 2,gr9
set_gr_limmed 0xc000,0x0001,gr7 ; 31 bit result
set_icc 0x7,0
smulicc gr7,-2,gr8,icc0
test_icc 0 0 1 1 icc0
test_gr_immed 0,gr8
test_gr_limmed 0x7fff,0xfffe,gr9
set_gr_limmed 0xc000,0x0000,gr7 ; 32 bit result
set_icc 0x8,0
smulicc gr7,-2,gr8,icc0
test_icc 0 0 0 0 icc0
test_gr_immed 0,gr8
test_gr_limmed 0x8000,0x0000,gr9
set_gr_limmed 0xc000,0x0000,gr7 ; 33 bit result
set_icc 0x9,0
smulicc gr7,-4,gr8,icc0
test_icc 0 0 0 1 icc0
test_gr_immed 1,gr8
test_gr_immed 0x00000000,gr9
set_gr_limmed 0x8000,0x0001,gr7 ; almost max positive result
set_icc 0xa,0
smulicc gr7,-512,gr8,icc0
test_icc 0 0 1 0 icc0
test_gr_limmed 0x0000,0x00ff,gr8
test_gr_limmed 0xffff,0xfe00,gr9
set_gr_limmed 0x8000,0x0000,gr7 ; max positive result
set_icc 0xb,0
smulicc gr7,-512,gr8,icc0
test_icc 0 0 1 1 icc0
test_gr_limmed 0x0000,0x0100,gr8
test_gr_limmed 0x0000,0x0000,gr9
pass
|
