1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
|
# Hitachi H8 testcase 'biand', 'bior', 'bixor', 'bild', 'bist', 'bistz'
# mach(): all
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2
# as(h8sx): --defsym sim_cpu=3
# ld(h8300h): -m h8300helf
# ld(h8300s): -m h8300self
# ld(h8sx): -m h8300sxelf
.include "testutils.inc"
.data
byte_src: .byte 0xa5
byte_dst: .byte 0
start
biand_imm3_reg8:
set_grs_a5a5
set_ccr_zero
;; biand xx:3, reg8
biand #6, r0l ; this should NOT set the carry flag.
test_cc_clear
biand #7, r0l ; this should NOT set the carry flag.
test_cc_clear
orc #1, ccr ; set the carry flag
biand #6, r0l ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
biand #7, r0l ; this should clear the carry flag
test_cc_clear
test_grs_a5a5 ; general registers should not be changed.
biand_imm3_ind:
set_grs_a5a5
.if (sim_cpu == h8300)
mov #byte_src, r1
set_ccr_zero
;; biand xx:3, ind
biand #6, @r1 ; this should NOT set the carry flag.
test_cc_clear
biand #7, @r1 ; this should NOT set the carry flag.
test_cc_clear
orc #1, ccr ; set the carry flag
biand #6, @r1 ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
biand #7, @r1 ; this should clear the carry flag
test_cc_clear
;;; test_h_gr16 byte_src r1 ;FIXME
.else
mov #byte_src, er1
set_ccr_zero
;; biand xx:3, ind
biand #6, @er1 ; this should NOT set the carry flag.
test_cc_clear
biand #7, @er1 ; this should NOT set the carry flag.
test_cc_clear
orc #1, ccr ; set the carry flag
biand #6, @er1 ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
biand #7, @er1 ; this should clear the carry flag
test_cc_clear
test_h_gr32 byte_src er1
.endif ; h8300
test_gr_a5a5 0 ; general registers should not be changed.
test_gr_a5a5 2
test_gr_a5a5 3
test_gr_a5a5 4
test_gr_a5a5 5
test_gr_a5a5 6
test_gr_a5a5 7
biand_imm3_abs8:
set_grs_a5a5
mov.b r1l, @0x20
set_ccr_zero
;; biand xx:3, aa:8
biand #6, @0x20:8 ; this should NOT set the carry flag.
test_cc_clear
biand #7, @0x20:8 ; this should NOT set the carry flag.
test_cc_clear
orc #1, ccr ; set the carry flag
biand #6, @0x20:8 ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
biand #7, @0x20:8 ; this should clear the carry flag
test_cc_clear
test_grs_a5a5 ; general registers should not be changed.
.if (sim_cpu > h8300h)
biand_imm3_abs16:
set_grs_a5a5
set_ccr_zero
;; biand xx:3, aa:16
biand #6, @byte_src:16 ; this should NOT set the carry flag.
test_cc_clear
biand #7, @byte_src:16 ; this should NOT set the carry flag.
test_cc_clear
orc #1, ccr ; set the carry flag
biand #6, @byte_src:16 ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
biand #7, @byte_src:16 ; this should clear the carry flag
test_cc_clear
test_grs_a5a5 ; general registers should not be changed.
biand_imm3_abs32:
set_grs_a5a5
set_ccr_zero
;; biand xx:3, aa:32
biand #6, @byte_src:32 ; this should NOT set the carry flag.
test_cc_clear
biand #7, @byte_src:32 ; this should NOT set the carry flag.
test_cc_clear
orc #1, ccr ; set the carry flag
biand #6, @byte_src:32 ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
biand #7, @byte_src:32 ; this should clear the carry flag
test_cc_clear
test_grs_a5a5 ; general registers should not be changed.
.endif
bior_imm3_reg8:
set_grs_a5a5
set_ccr_zero
;; bior xx:3, reg8
bior #7, r0l ; this should NOT set the carry flag.
test_cc_clear
bior #6, r0l ; this should set the carry flag.
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
orc #1, ccr ; set the carry flag
bior #6, r0l ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
bior #7, r0l ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
test_grs_a5a5 ; general registers should not be changed.
bior_imm3_abs8:
set_grs_a5a5
mov.b r1l, @0x20
set_ccr_zero
;; bior xx:3, aa:8
bior #7, @0x20:8 ; this should NOT set the carry flag.
test_cc_clear
bior #6, @0x20:8 ; this should set the carry flag.
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
orc #1, ccr ; set the carry flag
bior #6, @0x20:8 ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
bior #7, @0x20:8 ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
test_grs_a5a5 ; general registers should not be changed.
bixor_imm3_reg8:
set_grs_a5a5
set_ccr_zero
;; bixor xx:3, reg8
bixor #7, r0l ; this should NOT set the carry flag.
test_cc_clear
bixor #6, r0l ; this should set the carry flag.
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
orc #1, ccr ; set the carry flag
bixor #7, r0l ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
bixor #6, r0l ; this should clear the carry flag
test_cc_clear
test_grs_a5a5 ; general registers should not be changed.
bixor_imm3_abs8:
set_grs_a5a5
mov.b r1l, @0x20
set_ccr_zero
;; bixor xx:3, aa:8
bixor #7, @0x20:8 ; this should NOT set the carry flag.
test_cc_clear
bixor #6, @0x20:8 ; this should set the carry flag.
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
orc #1, ccr ; set the carry flag
bixor #7, @0x20:8 ; this should NOT clear the carry flag
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
bixor #6, @0x20:8 ; this should clear the carry flag
test_cc_clear
test_grs_a5a5 ; general registers should not be changed.
bild_imm3_reg8:
set_grs_a5a5
set_ccr_zero
;; bild xx:3, reg8
bild #7, r0l ; this should NOT set the carry flag.
test_cc_clear
bild #6, r0l ; this should set the carry flag.
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
test_grs_a5a5 ; general registers should not be changed.
bild_imm3_ind:
set_grs_a5a5
.if (sim_cpu == h8300)
mov #byte_src, r1
set_ccr_zero
;; bild xx:3, ind
bild #7, @r1 ; this should NOT set the carry flag.
test_cc_clear
bild #6, @r1 ; this should set the carry flag.
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
;;; test_h_gr16 byte_src r1 ;FIXME
.else
mov #byte_src, er1
set_ccr_zero
;; bild xx:3, ind
bild #7, @er1 ; this should NOT set the carry flag.
test_cc_clear
bild #6, @er1 ; this should NOT set the carry flag.
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
test_h_gr32 byte_src er1
.endif ; h8300
test_gr_a5a5 0 ; general registers should not be changed.
test_gr_a5a5 2
test_gr_a5a5 3
test_gr_a5a5 4
test_gr_a5a5 5
test_gr_a5a5 6
test_gr_a5a5 7
bild_imm3_abs8:
set_grs_a5a5
mov.b r1l, @0x20
set_ccr_zero
;; bild xx:3, aa:8
bild #7, @0x20:8 ; this should NOT set the carry flag.
test_cc_clear
bild #6, @0x20:8 ; this should set the carry flag.
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
test_grs_a5a5 ; general registers should not be changed.
.if (sim_cpu > h8300h)
bild_imm3_abs16:
set_grs_a5a5
set_ccr_zero
;; bild xx:3, aa:16
bild #7, @byte_src:16 ; this should NOT set the carry flag.
test_cc_clear
bild #6, @byte_src:16 ; this should set the carry flag.
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
test_grs_a5a5 ; general registers should not be changed.
bild_imm3_abs32:
set_grs_a5a5
set_ccr_zero
;; bild xx:3, aa:32
bild #7, @byte_src:32 ; this should NOT set the carry flag.
test_cc_clear
bild #6, @byte_src:32 ; this should set the carry flag.
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
test_grs_a5a5 ; general registers should not be changed.
.endif
bist_imm3_reg8:
set_grs_a5a5
set_ccr_zero
;; bist xx:3, reg8
bist #6, r0l ; this should set bit 6
test_cc_clear
test_h_gr16 0xa5e5 r0
set_ccr_zero
orc #1, ccr ; set the carry flag
bist #7, r0l ; this should clear bit 7
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
test_h_gr16 0xa565 r0
test_gr_a5a5 1 ; Rest of general regs should not be changed.
test_gr_a5a5 2
test_gr_a5a5 3
test_gr_a5a5 4
test_gr_a5a5 5
test_gr_a5a5 6
test_gr_a5a5 7
bist_imm3_abs8:
set_grs_a5a5
mov.b r1l, @0x20
set_ccr_zero
;; bist xx:3, aa:8
bist #6, @0x20:8 ; this should set bit 6
test_cc_clear
mov.b @0x20, r0l
test_h_gr16 0xa5e5 r0
set_ccr_zero
orc #1, ccr ; set the carry flag
bist #7, @0x20:8 ; this should clear bit 7
test_carry_set
test_ovf_clear
test_neg_clear
test_zero_clear
mov.b @0x20, r0l
test_h_gr16 0xa565 r0
test_gr_a5a5 1 ; general registers should not be changed.
test_gr_a5a5 2
test_gr_a5a5 3
test_gr_a5a5 4
test_gr_a5a5 5
test_gr_a5a5 6
test_gr_a5a5 7
.if (sim_cpu == h8sx)
bistz_imm3_abs8:
set_grs_a5a5
mov.b r1l, @0x20
set_ccr_zero
;; bistz xx:3, aa:8
bistz #6, @0x20:8 ; this should set bit 6
test_cc_clear
mov.b @0x20, r0l
test_h_gr16 0xa5e5 r0
set_ccr_zero
orc #4, ccr ; set the zero flag
bistz #7, @0x20:8 ; this should clear bit 7
test_carry_clear
test_ovf_clear
test_neg_clear
test_zero_set
mov.b @0x20, r0l
test_h_gr16 0xa565 r0
test_gr_a5a5 1 ; general registers should not be changed.
test_gr_a5a5 2
test_gr_a5a5 3
test_gr_a5a5 4
test_gr_a5a5 5
test_gr_a5a5 6
test_gr_a5a5 7
.endif ; h8sx
bnot_imm3_reg8:
set_grs_a5a5
set_ccr_zero
;; bnot xx:3, reg8
bnot #7, r0l
test_cc_clear
test_h_gr16 0xa525 r0
set_ccr_zero
bnot #6, r0l
test_cc_clear
test_h_gr16 0xa565 r0
set_ccr_zero
bnot #5, r0l
test_cc_clear
test_h_gr16 0xa545 r0
set_ccr_zero
bnot #4, r0l
test_cc_clear
test_h_gr16 0xa555 r0
set_ccr_zero
bnot #4, r0l
bnot #5, r0l
bnot #6, r0l
bnot #7, r0l
test_cc_clear
test_grs_a5a5 ; general registers should not be changed.
bnot_imm3_abs8:
set_grs_a5a5
mov.b r1l, @0x20
set_ccr_zero
;; bnot xx:3, aa:8
bnot #7, @0x20:8
bnot #6, @0x20:8
bnot #5, @0x20:8
bnot #4, @0x20:8
test_cc_clear
test_grs_a5a5
mov @0x20, r0l
test_h_gr16 0xa555 r0
pass
exit 0
|
