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|
# frv testcase for bcgtlr $ICCi,$ccond,$hint
# mach: all
.include "testutils.inc"
start
.global bcgtlr
bcgtlr:
; ccond is true
set_spr_immed 128,lcr
set_spr_addr ok1,lr
set_icc 0x0 0
bcgtlr icc0,0,0
fail
ok1:
set_spr_addr ok2,lr
set_icc 0x1 1
bcgtlr icc1,0,1
fail
ok2:
set_spr_addr bad,lr
set_icc 0x2 2
bcgtlr icc2,0,2
set_spr_addr bad,lr
set_icc 0x3 3
bcgtlr icc3,0,3
set_spr_addr bad,lr
set_icc 0x4 0
bcgtlr icc0,0,0
set_spr_addr bad,lr
set_icc 0x5 1
bcgtlr icc1,0,1
set_spr_addr bad,lr
set_icc 0x6 2
bcgtlr icc2,0,2
set_spr_addr bad,lr
set_icc 0x7 3
bcgtlr icc3,0,3
set_spr_addr bad,lr
set_icc 0x8 0
bcgtlr icc0,0,0
set_spr_addr bad,lr
set_icc 0x9 1
bcgtlr icc1,0,1
set_spr_addr okb,lr
set_icc 0xa 2
bcgtlr icc2,0,2
fail
okb:
set_spr_addr okc,lr
set_icc 0xb 3
bcgtlr icc3,0,3
fail
okc:
set_spr_addr bad,lr
set_icc 0xc 0
bcgtlr icc0,0,0
set_spr_addr bad,lr
set_icc 0xd 1
bcgtlr icc1,0,1
set_spr_addr bad,lr
set_icc 0xe 2
bcgtlr icc2,0,2
set_spr_addr bad,lr
set_icc 0xf 3
bcgtlr icc3,0,3
; ccond is true
set_spr_immed 1,lcr
set_spr_addr okh,lr
set_icc 0x0 0
bcgtlr icc0,1,0
fail
okh:
set_spr_immed 1,lcr
set_spr_addr oki,lr
set_icc 0x1 1
bcgtlr icc1,1,1
fail
oki:
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x2 2
bcgtlr icc2,1,2
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x3 3
bcgtlr icc3,1,3
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x4 0
bcgtlr icc0,1,0
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x5 1
bcgtlr icc1,1,1
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x6 2
bcgtlr icc2,1,2
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x7 3
bcgtlr icc3,1,3
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x8 0
bcgtlr icc0,1,0
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x9 1
bcgtlr icc1,1,1
set_spr_immed 1,lcr
set_spr_addr okr,lr
set_icc 0xa 2
bcgtlr icc2,1,2
fail
okr:
set_spr_immed 1,lcr
set_spr_addr oks,lr
set_icc 0xb 3
bcgtlr icc3,1,3
fail
oks:
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0xc 0
bcgtlr icc0,1,0
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0xd 1
bcgtlr icc1,1,1
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0xe 2
bcgtlr icc2,1,2
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0xf 3
bcgtlr icc3,1,3
; ccond is false
set_spr_immed 128,lcr
set_spr_addr bad,lr
set_icc 0x0 0
bcgtlr icc0,1,0
set_icc 0x1 1
bcgtlr icc1,1,1
set_icc 0x2 2
bcgtlr icc2,1,2
set_icc 0x3 3
bcgtlr icc3,1,3
set_icc 0x4 0
bcgtlr icc0,1,0
set_icc 0x5 1
bcgtlr icc1,1,1
set_icc 0x6 2
bcgtlr icc2,1,2
set_icc 0x7 3
bcgtlr icc3,1,3
set_icc 0x8 0
bcgtlr icc0,1,0
set_icc 0x9 1
bcgtlr icc1,1,1
set_icc 0xa 2
bcgtlr icc2,1,2
set_icc 0xb 3
bcgtlr icc3,1,3
set_icc 0xc 0
bcgtlr icc0,1,0
set_icc 0xd 1
bcgtlr icc1,1,1
set_icc 0xe 2
bcgtlr icc2,1,2
set_icc 0xf 3
bcgtlr icc3,1,3
; ccond is false
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x0 0
bcgtlr icc0,0,0
set_spr_immed 1,lcr
set_icc 0x1 1
bcgtlr icc1,0,1
set_spr_immed 1,lcr
set_icc 0x2 2
bcgtlr icc2,0,2
set_spr_immed 1,lcr
set_icc 0x3 3
bcgtlr icc3,0,3
set_spr_immed 1,lcr
set_icc 0x4 0
bcgtlr icc0,0,0
set_spr_immed 1,lcr
set_icc 0x5 1
bcgtlr icc1,0,1
set_spr_immed 1,lcr
set_icc 0x6 2
bcgtlr icc2,0,2
set_spr_immed 1,lcr
set_icc 0x7 3
bcgtlr icc3,0,3
set_spr_immed 1,lcr
set_icc 0x8 0
bcgtlr icc0,0,0
set_spr_immed 1,lcr
set_icc 0x9 1
bcgtlr icc1,0,1
set_spr_immed 1,lcr
set_icc 0xa 2
bcgtlr icc2,0,2
set_spr_immed 1,lcr
set_icc 0xb 3
bcgtlr icc3,0,3
set_spr_immed 1,lcr
set_icc 0xc 0
bcgtlr icc0,0,0
set_spr_immed 1,lcr
set_icc 0xd 1
bcgtlr icc1,0,1
set_spr_immed 1,lcr
set_icc 0xe 2
bcgtlr icc2,0,2
set_spr_immed 1,lcr
set_icc 0xf 3
bcgtlr icc3,0,3
pass
bad:
fail
|
