1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870
|
/* gdb-if.c -- sim interface to GDB.
Copyright (C) 2008-2012 Free Software Foundation, Inc.
Contributed by Red Hat, Inc.
This file is part of the GNU simulators.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "config.h"
#include <stdio.h>
#include <assert.h>
#include <signal.h>
#include <string.h>
#include <ctype.h>
#include <stdlib.h>
#include "ansidecl.h"
#include "gdb/callback.h"
#include "gdb/remote-sim.h"
#include "gdb/signals.h"
#include "gdb/sim-rx.h"
#include "cpu.h"
#include "mem.h"
#include "load.h"
#include "syscalls.h"
#include "err.h"
#include "trace.h"
/* Ideally, we'd wrap up all the minisim's data structures in an
object and pass that around. However, neither GDB nor run needs
that ability.
So we just have one instance, that lives in global variables, and
each time we open it, we re-initialize it. */
struct sim_state
{
const char *message;
};
static struct sim_state the_minisim = {
"This is the sole rx minisim instance. See libsim.a's global variables."
};
static int open;
SIM_DESC
sim_open (SIM_OPEN_KIND kind,
struct host_callback_struct *callback,
struct bfd *abfd, char **argv)
{
if (open)
fprintf (stderr, "rx minisim: re-opened sim\n");
/* The 'run' interface doesn't use this function, so we don't care
about KIND; it's always SIM_OPEN_DEBUG. */
if (kind != SIM_OPEN_DEBUG)
fprintf (stderr, "rx minisim: sim_open KIND != SIM_OPEN_DEBUG: %d\n",
kind);
set_callbacks (callback);
/* We don't expect any command-line arguments. */
init_mem ();
init_regs ();
execution_error_init_debugger ();
sim_disasm_init (abfd);
open = 1;
return &the_minisim;
}
static void
check_desc (SIM_DESC sd)
{
if (sd != &the_minisim)
fprintf (stderr, "rx minisim: desc != &the_minisim\n");
}
void
sim_close (SIM_DESC sd, int quitting)
{
check_desc (sd);
/* Not much to do. At least free up our memory. */
init_mem ();
open = 0;
}
static bfd *
open_objfile (const char *filename)
{
bfd *prog = bfd_openr (filename, 0);
if (!prog)
{
fprintf (stderr, "Can't read %s\n", filename);
return 0;
}
if (!bfd_check_format (prog, bfd_object))
{
fprintf (stderr, "%s not a rx program\n", filename);
return 0;
}
return prog;
}
static struct swap_list
{
bfd_vma start, end;
struct swap_list *next;
} *swap_list = NULL;
static void
free_swap_list (void)
{
while (swap_list)
{
struct swap_list *next = swap_list->next;
free (swap_list);
swap_list = next;
}
}
/* When running in big endian mode, we must do an additional
byte swap of memory areas used to hold instructions. See
the comment preceding rx_load in load.c to see why this is
so.
Construct a list of memory areas that must be byte swapped.
This list will be consulted when either reading or writing
memory. */
static void
build_swap_list (struct bfd *abfd)
{
asection *s;
free_swap_list ();
/* Nothing to do when in little endian mode. */
if (!rx_big_endian)
return;
for (s = abfd->sections; s; s = s->next)
{
if ((s->flags & SEC_LOAD) && (s->flags & SEC_CODE))
{
struct swap_list *sl;
bfd_size_type size;
size = bfd_get_section_size (s);
if (size <= 0)
continue;
sl = malloc (sizeof (struct swap_list));
assert (sl != NULL);
sl->next = swap_list;
sl->start = bfd_section_lma (abfd, s);
sl->end = sl->start + size;
swap_list = sl;
}
}
}
static int
addr_in_swap_list (bfd_vma addr)
{
struct swap_list *s;
for (s = swap_list; s; s = s->next)
{
if (s->start <= addr && addr < s->end)
return 1;
}
return 0;
}
SIM_RC
sim_load (SIM_DESC sd, char *prog, struct bfd *abfd, int from_tty)
{
check_desc (sd);
if (!abfd)
abfd = open_objfile (prog);
if (!abfd)
return SIM_RC_FAIL;
rx_load (abfd);
build_swap_list (abfd);
return SIM_RC_OK;
}
SIM_RC
sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env)
{
check_desc (sd);
if (abfd)
{
rx_load (abfd);
build_swap_list (abfd);
}
return SIM_RC_OK;
}
int
sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
{
int i;
check_desc (sd);
if (mem == 0)
return 0;
execution_error_clear_last_error ();
for (i = 0; i < length; i++)
{
bfd_vma addr = mem + i;
int do_swap = addr_in_swap_list (addr);
buf[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0));
if (execution_error_get_last_error () != SIM_ERR_NONE)
return i;
}
return length;
}
int
sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
{
int i;
check_desc (sd);
execution_error_clear_last_error ();
for (i = 0; i < length; i++)
{
bfd_vma addr = mem + i;
int do_swap = addr_in_swap_list (addr);
mem_put_qi (addr ^ (do_swap ? 3 : 0), buf[i]);
if (execution_error_get_last_error () != SIM_ERR_NONE)
return i;
}
return length;
}
/* Read the LENGTH bytes at BUF as an little-endian value. */
static DI
get_le (unsigned char *buf, int length)
{
DI acc = 0;
while (--length >= 0)
acc = (acc << 8) + buf[length];
return acc;
}
/* Read the LENGTH bytes at BUF as a big-endian value. */
static DI
get_be (unsigned char *buf, int length)
{
DI acc = 0;
while (length-- > 0)
acc = (acc << 8) + *buf++;
return acc;
}
/* Store VAL as a little-endian value in the LENGTH bytes at BUF. */
static void
put_le (unsigned char *buf, int length, DI val)
{
int i;
for (i = 0; i < length; i++)
{
buf[i] = val & 0xff;
val >>= 8;
}
}
/* Store VAL as a big-endian value in the LENGTH bytes at BUF. */
static void
put_be (unsigned char *buf, int length, DI val)
{
int i;
for (i = length-1; i >= 0; i--)
{
buf[i] = val & 0xff;
val >>= 8;
}
}
static int
check_regno (enum sim_rx_regnum regno)
{
return 0 <= regno && regno < sim_rx_num_regs;
}
static size_t
reg_size (enum sim_rx_regnum regno)
{
size_t size;
switch (regno)
{
case sim_rx_r0_regnum:
size = sizeof (regs.r[0]);
break;
case sim_rx_r1_regnum:
size = sizeof (regs.r[1]);
break;
case sim_rx_r2_regnum:
size = sizeof (regs.r[2]);
break;
case sim_rx_r3_regnum:
size = sizeof (regs.r[3]);
break;
case sim_rx_r4_regnum:
size = sizeof (regs.r[4]);
break;
case sim_rx_r5_regnum:
size = sizeof (regs.r[5]);
break;
case sim_rx_r6_regnum:
size = sizeof (regs.r[6]);
break;
case sim_rx_r7_regnum:
size = sizeof (regs.r[7]);
break;
case sim_rx_r8_regnum:
size = sizeof (regs.r[8]);
break;
case sim_rx_r9_regnum:
size = sizeof (regs.r[9]);
break;
case sim_rx_r10_regnum:
size = sizeof (regs.r[10]);
break;
case sim_rx_r11_regnum:
size = sizeof (regs.r[11]);
break;
case sim_rx_r12_regnum:
size = sizeof (regs.r[12]);
break;
case sim_rx_r13_regnum:
size = sizeof (regs.r[13]);
break;
case sim_rx_r14_regnum:
size = sizeof (regs.r[14]);
break;
case sim_rx_r15_regnum:
size = sizeof (regs.r[15]);
break;
case sim_rx_isp_regnum:
size = sizeof (regs.r_isp);
break;
case sim_rx_usp_regnum:
size = sizeof (regs.r_usp);
break;
case sim_rx_intb_regnum:
size = sizeof (regs.r_intb);
break;
case sim_rx_pc_regnum:
size = sizeof (regs.r_pc);
break;
case sim_rx_ps_regnum:
size = sizeof (regs.r_psw);
break;
case sim_rx_bpc_regnum:
size = sizeof (regs.r_bpc);
break;
case sim_rx_bpsw_regnum:
size = sizeof (regs.r_bpsw);
break;
case sim_rx_fintv_regnum:
size = sizeof (regs.r_fintv);
break;
case sim_rx_fpsw_regnum:
size = sizeof (regs.r_fpsw);
break;
case sim_rx_acc_regnum:
size = sizeof (regs.r_acc);
break;
default:
size = 0;
break;
}
return size;
}
int
sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
{
size_t size;
DI val;
check_desc (sd);
if (!check_regno (regno))
return 0;
size = reg_size (regno);
if (length != size)
return 0;
switch (regno)
{
case sim_rx_r0_regnum:
val = get_reg (0);
break;
case sim_rx_r1_regnum:
val = get_reg (1);
break;
case sim_rx_r2_regnum:
val = get_reg (2);
break;
case sim_rx_r3_regnum:
val = get_reg (3);
break;
case sim_rx_r4_regnum:
val = get_reg (4);
break;
case sim_rx_r5_regnum:
val = get_reg (5);
break;
case sim_rx_r6_regnum:
val = get_reg (6);
break;
case sim_rx_r7_regnum:
val = get_reg (7);
break;
case sim_rx_r8_regnum:
val = get_reg (8);
break;
case sim_rx_r9_regnum:
val = get_reg (9);
break;
case sim_rx_r10_regnum:
val = get_reg (10);
break;
case sim_rx_r11_regnum:
val = get_reg (11);
break;
case sim_rx_r12_regnum:
val = get_reg (12);
break;
case sim_rx_r13_regnum:
val = get_reg (13);
break;
case sim_rx_r14_regnum:
val = get_reg (14);
break;
case sim_rx_r15_regnum:
val = get_reg (15);
break;
case sim_rx_isp_regnum:
val = get_reg (isp);
break;
case sim_rx_usp_regnum:
val = get_reg (usp);
break;
case sim_rx_intb_regnum:
val = get_reg (intb);
break;
case sim_rx_pc_regnum:
val = get_reg (pc);
break;
case sim_rx_ps_regnum:
val = get_reg (psw);
break;
case sim_rx_bpc_regnum:
val = get_reg (bpc);
break;
case sim_rx_bpsw_regnum:
val = get_reg (bpsw);
break;
case sim_rx_fintv_regnum:
val = get_reg (fintv);
break;
case sim_rx_fpsw_regnum:
val = get_reg (fpsw);
break;
case sim_rx_acc_regnum:
val = ((DI) get_reg (acchi) << 32) | get_reg (acclo);
break;
default:
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
regno);
return -1;
}
if (rx_big_endian)
put_be (buf, length, val);
else
put_le (buf, length, val);
return size;
}
int
sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
{
size_t size;
DI val;
check_desc (sd);
if (!check_regno (regno))
return -1;
size = reg_size (regno);
if (length != size)
return -1;
if (rx_big_endian)
val = get_be (buf, length);
else
val = get_le (buf, length);
switch (regno)
{
case sim_rx_r0_regnum:
put_reg (0, val);
break;
case sim_rx_r1_regnum:
put_reg (1, val);
break;
case sim_rx_r2_regnum:
put_reg (2, val);
break;
case sim_rx_r3_regnum:
put_reg (3, val);
break;
case sim_rx_r4_regnum:
put_reg (4, val);
break;
case sim_rx_r5_regnum:
put_reg (5, val);
break;
case sim_rx_r6_regnum:
put_reg (6, val);
break;
case sim_rx_r7_regnum:
put_reg (7, val);
break;
case sim_rx_r8_regnum:
put_reg (8, val);
break;
case sim_rx_r9_regnum:
put_reg (9, val);
break;
case sim_rx_r10_regnum:
put_reg (10, val);
break;
case sim_rx_r11_regnum:
put_reg (11, val);
break;
case sim_rx_r12_regnum:
put_reg (12, val);
break;
case sim_rx_r13_regnum:
put_reg (13, val);
break;
case sim_rx_r14_regnum:
put_reg (14, val);
break;
case sim_rx_r15_regnum:
put_reg (15, val);
break;
case sim_rx_isp_regnum:
put_reg (isp, val);
break;
case sim_rx_usp_regnum:
put_reg (usp, val);
break;
case sim_rx_intb_regnum:
put_reg (intb, val);
break;
case sim_rx_pc_regnum:
put_reg (pc, val);
break;
case sim_rx_ps_regnum:
put_reg (psw, val);
break;
case sim_rx_bpc_regnum:
put_reg (bpc, val);
break;
case sim_rx_bpsw_regnum:
put_reg (bpsw, val);
break;
case sim_rx_fintv_regnum:
put_reg (fintv, val);
break;
case sim_rx_fpsw_regnum:
put_reg (fpsw, val);
break;
case sim_rx_acc_regnum:
put_reg (acclo, val & 0xffffffff);
put_reg (acchi, (val >> 32) & 0xffffffff);
break;
default:
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
regno);
return 0;
}
return size;
}
void
sim_info (SIM_DESC sd, int verbose)
{
check_desc (sd);
printf ("The rx minisim doesn't collect any statistics.\n");
}
static volatile int stop;
static enum sim_stop reason;
int siggnal;
/* Given a signal number used by the RX bsp (that is, newlib),
return a host signal number. (Oddly, the gdb/sim interface uses
host signal numbers...) */
int
rx_signal_to_host (int rx)
{
switch (rx)
{
case 4:
#ifdef SIGILL
return SIGILL;
#else
return SIGSEGV;
#endif
case 5:
return SIGTRAP;
case 10:
#ifdef SIGBUS
return SIGBUS;
#else
return SIGSEGV;
#endif
case 11:
return SIGSEGV;
case 24:
#ifdef SIGXCPU
return SIGXCPU;
#else
break;
#endif
case 2:
return SIGINT;
case 8:
#ifdef SIGFPE
return SIGFPE;
#else
break;
#endif
case 6:
return SIGABRT;
}
return 0;
}
/* Take a step return code RC and set up the variables consulted by
sim_stop_reason appropriately. */
void
handle_step (int rc)
{
if (execution_error_get_last_error () != SIM_ERR_NONE)
{
reason = sim_stopped;
siggnal = TARGET_SIGNAL_SEGV;
}
if (RX_STEPPED (rc) || RX_HIT_BREAK (rc))
{
reason = sim_stopped;
siggnal = TARGET_SIGNAL_TRAP;
}
else if (RX_STOPPED (rc))
{
reason = sim_stopped;
siggnal = rx_signal_to_host (RX_STOP_SIG (rc));
}
else
{
assert (RX_EXITED (rc));
reason = sim_exited;
siggnal = RX_EXIT_STATUS (rc);
}
}
void
sim_resume (SIM_DESC sd, int step, int sig_to_deliver)
{
int rc;
check_desc (sd);
if (sig_to_deliver != 0)
{
fprintf (stderr,
"Warning: the rx minisim does not implement "
"signal delivery yet.\n" "Resuming with no signal.\n");
}
execution_error_clear_last_error ();
if (step)
{
rc = setjmp (decode_jmp_buf);
if (rc == 0)
rc = decode_opcode ();
handle_step (rc);
}
else
{
/* We don't clear 'stop' here, because then we would miss
interrupts that arrived on the way here. Instead, we clear
the flag in sim_stop_reason, after GDB has disabled the
interrupt signal handler. */
for (;;)
{
if (stop)
{
stop = 0;
reason = sim_stopped;
siggnal = TARGET_SIGNAL_INT;
break;
}
rc = setjmp (decode_jmp_buf);
if (rc == 0)
rc = decode_opcode ();
if (execution_error_get_last_error () != SIM_ERR_NONE)
{
reason = sim_stopped;
siggnal = TARGET_SIGNAL_SEGV;
break;
}
if (!RX_STEPPED (rc))
{
handle_step (rc);
break;
}
}
}
}
int
sim_stop (SIM_DESC sd)
{
stop = 1;
return 1;
}
void
sim_stop_reason (SIM_DESC sd, enum sim_stop *reason_p, int *sigrc_p)
{
check_desc (sd);
*reason_p = reason;
*sigrc_p = siggnal;
}
void
sim_do_command (SIM_DESC sd, char *cmd)
{
check_desc (sd);
char *p = cmd;
/* Skip leading whitespace. */
while (isspace (*p))
p++;
/* Find the extent of the command word. */
for (p = cmd; *p; p++)
if (isspace (*p))
break;
/* Null-terminate the command word, and record the start of any
further arguments. */
char *args;
if (*p)
{
*p = '\0';
args = p + 1;
while (isspace (*args))
args++;
}
else
args = p;
if (strcmp (cmd, "trace") == 0)
{
if (strcmp (args, "on") == 0)
trace = 1;
else if (strcmp (args, "off") == 0)
trace = 0;
else
printf ("The 'sim trace' command expects 'on' or 'off' "
"as an argument.\n");
}
else if (strcmp (cmd, "verbose") == 0)
{
if (strcmp (args, "on") == 0)
verbose = 1;
else if (strcmp (args, "noisy") == 0)
verbose = 2;
else if (strcmp (args, "off") == 0)
verbose = 0;
else
printf ("The 'sim verbose' command expects 'on', 'noisy', or 'off'"
" as an argument.\n");
}
else
printf ("The 'sim' command expects either 'trace' or 'verbose'"
" as a subcommand.\n");
}
char **
sim_complete_command (SIM_DESC sd, char *text, char *word)
{
return NULL;
}
|