1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349
|
/* ======================================================================== */
/* SUB 68K CORE */
/* ======================================================================== */
extern int scd_68k_irq_ack(int level);
#define m68ki_cpu s68k
#define MUL (4)
/* ======================================================================== */
/* ================================ INCLUDES ============================== */
/* ======================================================================== */
#ifndef BUILD_TABLES
#include "s68ki_cycles.h"
#endif
#include "s68kconf.h"
#include "m68kcpu.h"
#include "m68kops.h"
/* ======================================================================== */
/* ================================= DATA ================================= */
/* ======================================================================== */
#ifdef BUILD_TABLES
static unsigned char s68ki_cycles[0x10000];
#endif
static int irq_latency;
/* IRQ priority */
static const uint8 irq_level[0x40] =
{
0, 1, 2, 2, 3, 3, 3, 3,
4, 4, 4, 4, 4, 4, 4, 4,
5, 5, 5, 5, 5, 5, 5, 5,
5, 5, 5, 5, 5, 5, 5, 5,
6, 6, 6, 6, 6, 6, 6, 6,
6, 6, 6, 6, 6, 6, 6, 6,
6, 6, 6, 6, 6, 6, 6, 6,
6, 6, 6, 6, 6, 6, 6, 6
};
m68ki_cpu_core s68k;
/* ======================================================================== */
/* =============================== CALLBACKS ============================== */
/* ======================================================================== */
/* Default callbacks used if the callback hasn't been set yet, or if the
* callback is set to NULL
*/
#if M68K_EMULATE_INT_ACK == OPT_ON
/* Interrupt acknowledge */
static int default_int_ack_callback(int int_level)
{
CPU_INT_LEVEL = 0;
return M68K_INT_ACK_AUTOVECTOR;
}
#endif
#if M68K_EMULATE_RESET == OPT_ON
/* Called when a reset instruction is executed */
static void default_reset_instr_callback(void)
{
}
#endif
#if M68K_TAS_HAS_CALLBACK == OPT_ON
/* Called when a tas instruction is executed */
static int default_tas_instr_callback(void)
{
return 1; // allow writeback
}
#endif
#if M68K_EMULATE_FC == OPT_ON
/* Called every time there's bus activity (read/write to/from memory */
static void default_set_fc_callback(unsigned int new_fc)
{
}
#endif
/* ======================================================================== */
/* ================================= API ================================== */
/* ======================================================================== */
/* Access the internals of the CPU */
unsigned int s68k_get_reg(m68k_register_t regnum)
{
switch(regnum)
{
case M68K_REG_D0: return m68ki_cpu.dar[0];
case M68K_REG_D1: return m68ki_cpu.dar[1];
case M68K_REG_D2: return m68ki_cpu.dar[2];
case M68K_REG_D3: return m68ki_cpu.dar[3];
case M68K_REG_D4: return m68ki_cpu.dar[4];
case M68K_REG_D5: return m68ki_cpu.dar[5];
case M68K_REG_D6: return m68ki_cpu.dar[6];
case M68K_REG_D7: return m68ki_cpu.dar[7];
case M68K_REG_A0: return m68ki_cpu.dar[8];
case M68K_REG_A1: return m68ki_cpu.dar[9];
case M68K_REG_A2: return m68ki_cpu.dar[10];
case M68K_REG_A3: return m68ki_cpu.dar[11];
case M68K_REG_A4: return m68ki_cpu.dar[12];
case M68K_REG_A5: return m68ki_cpu.dar[13];
case M68K_REG_A6: return m68ki_cpu.dar[14];
case M68K_REG_A7: return m68ki_cpu.dar[15];
case M68K_REG_PC: return MASK_OUT_ABOVE_32(m68ki_cpu.pc);
case M68K_REG_SR: return m68ki_cpu.t1_flag |
(m68ki_cpu.s_flag << 11) |
m68ki_cpu.int_mask |
((m68ki_cpu.x_flag & XFLAG_SET) >> 4) |
((m68ki_cpu.n_flag & NFLAG_SET) >> 4) |
((!m68ki_cpu.not_z_flag) << 2) |
((m68ki_cpu.v_flag & VFLAG_SET) >> 6) |
((m68ki_cpu.c_flag & CFLAG_SET) >> 8);
case M68K_REG_SP: return m68ki_cpu.dar[15];
case M68K_REG_USP: return m68ki_cpu.s_flag ? m68ki_cpu.sp[0] : m68ki_cpu.dar[15];
case M68K_REG_ISP: return m68ki_cpu.s_flag ? m68ki_cpu.dar[15] : m68ki_cpu.sp[4];
#if M68K_EMULATE_PREFETCH
case M68K_REG_PREF_ADDR: return m68ki_cpu.pref_addr;
case M68K_REG_PREF_DATA: return m68ki_cpu.pref_data;
#endif
case M68K_REG_IR: return m68ki_cpu.ir;
default: return 0;
}
}
void s68k_set_reg(m68k_register_t regnum, unsigned int value)
{
switch(regnum)
{
case M68K_REG_D0: REG_D[0] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D1: REG_D[1] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D2: REG_D[2] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D3: REG_D[3] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D4: REG_D[4] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D5: REG_D[5] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D6: REG_D[6] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_D7: REG_D[7] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A0: REG_A[0] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A1: REG_A[1] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A2: REG_A[2] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A3: REG_A[3] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A4: REG_A[4] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A5: REG_A[5] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A6: REG_A[6] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_A7: REG_A[7] = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_PC: m68ki_jump(MASK_OUT_ABOVE_32(value)); return;
case M68K_REG_SR: m68ki_set_sr(value); return;
case M68K_REG_SP: REG_SP = MASK_OUT_ABOVE_32(value); return;
case M68K_REG_USP: if(FLAG_S)
REG_USP = MASK_OUT_ABOVE_32(value);
else
REG_SP = MASK_OUT_ABOVE_32(value);
return;
case M68K_REG_ISP: if(FLAG_S)
REG_SP = MASK_OUT_ABOVE_32(value);
else
REG_ISP = MASK_OUT_ABOVE_32(value);
return;
case M68K_REG_IR: REG_IR = MASK_OUT_ABOVE_16(value); return;
#if M68K_EMULATE_PREFETCH
case M68K_REG_PREF_ADDR: CPU_PREF_ADDR = MASK_OUT_ABOVE_32(value); return;
#endif
default: return;
}
}
/* Set the callbacks */
#if M68K_EMULATE_INT_ACK == OPT_ON
void s68k_set_int_ack_callback(int (*callback)(int int_level))
{
CALLBACK_INT_ACK = callback ? callback : default_int_ack_callback;
}
#endif
#if M68K_EMULATE_RESET == OPT_ON
void s68k_set_reset_instr_callback(void (*callback)(void))
{
CALLBACK_RESET_INSTR = callback ? callback : default_reset_instr_callback;
}
#endif
#if M68K_TAS_HAS_CALLBACK == OPT_ON
void s68k_set_tas_instr_callback(int (*callback)(void))
{
CALLBACK_TAS_INSTR = callback ? callback : default_tas_instr_callback;
}
#endif
#if M68K_EMULATE_FC == OPT_ON
void s68k_set_fc_callback(void (*callback)(unsigned int new_fc))
{
CALLBACK_SET_FC = callback ? callback : default_set_fc_callback;
}
#endif
extern void error(char *format, ...);
extern uint16 v_counter;
/* update IRQ level according to triggered interrupts */
void s68k_update_irq(unsigned int mask)
{
/* Get IRQ level (6 interrupt lines) */
mask = irq_level[mask];
/* Set IRQ level */
CPU_INT_LEVEL = mask << 8;
#ifdef LOG_SCD
error("[%d][%d] IRQ Level = %d(0x%02x) (%x)\n", v_counter, s68k.cycles, CPU_INT_LEVEL>>8,FLAG_INT_MASK,s68k.pc);
#endif
}
void s68k_run(unsigned int cycles)
{
/* Make sure CPU is not already ahead */
if (s68k.cycles >= cycles)
{
return;
}
/* Check interrupt mask to process IRQ if needed */
m68ki_check_interrupts();
/* Make sure we're not stopped */
if (CPU_STOPPED)
{
s68k.cycles = cycles;
return;
}
/* Save end cycles count for when CPU is stopped */
s68k.cycle_end = cycles;
/* Return point for when we have an address error (TODO: use goto) */
m68ki_set_address_error_trap() /* auto-disable (see m68kcpu.h) */
#ifdef LOG_SCD
error("[%d][%d] s68k run to %d cycles (%x), irq mask = %x (%x)\n", v_counter, s68k.cycles, cycles, s68k.pc,FLAG_INT_MASK, CPU_INT_LEVEL);
#endif
while (s68k.cycles < cycles)
{
/* Set tracing accodring to T1. */
m68ki_trace_t1() /* auto-disable (see m68kcpu.h) */
/* Set the address space for reads */
m68ki_use_data_space() /* auto-disable (see m68kcpu.h) */
/* Decode next instruction */
REG_IR = m68ki_read_imm_16();
/* Execute instruction */
m68ki_instruction_jump_table[REG_IR]();
USE_CYCLES(CYC_INSTRUCTION[REG_IR]);
/* Trace m68k_exception, if necessary */
m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */
}
}
void s68k_init(void)
{
#ifdef BUILD_TABLES
static uint emulation_initialized = 0;
/* The first call to this function initializes the opcode handler jump table */
if(!emulation_initialized)
{
m68ki_build_opcode_table();
emulation_initialized = 1;
}
#endif
#if M68K_EMULATE_INT_ACK == OPT_ON
s68k_set_int_ack_callback(NULL);
#endif
#if M68K_EMULATE_RESET == OPT_ON
s68k_set_reset_instr_callback(NULL);
#endif
#if M68K_TAS_HAS_CALLBACK == OPT_ON
s68k_set_tas_instr_callback(NULL);
#endif
#if M68K_EMULATE_FC == OPT_ON
s68k_set_fc_callback(NULL);
#endif
}
/* Pulse the RESET line on the CPU */
void s68k_pulse_reset(void)
{
/* Clear all stop levels */
CPU_STOPPED = 0;
#if M68K_EMULATE_ADDRESS_ERROR
CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET;
#endif
/* Turn off tracing */
FLAG_T1 = 0;
m68ki_clear_trace()
/* Interrupt mask to level 7 */
FLAG_INT_MASK = 0x0700;
CPU_INT_LEVEL = 0;
irq_latency = 0;
/* Go to supervisor mode */
m68ki_set_s_flag(SFLAG_SET);
/* Invalidate the prefetch queue */
#if M68K_EMULATE_PREFETCH
/* Set to arbitrary number since our first fetch is from 0 */
CPU_PREF_ADDR = 0x1000;
#endif /* M68K_EMULATE_PREFETCH */
/* Read the initial stack pointer and program counter */
m68ki_jump(0);
REG_SP = m68ki_read_imm_32();
REG_PC = m68ki_read_imm_32();
m68ki_jump(REG_PC);
#if M68K_EMULATE_ADDRESS_ERROR
CPU_RUN_MODE = RUN_MODE_NORMAL;
#endif
USE_CYCLES(CYC_EXCEPTION[EXCEPTION_RESET]);
}
void s68k_pulse_halt(void)
{
/* Pulse the HALT line on the CPU */
CPU_STOPPED |= STOP_LEVEL_HALT;
}
void s68k_clear_halt()
{
/* Clear the HALT line on the CPU */
CPU_STOPPED &= ~STOP_LEVEL_HALT;
}
/* ======================================================================== */
/* ============================== END OF FILE ============================= */
/* ======================================================================== */
|