1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
|
// Code generated by command: go run gen.go -avx -out ../accum_vector_avx_amd64.s -pkg xxh3. DO NOT EDIT.
#include "textflag.h"
DATA prime_avx<>+0(SB)/8, $0x000000009e3779b1
DATA prime_avx<>+8(SB)/8, $0x000000009e3779b1
DATA prime_avx<>+16(SB)/8, $0x000000009e3779b1
DATA prime_avx<>+24(SB)/8, $0x000000009e3779b1
GLOBL prime_avx<>(SB), RODATA|NOPTR, $32
// func accumAVX2(acc *[8]uint64, data *byte, key *byte, len uint64)
// Requires: AVX, AVX2, MMX+
TEXT ·accumAVX2(SB), NOSPLIT, $0-32
MOVQ acc+0(FP), AX
MOVQ data+8(FP), CX
MOVQ key+16(FP), DX
MOVQ key+16(FP), BX
MOVQ len+24(FP), SI
VMOVDQU (AX), Y1
VMOVDQU 32(AX), Y2
VMOVDQU prime_avx<>+0(SB), Y0
accum_large:
CMPQ SI, $0x00000400
JLE accum
VMOVDQU (CX), Y3
VMOVDQU 32(CX), Y6
PREFETCHT0 512(CX)
VPXOR (DX), Y3, Y4
VPXOR 32(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 64(CX), Y3
VMOVDQU 96(CX), Y6
PREFETCHT0 576(CX)
VPXOR 8(DX), Y3, Y4
VPXOR 40(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 128(CX), Y3
VMOVDQU 160(CX), Y6
PREFETCHT0 640(CX)
VPXOR 16(DX), Y3, Y4
VPXOR 48(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 192(CX), Y3
VMOVDQU 224(CX), Y6
PREFETCHT0 704(CX)
VPXOR 24(DX), Y3, Y4
VPXOR 56(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 256(CX), Y3
VMOVDQU 288(CX), Y6
PREFETCHT0 768(CX)
VPXOR 32(DX), Y3, Y4
VPXOR 64(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 320(CX), Y3
VMOVDQU 352(CX), Y6
PREFETCHT0 832(CX)
VPXOR 40(DX), Y3, Y4
VPXOR 72(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 384(CX), Y3
VMOVDQU 416(CX), Y6
PREFETCHT0 896(CX)
VPXOR 48(DX), Y3, Y4
VPXOR 80(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 448(CX), Y3
VMOVDQU 480(CX), Y6
PREFETCHT0 960(CX)
VPXOR 56(DX), Y3, Y4
VPXOR 88(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 512(CX), Y3
VMOVDQU 544(CX), Y6
PREFETCHT0 1024(CX)
VPXOR 64(DX), Y3, Y4
VPXOR 96(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 576(CX), Y3
VMOVDQU 608(CX), Y6
PREFETCHT0 1088(CX)
VPXOR 72(DX), Y3, Y4
VPXOR 104(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 640(CX), Y3
VMOVDQU 672(CX), Y6
PREFETCHT0 1152(CX)
VPXOR 80(DX), Y3, Y4
VPXOR 112(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 704(CX), Y3
VMOVDQU 736(CX), Y6
PREFETCHT0 1216(CX)
VPXOR 88(DX), Y3, Y4
VPXOR 120(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 768(CX), Y3
VMOVDQU 800(CX), Y6
PREFETCHT0 1280(CX)
VPXOR 96(DX), Y3, Y4
VPXOR 128(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 832(CX), Y3
VMOVDQU 864(CX), Y6
PREFETCHT0 1344(CX)
VPXOR 104(DX), Y3, Y4
VPXOR 136(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 896(CX), Y3
VMOVDQU 928(CX), Y6
PREFETCHT0 1408(CX)
VPXOR 112(DX), Y3, Y4
VPXOR 144(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 960(CX), Y3
VMOVDQU 992(CX), Y6
PREFETCHT0 1472(CX)
VPXOR 120(DX), Y3, Y4
VPXOR 152(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
ADDQ $0x00000400, CX
SUBQ $0x00000400, SI
VPSRLQ $0x2f, Y1, Y3
VPXOR Y1, Y3, Y3
VPXOR 128(DX), Y3, Y3
VPMULUDQ Y0, Y3, Y1
VPSHUFD $0xf5, Y3, Y3
VPMULUDQ Y0, Y3, Y3
VPSLLQ $0x20, Y3, Y3
VPADDQ Y1, Y3, Y1
VPSRLQ $0x2f, Y2, Y3
VPXOR Y2, Y3, Y3
VPXOR 160(DX), Y3, Y3
VPMULUDQ Y0, Y3, Y2
VPSHUFD $0xf5, Y3, Y3
VPMULUDQ Y0, Y3, Y3
VPSLLQ $0x20, Y3, Y3
VPADDQ Y2, Y3, Y2
JMP accum_large
accum:
CMPQ SI, $0x40
JLE finalize
VMOVDQU (CX), Y0
VMOVDQU 32(CX), Y5
VPXOR (BX), Y0, Y3
VPXOR 32(BX), Y5, Y6
VPSHUFD $0x31, Y3, Y4
VPSHUFD $0x31, Y6, Y7
VPMULUDQ Y3, Y4, Y3
VPMULUDQ Y6, Y7, Y6
VPSHUFD $0x4e, Y0, Y0
VPSHUFD $0x4e, Y5, Y5
VPADDQ Y1, Y0, Y1
VPADDQ Y1, Y3, Y1
VPADDQ Y2, Y5, Y2
VPADDQ Y2, Y6, Y2
ADDQ $0x00000040, CX
SUBQ $0x00000040, SI
ADDQ $0x00000008, BX
JMP accum
finalize:
CMPQ SI, $0x00
JE return
SUBQ $0x40, CX
ADDQ SI, CX
VMOVDQU (CX), Y0
VMOVDQU 32(CX), Y5
VPXOR 121(DX), Y0, Y3
VPXOR 153(DX), Y5, Y6
VPSHUFD $0x31, Y3, Y4
VPSHUFD $0x31, Y6, Y7
VPMULUDQ Y3, Y4, Y3
VPMULUDQ Y6, Y7, Y6
VPSHUFD $0x4e, Y0, Y0
VPSHUFD $0x4e, Y5, Y5
VPADDQ Y1, Y0, Y1
VPADDQ Y1, Y3, Y1
VPADDQ Y2, Y5, Y2
VPADDQ Y2, Y6, Y2
return:
VMOVDQU Y1, (AX)
VMOVDQU Y2, 32(AX)
VZEROUPPER
RET
// func accumBlockAVX2(acc *[8]uint64, data *byte, key *byte)
// Requires: AVX, AVX2
TEXT ·accumBlockAVX2(SB), NOSPLIT, $0-24
MOVQ acc+0(FP), AX
MOVQ data+8(FP), CX
MOVQ key+16(FP), DX
VMOVDQU (AX), Y1
VMOVDQU 32(AX), Y2
VMOVDQU prime_avx<>+0(SB), Y0
VMOVDQU (CX), Y3
VMOVDQU 32(CX), Y6
VPXOR (DX), Y3, Y4
VPXOR 32(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 64(CX), Y3
VMOVDQU 96(CX), Y6
VPXOR 8(DX), Y3, Y4
VPXOR 40(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 128(CX), Y3
VMOVDQU 160(CX), Y6
VPXOR 16(DX), Y3, Y4
VPXOR 48(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 192(CX), Y3
VMOVDQU 224(CX), Y6
VPXOR 24(DX), Y3, Y4
VPXOR 56(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 256(CX), Y3
VMOVDQU 288(CX), Y6
VPXOR 32(DX), Y3, Y4
VPXOR 64(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 320(CX), Y3
VMOVDQU 352(CX), Y6
VPXOR 40(DX), Y3, Y4
VPXOR 72(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 384(CX), Y3
VMOVDQU 416(CX), Y6
VPXOR 48(DX), Y3, Y4
VPXOR 80(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 448(CX), Y3
VMOVDQU 480(CX), Y6
VPXOR 56(DX), Y3, Y4
VPXOR 88(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 512(CX), Y3
VMOVDQU 544(CX), Y6
VPXOR 64(DX), Y3, Y4
VPXOR 96(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 576(CX), Y3
VMOVDQU 608(CX), Y6
VPXOR 72(DX), Y3, Y4
VPXOR 104(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 640(CX), Y3
VMOVDQU 672(CX), Y6
VPXOR 80(DX), Y3, Y4
VPXOR 112(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 704(CX), Y3
VMOVDQU 736(CX), Y6
VPXOR 88(DX), Y3, Y4
VPXOR 120(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 768(CX), Y3
VMOVDQU 800(CX), Y6
VPXOR 96(DX), Y3, Y4
VPXOR 128(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 832(CX), Y3
VMOVDQU 864(CX), Y6
VPXOR 104(DX), Y3, Y4
VPXOR 136(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 896(CX), Y3
VMOVDQU 928(CX), Y6
VPXOR 112(DX), Y3, Y4
VPXOR 144(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VMOVDQU 960(CX), Y3
VMOVDQU 992(CX), Y6
VPXOR 120(DX), Y3, Y4
VPXOR 152(DX), Y6, Y7
VPSHUFD $0x31, Y4, Y5
VPSHUFD $0x31, Y7, Y8
VPMULUDQ Y4, Y5, Y4
VPMULUDQ Y7, Y8, Y7
VPSHUFD $0x4e, Y3, Y3
VPSHUFD $0x4e, Y6, Y6
VPADDQ Y1, Y3, Y1
VPADDQ Y1, Y4, Y1
VPADDQ Y2, Y6, Y2
VPADDQ Y2, Y7, Y2
VPSRLQ $0x2f, Y1, Y3
VPXOR Y1, Y3, Y3
VPXOR 128(DX), Y3, Y3
VPMULUDQ Y0, Y3, Y1
VPSHUFD $0xf5, Y3, Y3
VPMULUDQ Y0, Y3, Y3
VPSLLQ $0x20, Y3, Y3
VPADDQ Y1, Y3, Y1
VPSRLQ $0x2f, Y2, Y3
VPXOR Y2, Y3, Y3
VPXOR 160(DX), Y3, Y3
VPMULUDQ Y0, Y3, Y2
VPSHUFD $0xf5, Y3, Y3
VPMULUDQ Y0, Y3, Y3
VPSLLQ $0x20, Y3, Y3
VPADDQ Y2, Y3, Y2
VMOVDQU Y1, (AX)
VMOVDQU Y2, 32(AX)
VZEROUPPER
RET
|
