1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300
|
// Copyright 2024 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.
package loong64asm
import (
"fmt"
"strings"
)
// An Inst is a single instruction.
type Inst struct {
Op Op // Opcode mnemonic
Enc uint32 // Raw encoding bits.
Args Args // Instruction arguments, in Loong64 manual order.
}
func (i Inst) String() string {
var op string = i.Op.String()
var args []string
for _, arg := range i.Args {
if arg == nil {
break
}
args = append(args, arg.String())
}
switch i.Op {
case OR:
if i.Args[2].(Reg) == R0 {
op = "move"
args = args[0:2]
}
case ANDI:
if i.Args[0].(Reg) == R0 && i.Args[1].(Reg) == R0 {
return "nop"
}
case JIRL:
if i.Args[0].(Reg) == R0 && i.Args[1].(Reg) == R1 && i.Args[2].(OffsetSimm).Imm == 0 {
return "ret"
} else if i.Args[0].(Reg) == R0 && i.Args[2].(OffsetSimm).Imm == 0 {
return "jr " + args[1]
}
case BLT:
if i.Args[0].(Reg) == R0 {
op = "bgtz"
args = args[1:]
} else if i.Args[1].(Reg) == R0 {
op = "bltz"
args = append(args[:1], args[2:]...)
}
case BGE:
if i.Args[0].(Reg) == R0 {
op = "blez"
args = args[1:]
} else if i.Args[1].(Reg) == R0 {
op = "bgez"
args = append(args[:1], args[2:]...)
}
}
if len(args) == 0 {
return op
} else {
return op + " " + strings.Join(args, ", ")
}
}
// An Op is an Loong64 opcode.
type Op uint16
// NOTE: The actual Op values are defined in tables.go.
// They are chosen to simplify instruction decoding and
// are not a dense packing from 0 to N, although the
// density is high, probably at least 90%.
func (op Op) String() string {
if (op >= Op(len(opstr))) || (opstr[op] == "") {
return fmt.Sprintf("Op(%d)", int(op))
}
return opstr[op]
}
// An Args holds the instruction arguments.
// If an instruction has fewer than 5 arguments,
// the final elements in the array are nil.
type Args [5]Arg
// An Arg is a single instruction argument
type Arg interface {
String() string
}
// A Reg is a single register.
// The zero value denotes R0, not the absence of a register.
type Reg uint16
const (
// General-purpose register
R0 Reg = iota
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R30
R31
// Float point register
F0
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F21
F22
F23
F24
F25
F26
F27
F28
F29
F30
F31
)
func (r Reg) String() string {
switch {
case r == R0:
return "$zero"
case r == R1:
return "$ra"
case r == R2:
return "$tp"
case r == R3:
return "$sp"
case (r >= R4) && (r <= R11):
return fmt.Sprintf("$a%d", int(r-R4))
case (r >= R12) && (r <= R20):
return fmt.Sprintf("$t%d", int(r-R12))
case r == R21:
return "$r21"
case r == R22:
return "$fp"
case (r >= R23) && (r <= R31):
return fmt.Sprintf("$s%d", int(r-R23))
case (r >= F0) && (r <= F7):
return fmt.Sprintf("$fa%d", int(r-F0))
case (r >= F8) && (r <= F23):
return fmt.Sprintf("$ft%d", int(r-F8))
case (r >= F24) && (r <= F31):
return fmt.Sprintf("$fs%d", int(r-F24))
default:
return fmt.Sprintf("Unknown(%d)", int(r))
}
}
// float control status register
type Fcsr uint8
const (
FCSR0 Fcsr = iota
FCSR1
FCSR2
FCSR3
)
func (f Fcsr) String() string {
return fmt.Sprintf("$fcsr%d", uint8(f))
}
// float condition flags register
type Fcc uint8
const (
FCC0 Fcc = iota
FCC1
FCC2
FCC3
FCC4
FCC5
FCC6
FCC7
)
func (f Fcc) String() string {
return fmt.Sprintf("$fcc%d", uint8(f))
}
// An Imm is an integer constant.
type Uimm struct {
Imm uint32
Decimal bool
}
func (i Uimm) String() string {
if i.Decimal == true {
return fmt.Sprintf("%d", i.Imm)
} else {
return fmt.Sprintf("%#x", i.Imm)
}
}
type Simm16 struct {
Imm int16
Width uint8
}
func (si Simm16) String() string {
return fmt.Sprintf("%d", int32(si.Imm))
}
type Simm32 struct {
Imm int32
Width uint8
}
func (si Simm32) String() string {
return fmt.Sprintf("%d", int32(si.Imm))
}
type OffsetSimm struct {
Imm int32
Width uint8
}
func (o OffsetSimm) String() string {
return fmt.Sprintf("%d", int32(o.Imm))
}
type SaSimm int16
func (s SaSimm) String() string {
return fmt.Sprintf("%#x", int(s))
}
type CodeSimm int16
func (c CodeSimm) String() string {
return fmt.Sprintf("%#x", int(c))
}
|