1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661
|
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
<html>
<head>
<title>GXemul: Experimenting with GXemul</title>
<meta name="robots" content="noarchive,nofollow,noindex">
</head>
<body style="font-family : sans-serif;">
<!-- 10 lines header. -->
<h1>GXemul: Experimenting with GXemul</h1>
<p>
<a href="./">Back to the index.</a>
<!--
Copyright (C) 2003-2019 Anders Gavare. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. The name of the author may not be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGE.
-->
<p><br>
<ul>
<li><a href="#hello">Hello world</a>
<li><a href="#testmachines">Test machines</a>
<li><a href="#expdevices">Experimental devices</a>
</ul>
<p><br>
<a name="hello"></a>
<h3>Hello world:</h3>
<p>You might want to use the emulator to develop programs on your own,
not just run already existing operating system kernels such as NetBSD.
To get started, I recommend that you do two things:
<p>
<ul>
<li>Build and install a cross-compiler for your chosen target,
e.g. <tt>mips64-unknown-elf</tt>.
<a href="http://gcc.gnu.org/">GCC</a> is usually a good compiler
choice, because it is portable and in wide-spread use.
(Other compilers should work too.)
<p>
<li>Compile the Hello World demo program for your chosen target, and run
it in the emulator.
</ul>
<p>The Hello World demo program is included in the GXemul source
code distribution, in the <a href="../demos/hello/"><tt>demos/hello/</tt></a>
subdirectory. The README files in the demo directories have several
examples of how the demo programs can be built.
<p>Once you have compiled the Hello World program into a binary,
<tt>hello_mips</tt>, start it like this:
<pre>
<b>gxemul -E testmips hello_mips</b>
</pre>
<p>Then you can experiment using the commands further up on this page.
<p>If you start the emulator in the paused state, or if you press CTRL-C
during normal execution, you will end up with a <tt><b>GXemul></b></tt>
prompt.
<p>Hopefully this is enough to get you inspired. :-)
<p><br>
<a name="testmachines"></a>
<h3>Test machines:</h3>
<p>The emulator has several modes where it doesn't emulate any real machine.
It can either run in "bare" mode, where no devices are included by default
(just the CPU), or in a "test" mode where some simple devices are
emulated. This can be used when developing e.g. operating systems, as a complement
to targeting real machines.
<p>The name of the test machine modes are <tt>testmips</tt>, <tt>testarm</tt>, etc.
Run <tt>gxemul -H</tt> for an up-to-date list.
<p>Here are some examples of guest OSes that use or (have used) the test machine modes:
<p>
<ul>
<li><p><a name="helenos">HelenOS:</a>
<br>Old versions of <a href="http://www.helenos.org/">HelenOS</a> can run in GXemul's
<tt>testarm</tt> and <tt>testmips</tt> machine modes.<pre>
<b>ftp <a href="http://www.helenos.org/releases/HelenOS-0.5.0-arm32-GXemul.boot">http://www.helenos.org/releases/HelenOS-0.5.0-arm32-GXemul.boot</a></b>
<b>gxemul -X -E testarm HelenOS-0.5.0-arm32-GXemul.boot</b>
<b>ftp <a href="http://www.helenos.org/releases/HelenOS-0.5.0-mips32-GXemul.boot">http://www.helenos.org/releases/HelenOS-0.5.0-mips32-GXemul.boot</a></b>
<b>gxemul -X -E testmips HelenOS-0.5.0-mips32-GXemul.boot</b></pre>
<p>
<li>FreeBSD/MIPS:
<br>For a while, testmips was <a href="http://web.archive.org/web/20180218123520/https://wiki.freebsd.org/FreeBSD/MipsEmulation">one of
the targets when developing the MIPS port of FreeBSD</a>.
See <a href="https://svnweb.freebsd.org/base?view=revision&revision=234920">revision 234920</a>
for more details. (The target was removed
<a href="https://reviews.freebsd.org/rS342256">in December
2018</a>; focus from now on is on the Malta board.)
<p>
<li><a name="glattmumk">Glatt MU/MK:</a>
<br>One of <a href="https://github.com/caladri/glatt">Glatt MU/MK</a>'s targets is <tt>testmips</tt>.
<p>
<li>MINIX 3.x:
<br><a href="http://yana.jp/20160811/computer/minix.ja.euc.html">http://yana.jp/20160811/computer/minix.ja.euc.html</a> indicates that an attempt was made
to port MINIX 3.x to testarm and testmips.
<p>
<li><a name="ycx5">YCX5:</a>
<br>One of <a href="http://gavare.se/ycx5/">YCX5</a>'s primary development targets is <tt>testmips</tt>.
</ul>
<p><br>
<a name="expdevices"></a>
<h3>Experimental devices:</h3>
<p>The test machines (<tt>testmips</tt>, <tt>testarm</tt>, etc) have the
following experimental devices:
<p>
<center><table border="0" width="80%">
<tr>
<td align="left" valign="top" width="200">
<a name="expdevices_ram"><b><tt>ram</tt>:</b></a>
<p>The first 256 MB of RAM.
<br>Physical address:  <font color="#0000f0">0x00000000</font>
</td>
<td align="left" valign="top" width="25"> </td>
<td align="left" valign="top">
<table border="0">
<tr>
<td align="left" valign="top"><i><u>Comment:</u></i></td>
</tr>
<tr>
<td align="left" valign="top"></td>
</tr>
</table>
</td>
</tr>
<tr height="15">
<td height="15"> </td>
</tr>
<tr>
<td align="left" valign="top" width="200">
<a name="expdevices_cons"><b><tt>cons</tt>:</b></a>
<p>A simple console device, for writing
characters to the controlling terminal
and receiving keypresses.
<p>Source code: <font color="#0000f0"><tt>src/devices/dev_cons.c</tt></font>
<p>Include file: <font color="#0000f0"><tt>dev_cons.h</tt></font>
<br>Physical address:  <font color="#0000f0">0x10000000</font>
</td>
<td align="left" valign="top" width="25"> </td>
<td align="left" valign="top">
<table border="0">
<tr>
<td align="left" valign="top"><i><u>Offset:</u></i> </td>
<td align="left" valign="top"><i><u>Effect:</u></i></td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x00</tt></td>
<td align="left" valign="top">
Read: <b><tt>getchar()</tt></b> (non-blocking; returns
<tt>0</tt> if no char was available)<br>
Write: <b><tt>putchar(ch)</tt></b></td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x10</tt></td>
<td align="left" valign="top">Read or write: <b><tt>halt()</tt></b><br>
(Useful for exiting the emulator.)</td>
</tr>
</table>
</td>
</tr>
<tr height="15">
<td height="15"> </td>
</tr>
<tr>
<td align="left" valign="top">
<a name="expdevices_mp"><b><tt>mp</tt>:</b></a>
<p>This device controls the behaviour of CPUs in an emulated
multi-processor system.
<p>Source code: <font color="#0000f0"><tt>src/devices/dev_mp.c</tt></font>
<p>Include file: <font color="#0000f0"><tt>dev_mp.h</tt></font>
<br>Physical address:  <font color="#0000f0">0x11000000</font>
</td>
<td></td>
<td align="left" valign="top">
<table border="0">
<tr>
<td align="left" valign="top"><i><u>Offset:</u></i> </td>
<td align="left" valign="top"><i><u>Effect:</u></i></td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0000</tt></td>
<td align="left" valign="top">Read: <b><tt>whoami()</tt></b>.
Returns the id of the CPU doing the read.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0010</tt></td>
<td align="left" valign="top">Read: <b><tt>ncpus()</tt></b>.
Returns the number of CPUs in the system.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0020</tt></td>
<td align="left" valign="top">Write: <b><tt>startupcpu(i)</tt></b>.
Starts CPU i. It begins execution at the address
set by a write to startupaddr (see below).</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0030</tt></td>
<td align="left" valign="top">Write: <b><tt>startupaddr(addr)</tt></b>.
Sets the starting address for CPUs.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0040</tt></td>
<td align="left" valign="top">Write: <b><tt>pause_addr(addr)</tt></b>.
Sets the pause address. (NOTE: This is not
used anymore.)</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0050</tt></td>
<td align="left" valign="top">Write: <b><tt>pause_cpu(i)</tt></b>.
Pauses all CPUs <i>except</i> CPU i.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0060</tt></td>
<td align="left" valign="top">Write: <b><tt>unpause_cpu(i)</tt></b>.
Unpauses CPU i.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0070</tt></td>
<td align="left" valign="top">Write: <b><tt>startupstack(addr)</tt></b>.
Sets the startup stack address. (CPUs started with
startupcpu() above will have their stack pointer
set to this value.)</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0080</tt></td>
<td align="left" valign="top">Read: <b><tt>hardware_random()</tt></b>.
This produces a "random" number.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0090</tt></td>
<td align="left" valign="top">Read: <b><tt>memory()</tt></b>.
Returns the number of bytes of RAM in the system.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x00a0</tt></td>
<td align="left" valign="top">Write: <b><tt>ipi_one((nr << 16) + cpuid)</tt></b>.
Sends IPI <tt>nr</tt> to a specific CPU.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x00b0</tt></td>
<td align="left" valign="top">Write: <b><tt>ipi_many((nr << 16) + cpuid)</tt></b>.
Sends IPI <tt>nr</tt> to all CPUs <i>except</i>
the specified one.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x00c0</tt></td>
<td align="left" valign="top">Read: <b><tt>ipi_read()</tt></b>.
Returns the next pending IPI. 0 is returned if there is no
pending IPI (so 0 shouldn't be used for valid IPIs).
Hardware int 6 is deasserted when the IPI queue is empty.
<br>Write: <b><tt>ipi_flush()</tt></b>.
Clears the IPI queue, discarding any pending IPIs.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x00d0</tt></td>
<td align="left" valign="top">Read: <b><tt>ncycles()</tt></b>.
Returns approximately the number of cycles executed on
this CPU. Note: this value is not updated for every instruction,
so it cannot be used for small measurements.</td>
</tr>
</table>
</td>
</tr>
<tr height="15">
<td height="15"> </td>
</tr>
<tr>
<td align="left" valign="top">
<a name="expdevices_fb"><b><tt>fb</tt>:</b></a>
<p>A simple linear framebuffer, for graphics output.
Initial resolution is 640 x 480 pixels, with 3 bytes per pixel
(red, green, blue, 8 bits each).
<p>Source code: <font color="#0000f0"><tt>src/devices/dev_fb.c</tt></font>
<p>Include file: <font color="#0000f0"><tt>dev_fb.h</tt></font>
<br>Physical address:  <font color="#0000f0">0x12000000</font>
</td>
<td></td>
<td align="left" valign="top">
<table border="0">
<tr>
<td align="left" valign="top"><i><u>Offset:</u></i> </td>
<td align="left" valign="top"><i><u>Effect:</u></i></td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x00000000</tt> </td>
<td align="left" valign="top">Read: read pixel values.
Write: write pixel values.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x00f00000</tt> </td>
<td align="left" valign="top">Read/Write: Control ports for changing the
resolution at runtime, etc. See <tt>dev_fb.h</tt> and
<tt>dev_fbctrl.cc</tt> for more details.
<p>If the resolution is read back as X=0 Y=0, then that
means that graphics is not used, only serial console.</td>
</tr>
</table>
</td>
</tr>
<tr height="15">
<td height="15"> </td>
</tr>
<tr>
<td align="left" valign="top">
<a name="expdevices_disk"><b><tt>disk</tt>:</b></a>
<p>Disk controller, which can read from and write
to emulated IDE disks. It does not use interrupts; read and
write operations finish instantaneously.
<p>Source code: <font color="#0000f0"><tt>src/devices/dev_disk.c</tt></font>
<p>Include file: <font color="#0000f0"><tt>dev_disk.h</tt></font>
<br>Physical address:  <font color="#0000f0">0x13000000</font>
</td>
<td></td>
<td align="left" valign="top">
<table border="0">
<tr>
<td align="left" valign="top"><i><u>Offset:</u></i> </td>
<td align="left" valign="top"><i><u>Effect:</u></i></td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0000</tt></td>
<td align="left" valign="top">Write: Set the offset (in bytes) from the beginning
of the disk image. This offset will be used for the next read/write operation.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0008</tt></td>
<td align="left" valign="top">Write: Set the high 32
bits of the offset (in bytes). (*)</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0010</tt></td>
<td align="left" valign="top">Write: Select the IDE ID to be used in the next
read/write operation.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0020</tt></td>
<td align="left" valign="top">Write: Start a read or write operation.
(Writing <tt>0</tt> means a Read operation, a <tt>1</tt> means a
Write operation.)</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0030</tt></td>
<td align="left" valign="top">Read: Get status of the last operation.
(Status 0 means failure, non-zero means success.)</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x4000-</tt><br><tt>0x41ff</tt> </td>
<td align="left" valign="top">Read/Write: 512 bytes data buffer.</td>
</tr>
</table>
</td>
</tr>
<tr height="15">
<td height="15"> </td>
</tr>
<tr>
<td align="left" valign="top">
<a name="expdevices_ether"><b><tt>ether</tt>:</b></a>
<p>A simple ethernet controller, enough to send
and receive packets on a simulated network.
<p>Source code: <font color="#0000f0"><tt>src/devices/dev_ether.c</tt></font>
<p>Include file: <font color="#0000f0"><tt>dev_ether.h</tt></font>
<br>Physical address:  <font color="#0000f0">0x14000000</font>
</td>
<td></td>
<td align="left" valign="top">
<table border="0">
<tr>
<td align="left" valign="top"><i><u>Offset:</u></i> </td>
<td align="left" valign="top"><i><u>Effect:</u></i></td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0000-</tt><br><tt>0x3fff</tt></td>
<td align="left" valign="top">Read/write buffer for the packet to be sent/received.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x4000</tt></td>
<td align="left" valign="top">Read: status word, one or more of these:
<br><tt>0x01</tt> = something was received (because of
the last command)
<br><tt>0x02</tt> = more packets are available
<br><i>NOTE:</i> Whenever the status word is non-zero,
an interrupt is asserted. Reading the status word
clears it, and deasserts the interrupt.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x4010</tt></td>
<td align="left" valign="top">Read: get the Length of the received packet
<br>Write: set the Length of the next packet to transmit</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x4020</tt></td>
<td align="left" valign="top">Write: command:
<br><tt>0x00:</tt> receive a packet
<br><tt>0x01:</tt> send a packet</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x4040</tt></td>
<td align="left" valign="top">Write: an address, where the emulated
MAC address will be copied to.
</tr>
</table>
</td>
</tr>
<tr height="15">
<td height="15"> </td>
</tr>
<tr>
<td align="left" valign="top">
<a name="expdevices_rtc"><b><tt>rtc</tt>:</b></a>
<p>A Real-Time Clock, used to retrieve the current time
and to cause periodic interrupts.
<p>Source code: <font color="#0000f0"><tt>src/devices/dev_rtc.c</tt></font>
<p>Include file: <font color="#0000f0"><tt>dev_rtc.h</tt></font>
<br>Physical address:  <font color="#0000f0">0x15000000</font>
</td>
<td></td>
<td align="left" valign="top">
<table border="0">
<tr>
<td align="left" valign="top"><i><u>Offset:</u></i> </td>
<td align="left" valign="top"><i><u>Effect:</u></i></td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0000</tt></td>
<td align="left" valign="top">Read or Write: Trigger a clock update (a gettimeofday() on the host).</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0010</tt></td>
<td align="left" valign="top">Read: Seconds since 1st January 1970</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0020</tt></td>
<td align="left" valign="top">Read: Microseconds</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0100</tt></td>
<td align="left" valign="top">Read: Get the current
timer interrupt frequency.<br>Write: Set the timer
interrupt frequency. (Writing 0 disables the timer.)</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0110</tt></td>
<td align="left" valign="top">Read or Write: Acknowledge
one timer interrupt. (Note that if multiple interrupts
are pending, only one is acknowledged.)</td>
</tr>
</table>
</td>
</tr>
<tr height="15">
<td height="15"> </td>
</tr>
<tr>
<td align="left" valign="top">
<a name="expdevices_irqc"><b><tt>irqc</tt>:</b></a>
<p>An Interrupt Controller. (Note: Not used for the MIPS test machine.)
<p>Source code: <font color="#0000f0"><tt>src/devices/dev_irqc.c</tt></font>
<p>Include file: <font color="#0000f0"><tt>dev_irqc.h</tt></font>
<br>Physical address:  <font color="#0000f0">0x16000000</font>
</td>
<td></td>
<td align="left" valign="top">
<table border="0">
<tr>
<td align="left" valign="top"><i><u>Offset:</u></i> </td>
<td align="left" valign="top"><i><u>Effect:</u></i></td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x0</tt></td>
<td align="left" valign="top">Read: IRQ status as a 32-bit word, one bit per interrupt source.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x4</tt></td>
<td align="left" valign="top">Write: Mask one interrupt source. Value should be an integer 0..31.</td>
</tr>
<tr>
<td align="left" valign="top"><tt>0x8</tt></td>
<td align="left" valign="top">Write: Unmask one interrupt source. Value should be an integer 0..31.</td>
</tr>
</table>
</td>
</tr>
</table></center>
<p>(*) Note: If the emulated architecture has the capability to write 64-bit
words atomically, then writing to offset 0x0000 of the
<tt>disk</tt> device should be enough to set the offset. For 32-bit
architectures, the lowest 32 bits of the disk offset should first be
written to the register at offset 0x0000, and the top 32 bits should
then be written to the register at offset 0x0008.
<p>The include files for the test machine devices are found in
<a href="../src/include/testmachine/"><tt>src/include/testmachine/</tt></a>.
<p>While these devices may resemble real-world hardware, they are
intentionally made simpler to use. (An exception is the framebuffer;
some machines actually have simple linear framebuffers like this.)
<p>If the physical address is <tt>0x10000000</tt>, then for MIPS that
means that it can be accessed at virtual address
<tt>0xffffffffb0000000</tt>. (Using virtual address
<tt>0xffffffff90000000</tt> may work in the emulator, but should be
avoided, since devices should in general be accessed in a non-cached manner.)
<p>When using the ARM or PPC test machines, the addresses are
<tt>0x10000000</tt>, <tt>0x11000000</tt> etc., so no need to add any
virtual displacement.
<p>The <tt>mp</tt>, <tt>disk</tt>, and <tt>ether</tt> devices are agnostic
when it comes to word-length. For example, when reading offset
<tt>0x0000</tt> of the <tt>mp</tt> device, you may use any kind of read
(an 8-bit read will work just as well as a 64-bit read, although the value
will be truncated to 8 bits in the first case). You can <i>not</i>,
however, read one byte from <tt>0x0000</tt> and one from <tt>0x0001</tt>,
and combine the result. The read from <tt>0x0001</tt> will be invalid.
<p>The <tt>cons</tt> device should be accessed using 8-bit reads
and writes. Doing a getchar() (ie reading from offset <tt>0x00</tt>)
returns <tt>0</tt> if no character was available. Whenever a character is
available, the <tt>cons</tt> device' interrupt is asserted. When there are
no more available characters, the interrupt is deasserted. (Remember that
the interrupt has to be unmasked to be able to actually cause an
interrupt.)
<p>IPIs (inter-processor interrupts) are controlled by the <tt>mp</tt>
device. Whenever an IPI is "sent" from a source to one or more target
CPUs, the interrupt is asserted on the target CPUs, and the IPI number is
added last in the IPI queue for each of the target CPUs. It is then up to
those CPUs to individually read from offset <tt>0x00c0</tt>, to figure out
what kind of IPI it was.
<p>Interrupt mappings are as follows:
<p><center>
<table border="1">
<tr><td align="center">
<b><tt>testmips</tt></b> (as native MIPS interrupts)
</td></tr>
<tr><td>
<table border="0">
<tr><td align="center">IRQ:</td><td> </td>
<td>Used for:</td></tr>
<tr><td align="center">7</td><td></td>
<td>MIPS count/compare interrupt</td></tr>
<tr><td align="center">6</td><td></td>
<td><tt>mp</tt> (inter-processor interrupts)</td></tr>
<tr><td align="center">4</td><td></td>
<td><tt>rtc</tt></td></tr>
<tr><td align="center">3</td><td></td>
<td><tt>ether</tt></td></tr>
<tr><td align="center">2</td><td></td>
<td><tt>cons</tt></td></tr>
</table>
</td></tr>
</table>
<p><table border="1">
<tr><td align="center">
<b><tt>testarm</tt> and others</b> (via the <tt>irqc</tt> device)
</td></tr>
<tr><td>
<table border="0">
<tr><td align="center">IRQ:</td><td> </td>
<td>Used for:</td></tr>
<tr><td align="center">6</td><td></td>
<td><tt>mp</tt> (inter-processor interrupts)</td></tr>
<tr><td align="center">4</td><td></td>
<td><tt>rtc</tt></td></tr>
<tr><td align="center">3</td><td></td>
<td><tt>ether</tt></td></tr>
<tr><td align="center">2</td><td></td>
<td><tt>cons</tt></td></tr>
</table>
</td></tr>
</table>
</center>
<p><br>
</p>
</body>
</html>
|