From 21eb27c3f33787faea51dae0bf03f7771ca79887 Mon Sep 17 00:00:00 2001
From: Jared Boone <jboone@earfeast.com>
Date: Mon, 10 Nov 2014 09:58:49 -0800
Subject: [PATCH 28/68] SSP0: Extract SPI interface from W25Q80BV code.

---
 firmware/common/hackrf_core.c      |  22 ++++++++
 firmware/common/hackrf_core.h      |   5 ++
 firmware/common/spi_ssp0.c         | 104 +++++++++++++++++++++++++++++++++++++
 firmware/common/spi_ssp0.h         |  44 ++++++++++++++++
 firmware/common/w25q80bv.c         |  19 ++-----
 firmware/common/w25q80bv.h         |   2 -
 firmware/common/w25q80bv_spi.c     | 103 ------------------------------------
 firmware/common/w25q80bv_spi.h     |  35 -------------
 firmware/common/w25q80bv_target.c  |  48 +++++++++++++++++
 firmware/common/w25q80bv_target.h  |  32 ++++++++++++
 firmware/hackrf-common.cmake       |   3 ++
 firmware/hackrf_usb/CMakeLists.txt |   2 -
 12 files changed, 263 insertions(+), 156 deletions(-)
 create mode 100644 firmware/common/spi_ssp0.c
 create mode 100644 firmware/common/spi_ssp0.h
 delete mode 100644 firmware/common/w25q80bv_spi.c
 delete mode 100644 firmware/common/w25q80bv_spi.h
 create mode 100644 firmware/common/w25q80bv_target.c
 create mode 100644 firmware/common/w25q80bv_target.h

--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -23,6 +23,7 @@
 
 #include "hackrf_core.h"
 #include "si5351c.h"
+#include "spi_ssp0.h"
 #include "spi_ssp1.h"
 #include "max2837.h"
 #include "max2837_target.h"
@@ -30,6 +31,8 @@
 #include "max5864_target.h"
 #include "rffc5071.h"
 #include "rffc5071_spi.h"
+#include "w25q80bv.h"
+#include "w25q80bv_target.h"
 #include "sgpio.h"
 #include "rf_path.h"
 #include <libopencm3/lpc43xx/i2c.h>
@@ -100,6 +103,25 @@
 	.spi = &rffc5071_spi,
 };
 
+const ssp0_config_t ssp0_config_w25q80bv = {
+	.data_bits = SSP_DATA_8BITS,
+	.serial_clock_rate = 2,
+	.clock_prescale_rate = 2,
+	.select = w25q80bv_target_spi_select,
+	.unselect = w25q80bv_target_spi_unselect,
+};
+
+spi_t spi_ssp0 = {
+	.config = &ssp0_config_w25q80bv,
+	.init = spi_ssp0_init,
+	.transfer = spi_ssp0_transfer,
+	.transfer_gather = spi_ssp0_transfer_gather,
+};
+
+w25q80bv_driver_t spi_flash = {
+	.spi = &spi_ssp0,
+};
+
 void delay(uint32_t duration)
 {
 	uint32_t i;
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -34,11 +34,13 @@
 
 #include "si5351c_drv.h"
 
+#include "spi_ssp0.h"
 #include "spi_ssp1.h"
 
 #include "max2837.h"
 #include "max5864.h"
 #include "rffc5071.h"
+#include "w25q80bv.h"
 
 /* hardware identification number */
 #define BOARD_ID_JELLYBEAN  0
--- /dev/null
+++ b/firmware/common/spi_ssp0.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright 2013 Michael Ossmann
+ * Copyright 2013 Benjamin Vernoux
+ * Copyright 2014 Jared Boone, ShareBrained Technology
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#include "spi_ssp0.h"
+
+#include <libopencm3/lpc43xx/gpio.h>
+#include <libopencm3/lpc43xx/rgu.h>
+#include <libopencm3/lpc43xx/scu.h>
+#include <libopencm3/lpc43xx/ssp.h>
+
+#include "hackrf_core.h"
+
+void spi_ssp0_init(spi_t* const spi, const void* const _config) {
+	/* Reset SPIFI peripheral before to Erase/Write SPIFI memory through SPI */
+	RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
+	
+	const ssp0_config_t* const config = _config;
+
+	ssp_init(SSP0_NUM,
+		config->data_bits,
+		SSP_FRAME_SPI,
+		SSP_CPOL_0_CPHA_0,
+		config->serial_clock_rate,
+		config->clock_prescale_rate,
+		SSP_MODE_NORMAL,
+		SSP_MASTER,
+		SSP_SLAVE_OUT_ENABLE);
+
+	spi->config = config;
+
+	/* Init SPIFI GPIO to Normal GPIO */
+	scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2));    // P3_3 SPIFI_SCK => SSP0_SCK
+	scu_pinmux(P3_4, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_4 SPIFI SPIFI_SIO3 IO3 => GPIO1[14]
+	scu_pinmux(P3_5, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_5 SPIFI SPIFI_SIO2 IO2 => GPIO1[15]
+	scu_pinmux(P3_6, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_6 SPIFI SPIFI_MISO IO1 => GPIO0[6]
+	scu_pinmux(P3_7, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_7 SPIFI SPIFI_MOSI IO0 => GPIO5[10]
+	scu_pinmux(P3_8, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_8 SPIFI SPIFI_CS => GPIO5[11]
+	
+	/* configure SSP pins */
+	scu_pinmux(SCU_SSP0_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
+	scu_pinmux(SCU_SSP0_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
+	scu_pinmux(SCU_SSP0_SCK,  (SCU_SSP_IO | SCU_CONF_FUNCTION2));
+
+	/* configure GPIO pins */
+	scu_pinmux(SCU_FLASH_HOLD, SCU_GPIO_FAST);
+	scu_pinmux(SCU_FLASH_WP, SCU_GPIO_FAST);
+
+	/* drive SSEL, HOLD, and WP pins high */
+	gpio_set(PORT_FLASH, (PIN_FLASH_HOLD | PIN_FLASH_WP));
+
+	/* Set GPIO pins as outputs. */
+	GPIO1_DIR |= (PIN_FLASH_HOLD | PIN_FLASH_WP);
+}
+
+void spi_ssp0_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count) {
+	const ssp0_config_t* const config = spi->config;
+
+	const size_t word_size = (SSP0_CR0 & 0xf) + 1;
+
+	config->select(spi);
+	for(size_t i=0; i<count; i++) {
+		const size_t data_count = transfers[i].count;
+
+		if( word_size > 8 ) {
+			uint16_t* const data = transfers[i].data;
+			for(size_t j=0; j<data_count; j++) {
+				data[j] = ssp_transfer(SSP0_NUM, data[j]);
+			}
+		} else {
+			uint8_t* const data = transfers[i].data;
+			for(size_t j=0; j<data_count; j++) {
+				data[j] = ssp_transfer(SSP0_NUM, data[j]);
+			}
+		}
+	}
+	config->unselect(spi);
+}
+
+void spi_ssp0_transfer(spi_t* const spi, void* const data, const size_t count) {
+	const spi_transfer_t transfers[] = {
+		{ data, count },
+	};
+	spi_ssp0_transfer_gather(spi, transfers, 1);
+}
--- /dev/null
+++ b/firmware/common/spi_ssp0.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2014 Jared Boone, ShareBrained Technology
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef __SPI_SSP0_H__
+#define __SPI_SSP0_H__
+
+#include <stdint.h>
+#include <stddef.h>
+
+#include "spi.h"
+
+#include <libopencm3/lpc43xx/ssp.h>
+
+typedef struct ssp0_config_t {
+	ssp_datasize_t data_bits;
+	uint8_t serial_clock_rate;
+	uint8_t clock_prescale_rate;
+	void (*select)(spi_t* const spi);
+	void (*unselect)(spi_t* const spi);
+} ssp0_config_t;
+
+void spi_ssp0_init(spi_t* const spi, const void* const config);
+void spi_ssp0_transfer(spi_t* const spi, void* const data, const size_t count);
+void spi_ssp0_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
+
+#endif/*__SPI_SSP0_H__*/
--- a/firmware/common/w25q80bv.c
+++ b/firmware/common/w25q80bv.c
@@ -30,7 +30,9 @@
 #include <stdint.h>
 
 #include "w25q80bv.h"
-#include "w25q80bv_spi.h"
+#include "w25q80bv_target.h"
+
+#include "hackrf_core.h"
 
 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
 
@@ -49,7 +51,6 @@
  * Set up pins for GPIO and SPI control, configure SSP0 peripheral for SPI.
  * SSP0_SSEL is controlled by GPIO in order to handle various transfer lengths.
  */
-
 void w25q80bv_setup(w25q80bv_driver_t* const drv)
 {
 	uint8_t device_id;
@@ -58,7 +59,8 @@
 	drv->num_pages = 4096U;
 	drv->num_bytes = 1048576U;
 
-	spi_init(drv->spi, NULL);
+	spi_init(drv->spi, &ssp0_config_w25q80bv);
+	w25q80bv_target_init(drv);
 
 	device_id = 0;
 	while(device_id != W25Q80BV_DEVICE_ID_RES)
@@ -199,14 +201,3 @@
 		w25q80bv_page_program(drv, addr, len, data);
 	}
 }
-
-spi_t w25q80bv_spi = {
-	.config = NULL,
-	.init = w25q80bv_spi_init,
-	.transfer = w25q80bv_spi_transfer,
-	.transfer_gather = w25q80bv_spi_transfer_gather,
-};
-
-w25q80bv_driver_t spi_flash = {
-	.spi = &w25q80bv_spi,
-};
--- a/firmware/common/w25q80bv.h
+++ b/firmware/common/w25q80bv.h
@@ -49,6 +49,4 @@
 uint8_t w25q80bv_get_device_id(w25q80bv_driver_t* const drv);
 void w25q80bv_get_unique_id(w25q80bv_driver_t* const drv, w25q80bv_unique_id_t* unique_id);
 
-extern w25q80bv_driver_t spi_flash;
-
 #endif//__W25Q80BV_H__
--- a/firmware/common/w25q80bv_spi.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * Copyright 2013 Michael Ossmann
- * Copyright 2013 Benjamin Vernoux
- * Copyright 2014 Jared Boone, ShareBrained Technology
- *
- * This file is part of HackRF.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING.  If not, write to
- * the Free Software Foundation, Inc., 51 Franklin Street,
- * Boston, MA 02110-1301, USA.
- */
-
-#include "w25q80bv_spi.h"
-
-#include <libopencm3/lpc43xx/gpio.h>
-#include <libopencm3/lpc43xx/rgu.h>
-#include <libopencm3/lpc43xx/scu.h>
-#include <libopencm3/lpc43xx/ssp.h>
-
-#include "hackrf_core.h"
-
-void w25q80bv_spi_init(spi_t* const spi, const void* const config) {
-	(void)spi;
-	(void)config;
-	
-	const uint8_t serial_clock_rate = 2;
-	const uint8_t clock_prescale_rate = 2;
-
-	/* Reset SPIFI peripheral before to Erase/Write SPIFI memory through SPI */
-	RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
-	
-	/* initialize SSP0 */
-	ssp_init(SSP0_NUM,
-			SSP_DATA_8BITS,
-			SSP_FRAME_SPI,
-			SSP_CPOL_0_CPHA_0,
-			serial_clock_rate,
-			clock_prescale_rate,
-			SSP_MODE_NORMAL,
-			SSP_MASTER,
-			SSP_SLAVE_OUT_ENABLE);
-
-	/* Init SPIFI GPIO to Normal GPIO */
-	scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2));    // P3_3 SPIFI_SCK => SSP0_SCK
-	scu_pinmux(P3_4, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_4 SPIFI SPIFI_SIO3 IO3 => GPIO1[14]
-	scu_pinmux(P3_5, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_5 SPIFI SPIFI_SIO2 IO2 => GPIO1[15]
-	scu_pinmux(P3_6, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_6 SPIFI SPIFI_MISO IO1 => GPIO0[6]
-	scu_pinmux(P3_7, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_7 SPIFI SPIFI_MOSI IO0 => GPIO5[10]
-	scu_pinmux(P3_8, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_8 SPIFI SPIFI_CS => GPIO5[11]
-	
-	/* configure SSP pins */
-	scu_pinmux(SCU_SSP0_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
-	scu_pinmux(SCU_SSP0_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
-	scu_pinmux(SCU_SSP0_SCK,  (SCU_SSP_IO | SCU_CONF_FUNCTION2));
-
-	/* configure GPIO pins */
-	scu_pinmux(SCU_FLASH_HOLD, SCU_GPIO_FAST);
-	scu_pinmux(SCU_FLASH_WP, SCU_GPIO_FAST);
-	scu_pinmux(SCU_SSP0_SSEL, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4));
-
-	/* drive SSEL, HOLD, and WP pins high */
-	gpio_set(PORT_FLASH, (PIN_FLASH_HOLD | PIN_FLASH_WP));
-	gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
-
-	/* Set GPIO pins as outputs. */
-	GPIO1_DIR |= (PIN_FLASH_HOLD | PIN_FLASH_WP);
-	GPIO5_DIR |= PIN_SSP0_SSEL;
-}
-
-void w25q80bv_spi_transfer_gather(
-	spi_t* const spi,
-	const spi_transfer_t* const transfers,
-	const size_t transfer_count
-) {
-	(void)spi;
-
-	gpio_clear(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
-	for(size_t i=0; i<transfer_count; i++) {
-		uint8_t* const p = transfers[i].data;
-		for(size_t j=0; j<transfers[i].count; j++) {
-			p[j] = ssp_transfer(SSP0_NUM, p[j]);
-		}
-	}
-	gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
-}
-
-void w25q80bv_spi_transfer(spi_t* const spi, void* const data, const size_t count) {
-	const spi_transfer_t transfers[] = {
-		{ data, count },
-	};
-	w25q80bv_spi_transfer_gather(spi, transfers, 1);
-}
--- a/firmware/common/w25q80bv_spi.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright 2013 Michael Ossmann
- * Copyright 2013 Benjamin Vernoux
- * Copyright 2014 Jared Boone, ShareBrained Technology
- *
- * This file is part of HackRF.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING.  If not, write to
- * the Free Software Foundation, Inc., 51 Franklin Street,
- * Boston, MA 02110-1301, USA.
- */
-
-#ifndef __W25Q80BV_SPI_H__
-#define __W25Q80BV_SPI_H__
-
-#include <stddef.h>
-
-#include "spi.h"
-
-void w25q80bv_spi_init(spi_t* const spi, const void* const config);
-void w25q80bv_spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t transfer_count);
-void w25q80bv_spi_transfer(spi_t* const spi, void* const data, const size_t count);
-
-#endif/*__W25Q80BV_SPI_H__*/
--- /dev/null
+++ b/firmware/common/w25q80bv_target.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#include "w25q80bv_target.h"
+
+#include <libopencm3/lpc43xx/scu.h>
+#include <libopencm3/lpc43xx/gpio.h>
+#include "hackrf_core.h"
+
+/* TODO: Why is SSEL being controlled manually when SSP0 could do it
+ * automatically?
+ */
+
+void w25q80bv_target_init(w25q80bv_driver_t* const drv) {
+	(void)drv;
+
+	scu_pinmux(SCU_SSP0_SSEL, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4));
+	gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
+	GPIO5_DIR |= PIN_SSP0_SSEL;
+}
+
+void w25q80bv_target_spi_select(spi_t* const spi) {
+	(void)spi;
+	gpio_clear(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
+}
+
+void w25q80bv_target_spi_unselect(spi_t* const spi) {
+	(void)spi;
+	gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
+}
--- /dev/null
+++ b/firmware/common/w25q80bv_target.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#ifndef __W25Q80BV_TARGET_H__
+#define __W25Q80BV_TARGET_H__
+
+#include "w25q80bv.h"
+#include "spi.h"
+
+void w25q80bv_target_init(w25q80bv_driver_t* const drv);
+void w25q80bv_target_spi_select(spi_t* const spi);
+void w25q80bv_target_spi_unselect(spi_t* const spi);
+
+#endif/*__W25Q80BV_TARGET_H__*/
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -141,7 +141,10 @@
 		${PATH_HACKRF_FIRMWARE_COMMON}/max5864_target.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071_spi.c
+		${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv.c
+		${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv_target.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/spi.c
+		${PATH_HACKRF_FIRMWARE_COMMON}/spi_ssp0.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/spi_ssp1.c
 		m0_bin.s
 	)
--- a/firmware/hackrf_usb/CMakeLists.txt
+++ b/firmware/hackrf_usb/CMakeLists.txt
@@ -44,8 +44,6 @@
 	usb_api_transceiver.c
 	"${PATH_HACKRF_FIRMWARE_COMMON}/usb_queue.c"
 	"${PATH_HACKRF_FIRMWARE_COMMON}/fault_handler.c"
-	"${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv.c"
-	"${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv_spi.c"
 	"${PATH_HACKRF_FIRMWARE_COMMON}/cpld_jtag.c"
 	"${PATH_HACKRF_FIRMWARE_COMMON}/xapp058/lenval.c"
 	"${PATH_HACKRF_FIRMWARE_COMMON}/xapp058/micro.c"