1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629
|
/* CHANNEL.C (c) Copyright Roger Bowler, 1999-2001 */
/* ESA/390 Channel Emulator */
/*-------------------------------------------------------------------*/
/* This module contains the channel subsystem functions for the */
/* Hercules S/370 and ESA/390 emulator. */
/*-------------------------------------------------------------------*/
/*-------------------------------------------------------------------*/
/* Additional credits: */
/* Measurement block support by Jan Jaeger */
/* Fix program check on NOP due to addressing - Jan Jaeger */
/* Fix program check on TIC as first ccw on RSCH - Jan Jaeger */
/* Fix PCI intermediate status flags - Jan Jaeger */
/* z/Architecture support - (c) Copyright Jan Jaeger, 1999-2001 */
/* 64-bit IDAW support - Roger Bowler v209 @IWZ*/
/* Incorrect-length-indication-suppression - Jan Jaeger */
/*-------------------------------------------------------------------*/
#include "hercules.h"
#include "opcode.h"
#if defined(OPTION_FISHIO)
#include "w32chan.h"
#endif // defined(OPTION_FISHIO)
#if defined(OPTION_IODELAY) && OPTION_IODELAY > 0
#define IODELAY() usleep(OPTION_IODELAY)
#else
#define IODELAY()
#endif
#undef CHADDRCHK
#if defined(FEATURE_ADDRESS_LIMIT_CHECKING)
#define CHADDRCHK(_addr,_dev) \
( ((_addr) >= sysblk.mainsize) \
|| ((dev->orb.flag5 & ORB5_A) \
&& ((((_dev)->pmcw.flag5 & PMCW5_LM_LOW) \
&& ((_addr) < sysblk.addrlimval)) \
|| (((_dev)->pmcw.flag5 & PMCW5_LM_HIGH) \
&& ((_addr) >= sysblk.addrlimval)) ) ))
#else /*!defined(FEATURE_ADDRESS_LIMIT_CHECKING)*/
#define CHADDRCHK(_addr,_dev) \
((_addr) >= sysblk.mainsize)
#endif /*!defined(FEATURE_ADDRESS_LIMIT_CHECKING)*/
#if !defined(_CHANNEL_C)
#define _CHANNEL_C
/*-------------------------------------------------------------------*/
/* FORMAT I/O BUFFER DATA */
/*-------------------------------------------------------------------*/
static void format_iobuf_data (RADR addr, BYTE *area) /*@IWZ*/
{
BYTE *a; /* -> Byte in main storage */
int i, j; /* Array subscripts */
BYTE c; /* Character work area */
area[0] = '\0';
if (addr < sysblk.mainsize - 16)
{
a = sysblk.mainstor + addr;
j = sprintf (area,
"=>%2.2X%2.2X%2.2X%2.2X %2.2X%2.2X%2.2X%2.2X"
" %2.2X%2.2X%2.2X%2.2X %2.2X%2.2X%2.2X%2.2X ",
a[0], a[1], a[2], a[3], a[4], a[5], a[6], a[7],
a[8], a[9], a[10], a[11], a[12], a[13], a[14], a[15]);
for (i = 0; i < 16; i++)
{
c = ebcdic_to_ascii[*a++];
if (!isprint(c)) c = '.';
area[j++] = c;
}
area[j] = '\0';
}
} /* end function format_iobuf_data */
/*-------------------------------------------------------------------*/
/* DISPLAY CHANNEL COMMAND WORD AND DATA */
/*-------------------------------------------------------------------*/
static void display_ccw (DEVBLK *dev, BYTE ccw[], U32 addr)
{
BYTE area[64]; /* Data display area */
format_iobuf_data (addr, area);
logmsg ("%4.4X:CCW=%2.2X%2.2X%2.2X%2.2X %2.2X%2.2X%2.2X%2.2X%s\n",
dev->devnum,
ccw[0], ccw[1], ccw[2], ccw[3],
ccw[4], ccw[5], ccw[6], ccw[7], area);
} /* end function display_ccw */
// #ifdef FEATURE_S370_CHANNEL
/*-------------------------------------------------------------------*/
/* DISPLAY CHANNEL STATUS WORD */
/*-------------------------------------------------------------------*/
static void display_csw (DEVBLK *dev, BYTE csw[])
{
logmsg ("%4.4X:Stat=%2.2X%2.2X Count=%2.2X%2.2X "
"CCW=%2.2X%2.2X%2.2X\n",
dev->devnum,
csw[4], csw[5], csw[6], csw[7],
csw[1], csw[2], csw[3]);
} /* end function display_csw */
// #endif /*FEATURE_S370_CHANNEL*/
// #ifdef FEATURE_CHANNEL_SUBSYSTEM
/*-------------------------------------------------------------------*/
/* DISPLAY SUBCHANNEL STATUS WORD */
/*-------------------------------------------------------------------*/
static void display_scsw (DEVBLK *dev, SCSW scsw)
{
logmsg ("%4.4X:SCSW=%2.2X%2.2X%2.2X%2.2X "
"Stat=%2.2X%2.2X Count=%2.2X%2.2X "
"CCW=%2.2X%2.2X%2.2X%2.2X\n",
dev->devnum,
scsw.flag0, scsw.flag1, scsw.flag2, scsw.flag3,
scsw.unitstat, scsw.chanstat,
scsw.count[0], scsw.count[1],
scsw.ccwaddr[0], scsw.ccwaddr[1],
scsw.ccwaddr[2], scsw.ccwaddr[3]);
} /* end function display_scsw */
// #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
/*-------------------------------------------------------------------*/
/* SUBROUTINE TO WAIT FOR ONE MICROSECOND */
/*-------------------------------------------------------------------*/
static inline void yield (void)
{
static struct timeval tv_1usec = {0, 1};
select (1, NULL, NULL, NULL, &tv_1usec);
} /* end function yield */
// #ifdef FEATURE_S370_CHANNEL
/*-------------------------------------------------------------------*/
/* STORE CHANNEL ID */
/*-------------------------------------------------------------------*/
int stchan_id (REGS *regs, U16 chan)
{
U32 chanid; /* Channel identifier word */
int devcount = 0; /* #of devices on channel */
DEVBLK *dev; /* -> Device control block */
PSA_3XX *psa; /* -> Prefixed storage area */
/* Find a device on specified channel with pending interrupt */
for (dev = sysblk.firstdev; dev != NULL; dev = dev->nextdev)
{
/* Skip the device if not on specified channel */
if ((dev->devnum & 0xFF00) != chan)
continue;
/* Count devices on channel */
devcount++;
} /* end for(dev) */
/* Exit with condition code 3 if no devices on channel */
if (devcount == 0)
return 3;
/* Construct the channel id word */
chanid = CHANNEL_BMX;
/* Store the channel id word at PSA+X'A8' */
psa = (PSA_3XX*)(sysblk.mainstor + regs->PX);
STORE_FW(psa->chanid, chanid);
/* Exit with condition code 0 indicating channel id stored */
return 0;
} /* end function testch */
/*-------------------------------------------------------------------*/
/* TEST CHANNEL */
/*-------------------------------------------------------------------*/
int testch (REGS *regs, U16 chan)
{
int devcount = 0; /* #of devices on channel */
DEVBLK *dev; /* -> Device control block */
/* Find a device on specified channel with pending interrupt */
for (dev = sysblk.firstdev; dev != NULL; dev = dev->nextdev)
{
/* Skip the device if not on specified channel */
if ((dev->devnum & 0xFF00) != chan)
continue;
/* Count devices on channel */
devcount++;
/* Exit with condition code 1 if interrupt pending */
if (dev->pending || dev->pcipending)
return 1;
} /* end for(dev) */
/* Exit with condition code 3 if no devices on channel */
if (devcount == 0)
return 3;
/* Exit with condition code 0 indicating channel available */
return 0;
} /* end function testch */
/*-------------------------------------------------------------------*/
/* TEST I/O */
/*-------------------------------------------------------------------*/
int testio (REGS *regs, DEVBLK *dev, BYTE ibyte)
{
int cc; /* Condition code */
PSA_3XX *psa; /* -> Prefixed storage area */
if (dev->ccwtrace || dev->ccwstep)
logmsg ("%4.4X: Test I/O\n", dev->devnum);
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* Test device status and set condition code */
if (dev->busy)
{
/* Wait for one microsecond */
// yield ();
/* Set condition code 2 if device is busy */
cc = 2;
}
else if (dev->pcipending)
{
/* Set condition code 1 if PCI interrupt pending */
cc = 1;
/* Store the channel status word at PSA+X'40' */
psa = (PSA_3XX*)(sysblk.mainstor + regs->PX);
memcpy (psa->csw, dev->pcicsw, 8);
if (dev->ccwtrace || dev->ccwstep)
display_csw (dev, dev->pcicsw);
/* Clear the pending PCI interrupt */
dev->pcipending = 0;
}
else if (dev->pending)
{
/* Set condition code 1 if interrupt pending */
cc = 1;
/* Store the channel status word at PSA+X'40' */
psa = (PSA_3XX*)(sysblk.mainstor + regs->PX);
memcpy (psa->csw, dev->csw, 8);
if (dev->ccwtrace || dev->ccwstep)
display_csw (dev, dev->csw);
/* Clear the pending interrupt */
dev->pending = 0;
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
}
else
{
/* Set condition code 0 if device is available */
cc = 0;
}
/* Release the device lock */
release_lock (&dev->lock);
/* Return the condition code */
return cc;
} /* end function testio */
/*-------------------------------------------------------------------*/
/* HALT I/O */
/*-------------------------------------------------------------------*/
int haltio (REGS *regs, DEVBLK *dev, BYTE ibyte)
{
int cc; /* Condition code */
PSA_3XX *psa; /* -> Prefixed storage area */
if (dev->ccwtrace || dev->ccwstep)
logmsg ("%4.4X: Halt I/O\n", dev->devnum);
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* Test device status and set condition code */
if (dev->busy)
{
/* Set condition code 2 if device is busy */
cc = 2;
/* Tell channel and device to halt */
dev->scsw.flag2 |= SCSW2_FC_HALT;
/* Clear pending interrupts */
dev->pending = 0;
dev->pcipending = 0;
}
else if (!(dev->pcipending) && !(dev->pending))
{
/* Set condition code 1 */
cc = 1;
/* Store the channel status word at PSA+X'40' */
psa = (PSA_3XX*)(sysblk.mainstor + regs->PX);
memcpy (psa->csw, dev->csw, 8);
if (dev->ccwtrace || dev->ccwstep)
display_csw (dev, dev->csw);
/* Signal pending interrupt */
dev->pending = 1;
}
else
{
/* Set condition code 0 if interrupt is pending */
cc = 0;
}
/* For 3270 device, clear any pending input */
if (dev->devtype == 0x3270)
{
dev->readpending = 0;
dev->rlen3270 = 0;
}
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
/* Release the device lock */
release_lock (&dev->lock);
/* Possible I/O interrupt */
obtain_lock (&sysblk.intlock);
if (dev->pending || dev->pcipending)
QUEUE_IO_INTERRUPT (dev);
ON_IC_IOPENDING;
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
release_lock (&sysblk.intlock);
/* Return the condition code */
return cc;
} /* end function haltio */
// #endif /*FEATURE_S370_CHANNEL*/
// #ifdef FEATURE_CHANNEL_SUBSYSTEM
/*-------------------------------------------------------------------*/
/* CANCEL SUBCHANNEL */
/*-------------------------------------------------------------------*/
/* Input */
/* regs -> CPU register context */
/* dev -> Device control block */
/* Return value */
/* The return value is the condition code for the XSCH */
/* 0=start function cancelled (not yet implemented) */
/* 1=status pending (no action taken) */
/* 2=function not applicable */
/*-------------------------------------------------------------------*/
int cancel_subchan (REGS *regs, DEVBLK *dev)
{
int cc; /* Condition code */
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* Check pending status */
if ((dev->pciscsw.flag3 & SCSW3_SC_PEND)
|| (dev->scsw.flag3 & SCSW3_SC_PEND))
cc = 1;
else
/* cc = cancel_start_function() */
cc = 2;
/* Release the device lock */
release_lock (&dev->lock);
/* Return the condition code */
return cc;
} /* end function test_subchan */
/*-------------------------------------------------------------------*/
/* TEST SUBCHANNEL */
/*-------------------------------------------------------------------*/
/* Input */
/* regs -> CPU register context */
/* dev -> Device control block */
/* Output */
/* irb -> Interruption response block */
/* Return value */
/* The return value is the condition code for the TSCH */
/* instruction: 0=status was pending and is now cleared, */
/* 1=no status was pending. The IRB is updated in both cases. */
/*-------------------------------------------------------------------*/
int test_subchan (REGS *regs, DEVBLK *dev, IRB *irb)
{
int cc; /* Condition code */
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* Return PCI SCSW if PCI status is pending */
if (dev->pciscsw.flag3 & SCSW3_SC_PEND)
{
/* Display the subchannel status word */
if (dev->ccwtrace || dev->ccwstep)
display_scsw (dev, dev->pciscsw);
/* Copy the PCI SCSW to the IRB */
irb->scsw = dev->pciscsw;
/* Clear the ESW and ECW in the IRB */
memset (&irb->esw, 0, sizeof(ESW));
irb->esw.lpum = 0x80;
memset (irb->ecw, 0, sizeof(irb->ecw));
/* Clear the pending PCI status */
dev->pciscsw.flag2 &= ~(SCSW2_FC | SCSW2_AC);
dev->pciscsw.flag3 &= ~(SCSW3_SC);
/* Release the device lock */
release_lock (&dev->lock);
/* Return condition code 0 to indicate status was pending */
return 0;
} /* end if(pcipending) */
/* Copy the subchannel status word to the IRB */
irb->scsw = dev->scsw;
/* Copy the extended status word to the IRB */
irb->esw = dev->esw;
/* Copy the extended control word to the IRB */
memcpy (irb->ecw, dev->ecw, sizeof(irb->ecw));
/* Clear any pending interrupt */
dev->pending = 0;
/* Test device status and set condition code */
if (dev->scsw.flag3 & SCSW3_SC_PEND)
{
/* Set condition code 0 if status pending */
cc = 0;
/* Display the subchannel status word */
if (dev->ccwtrace || dev->ccwstep)
display_scsw (dev, dev->scsw);
/* [14.3.13] If status is anything other than intermediate with
pending then clear the function control, activity control,
status control, and path not-operational bits in the SCSW */
if ((dev->scsw.flag3 & SCSW3_SC)
!= (SCSW3_SC_INTER | SCSW3_SC_PEND))
{
dev->scsw.flag2 &= ~(SCSW2_FC | SCSW2_AC);
dev->scsw.flag3 &= ~(SCSW3_AC_SUSP);
dev->scsw.flag1 &= ~(SCSW1_N);
}
else
{
/* [14.3.13] Clear the function control bits if function
code is halt and the channel program is suspended */
if ((dev->scsw.flag2 & SCSW2_FC_HALT)
&& (dev->scsw.flag3 & SCSW3_AC_SUSP))
dev->scsw.flag2 &= ~(SCSW2_FC);
/* [14.3.13] Clear the activity control bits if function
code is start+halt and channel program is suspended */
if ((dev->scsw.flag2 & (SCSW2_FC_START | SCSW2_FC_HALT))
== (SCSW2_FC_START | SCSW2_FC_HALT)
&& (dev->scsw.flag3 & SCSW3_AC_SUSP))
{
dev->scsw.flag2 &= ~(SCSW2_AC);
dev->scsw.flag3 &= ~(SCSW3_AC_SUSP);
dev->scsw.flag1 &= ~(SCSW1_N);
}
/* [14.3.13] Clear the resume pending bit if function code
is start without halt and channel program suspended */
if ((dev->scsw.flag2 & (SCSW2_FC_START | SCSW2_FC_HALT))
== SCSW2_FC_START
&& (dev->scsw.flag3 & SCSW3_AC_SUSP))
{
dev->scsw.flag2 &= ~(SCSW2_AC_RESUM);
dev->scsw.flag1 &= ~(SCSW1_N);
}
} /* end if(INTER+PEND) */
/* Clear the status bits in the SCSW */
dev->scsw.flag3 &= ~(SCSW3_SC);
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
}
else
{
/* Wait for one microsecond */
// yield ();
/* Set condition code 1 if status not pending */
cc = 1;
}
/* Release the device lock */
release_lock (&dev->lock);
/* Return the condition code */
return cc;
} /* end function test_subchan */
/*-------------------------------------------------------------------*/
/* CLEAR SUBCHANNEL */
/*-------------------------------------------------------------------*/
/* Input */
/* regs -> CPU register context */
/* dev -> Device control block */
/*-------------------------------------------------------------------*/
void clear_subchan (REGS *regs, DEVBLK *dev)
{
if (dev->ccwtrace || dev->ccwstep)
logmsg ("%4.4X: Clear subchannel\n", dev->devnum);
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* If the device is busy then signal the device to clear */
if (dev->busy)
{
/* Set clear pending condition */
dev->scsw.flag2 |= SCSW2_FC_CLEAR | SCSW2_AC_CLEAR;
/* Signal the subchannel to resume if it is suspended */
if (dev->scsw.flag3 & SCSW3_AC_SUSP)
{
dev->scsw.flag2 |= SCSW2_AC_RESUM;
signal_condition (&dev->resumecond);
}
#if !defined(NO_SIGABEND_HANDLER)
else
{
if( dev->ctctype )
signal_thread(dev->tid, SIGUSR2);
}
#endif /*!defined(NO_SIGABEND_HANDLER)*/
/* Release the device lock */
release_lock (&dev->lock);
}
else
{
/* [15.3.2] Perform clear function subchannel modification */
dev->pmcw.pom = 0xFF;
dev->pmcw.lpum = 0x00;
dev->pmcw.pnom = 0x00;
/* [15.3.3] Perform clear function signaling and completion */
dev->scsw.flag0 = 0;
dev->scsw.flag1 = 0;
dev->scsw.flag2 &= ~(SCSW2_FC | SCSW2_AC);
dev->scsw.flag2 |= SCSW2_FC_CLEAR;
dev->scsw.flag3 &= ~(SCSW3_AC | SCSW3_SC);
dev->scsw.flag3 |= SCSW3_SC_PEND;
dev->scsw.ccwaddr[0] = 0;
dev->scsw.ccwaddr[1] = 0;
dev->scsw.ccwaddr[2] = 0;
dev->scsw.ccwaddr[3] = 0;
dev->scsw.chanstat = 0;
dev->scsw.unitstat = 0;
dev->scsw.count[0] = 0;
dev->scsw.count[1] = 0;
dev->pcipending = 0;
dev->pending = 1;
/* For 3270 device, clear any pending input */
if (dev->devtype == 0x3270)
{
dev->readpending = 0;
dev->rlen3270 = 0;
}
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
/* Release the device lock */
release_lock (&dev->lock);
/* Signal waiting CPUs that an interrupt may be pending */
obtain_lock (&sysblk.intlock);
QUEUE_IO_INTERRUPT (dev);
ON_IC_IOPENDING;
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
release_lock (&sysblk.intlock);
}
} /* end function clear_subchan */
/*-------------------------------------------------------------------*/
/* HALT SUBCHANNEL */
/*-------------------------------------------------------------------*/
/* Input */
/* regs -> CPU register context */
/* dev -> Device control block */
/* Return value */
/* The return value is the condition code for the HSCH */
/* instruction: 0=Halt initiated, 1=Non-intermediate status */
/* pending, 2=Busy */
/*-------------------------------------------------------------------*/
int halt_subchan (REGS *regs, DEVBLK *dev)
{
if (dev->ccwtrace || dev->ccwstep)
logmsg ("%4.4X: Halt subchannel\n", dev->devnum);
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* Set condition code 1 if subchannel is status pending alone or
is status pending with alert, primary, or secondary status */
if ((dev->scsw.flag3 & SCSW3_SC) == SCSW3_SC_PEND
|| ((dev->scsw.flag3 & SCSW3_SC_PEND)
&& (dev->scsw.flag3 &
(SCSW3_SC_ALERT | SCSW3_SC_PRI | SCSW3_SC_SEC))))
{
if (dev->ccwtrace || dev->ccwstep)
logmsg ("%4.4X: Halt subchannel: cc=1\n", dev->devnum);
release_lock (&dev->lock);
return 1;
}
/* Set condition code 2 if the halt function or the clear
function is already in progress at the subchannel */
if (dev->scsw.flag2 & (SCSW2_AC_HALT | SCSW2_AC_CLEAR))
{
if (dev->ccwtrace || dev->ccwstep)
logmsg ("%4.4X: Halt subchannel: cc=2\n", dev->devnum);
release_lock (&dev->lock);
return 2;
}
/* If the device is busy then signal subchannel to halt */
if (dev->busy)
{
/* Set halt pending condition and reset pending condition */
dev->scsw.flag2 |= (SCSW2_FC_HALT | SCSW2_AC_HALT);
dev->scsw.flag3 &= ~SCSW3_SC_PEND;
/* Clear any pending interrupt */
dev->pcipending = 0;
dev->pending = 0;
/* Signal the subchannel to resume if it is suspended */
if (dev->scsw.flag3 & SCSW3_AC_SUSP)
{
dev->scsw.flag2 |= SCSW2_AC_RESUM;
signal_condition (&dev->resumecond);
}
#if !defined(NO_SIGABEND_HANDLER)
else
{
if( dev->ctctype )
signal_thread(dev->tid, SIGUSR2);
}
#endif /*!defined(NO_SIGABEND_HANDLER)*/
/* Release the device lock */
release_lock (&dev->lock);
}
else
{
/* [15.4.2] Perform halt function signaling and completion */
dev->scsw.flag2 |= SCSW2_FC_HALT;
dev->scsw.flag3 |= SCSW3_SC_PEND;
dev->pcipending = 0;
dev->pending = 1;
/* For 3270 device, clear any pending input */
if (dev->devtype == 0x3270)
{
dev->readpending = 0;
dev->rlen3270 = 0;
}
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
/* Release the device lock */
release_lock (&dev->lock);
/* Signal waiting CPUs that an interrupt may be pending */
obtain_lock (&sysblk.intlock);
QUEUE_IO_INTERRUPT (dev);
ON_IC_IOPENDING;
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
release_lock (&sysblk.intlock);
}
/* Return condition code zero */
if (dev->ccwtrace || dev->ccwstep)
logmsg ("%4.4X: Halt subchannel: cc=0\n", dev->devnum);
return 0;
} /* end function halt_subchan */
/*-------------------------------------------------------------------*/
/* RESUME SUBCHANNEL */
/*-------------------------------------------------------------------*/
/* Input */
/* regs -> CPU register context */
/* dev -> Device control block */
/* Return value */
/* The return value is the condition code for the RSCH */
/* instruction: 0=subchannel has been made resume pending, */
/* 1=status was pending, 2=resume not allowed */
/*-------------------------------------------------------------------*/
int resume_subchan (REGS *regs, DEVBLK *dev)
{
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* Set condition code 1 if subchannel has status pending */
if (dev->scsw.flag3 & SCSW3_SC_PEND)
{
if (dev->ccwtrace || dev->ccwstep)
logmsg ("%4.4X: Resume subchannel: cc=1\n", dev->devnum);
release_lock (&dev->lock);
return 1;
}
/* Set condition code 2 if subchannel has any function other
than the start function alone, is already resume pending,
or the ORB for the SSCH did not specify suspend control */
if ((dev->scsw.flag2 & SCSW2_FC) != SCSW2_FC_START
|| (dev->scsw.flag2 & SCSW2_AC_RESUM)
|| (dev->scsw.flag0 & SCSW0_S) == 0)
{
if (dev->ccwtrace || dev->ccwstep)
logmsg ("%4.4X: Resume subchannel: cc=2\n", dev->devnum);
release_lock (&dev->lock);
return 2;
}
/* Clear the path not-operational mask if in suspend state */
if (dev->scsw.flag3 & SCSW3_AC_SUSP)
dev->pmcw.pnom = 0x00;
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
/* Set the resume pending flag and signal the subchannel */
dev->scsw.flag2 |= SCSW2_AC_RESUM;
signal_condition (&dev->resumecond);
if (dev->ccwtrace || dev->ccwstep)
logmsg ("%4.4X: Resume subchannel: cc=0\n", dev->devnum);
/* Release the device lock */
release_lock (&dev->lock);
/* Return condition code zero */
return 0;
} /* end function resume_subchan */
// #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
void
device_reset (DEVBLK *dev)
{
obtain_lock (&dev->lock);
dev->pending = 0;
if(dev->busy)
signal_condition(&dev->resumecond);
dev->busy = 0;
dev->readpending = 0;
dev->pcipending = 0;
dev->crwpending = 0;
dev->pmcw.intparm[0] = 0;
dev->pmcw.intparm[1] = 0;
dev->pmcw.intparm[2] = 0;
dev->pmcw.intparm[3] = 0;
dev->pmcw.flag4 &= ~PMCW4_ISC;
dev->pmcw.flag5 &= ~(PMCW5_E | PMCW5_LM | PMCW5_MM | PMCW5_D);
dev->pmcw.pnom = 0;
dev->pmcw.lpum = 0;
dev->pmcw.mbi[0] = 0;
dev->pmcw.mbi[1] = 0;
dev->pmcw.flag27 &= ~PMCW27_S;
dev->ckdxtdef = 0;
dev->ckdsetfm = 0;
dev->ckdlcount = 0;
memset (&dev->scsw, 0, sizeof(SCSW));
memset (&dev->pciscsw, 0, sizeof(SCSW));
memset (dev->sense, 0, sizeof(dev->sense));
memset (dev->pgid, 0, sizeof(dev->pgid));
release_lock (&dev->lock);
} /* end device_reset() */
int
chp_reset(BYTE chpid)
{
DEVBLK *dev; /* -> Device control block */
int i;
int operational = 3;
/* Reset each device in the configuration */
for (dev = sysblk.firstdev; dev != NULL; dev = dev->nextdev)
{
for(i = 0; i < 8; i++)
{
if((chpid == dev->pmcw.chpid[i])
&& (dev->pmcw.pim & dev->pmcw.pam & dev->pmcw.pom & (0x80 >> i)) )
{
operational = 0;
device_reset(dev);
}
}
}
/* Signal console thread to redrive select */
signal_thread (sysblk.cnsltid, SIGUSR2);
return operational;
} /* end function chp_reset */
/*-------------------------------------------------------------------*/
/* I/O RESET */
/* Resets status of all devices ready for IPL. Note that device */
/* positioning is not affected by I/O reset; thus the system can */
/* be IPLed from current position in a tape or card reader file. */
/*-------------------------------------------------------------------*/
void
io_reset (void)
{
DEVBLK *dev; /* -> Device control block */
/* Reset each device in the configuration */
for (dev = sysblk.firstdev; dev != NULL; dev = dev->nextdev)
device_reset(dev);
/* No crws pending anymore */
OFF_IC_CHANRPT;
/* Signal console thread to redrive select */
signal_thread (sysblk.cnsltid, SIGUSR2);
} /* end function io_reset */
#if !defined(OPTION_FISHIO)
/*-------------------------------------------------------------------*/
/* Execute a queued I/O */
/*-------------------------------------------------------------------*/
void device_thread ()
{
DEVBLK *dev;
struct timespec waittime;
struct timeval now;
int timedout;
obtain_lock(&sysblk.ioqlock);
sysblk.devtnbr++;
if (sysblk.devtnbr > sysblk.devthwm)
sysblk.devthwm = sysblk.devtnbr;
while (1)
{
while ((dev=sysblk.ioq) != NULL)
{
sysblk.ioq = dev->nextioq;
if (sysblk.ioq && sysblk.devtwait)
signal_condition(&sysblk.ioqcond);
dev->tid = thread_id();
release_lock (&sysblk.ioqlock);
switch (sysblk.arch_mode)
{
case ARCH_370: s370_execute_ccw_chain (dev); break;
case ARCH_900: z900_execute_ccw_chain (dev); break;
default:
case ARCH_390: s390_execute_ccw_chain (dev); break;
}
obtain_lock(&sysblk.ioqlock);
dev->tid = 0;
}
if (sysblk.devtmax < 0
|| (sysblk.devtmax > 0 && sysblk.devtnbr > sysblk.devtmax))
break;
gettimeofday(&now, NULL);
waittime.tv_sec = now.tv_sec + MAX_DEVICE_THREAD_IDLE_SECS;
waittime.tv_nsec = now.tv_usec * 1000;
/* Wait for work to arrive or timer to expire... */
sysblk.devtwait++;
timedout = timed_wait_condition
(&sysblk.ioqcond, &sysblk.ioqlock, &waittime);
sysblk.devtwait--;
/* If we timed out AND ioq is NULL then we should exit */
if (timedout && sysblk.ioq == NULL) break;
}
sysblk.devtnbr--;
release_lock (&sysblk.ioqlock);
} /* end function device_thread */
#endif // !defined(OPTION_FISHIO)
#endif /*!defined(_CHANNEL_C)*/
/*-------------------------------------------------------------------*/
/* FETCH A CHANNEL COMMAND WORD FROM MAIN STORAGE */
/*-------------------------------------------------------------------*/
static void ARCH_DEP(fetch_ccw) (
DEVBLK *dev, /* -> Device block */
BYTE ccwkey, /* Bits 0-3=key, 4-7=zeroes */
BYTE ccwfmt, /* CCW format (0 or 1) @IWZ*/
U32 ccwaddr, /* Main storage addr of CCW */
BYTE *code, /* Returned operation code */
U32 *addr, /* Returned data address */
BYTE *flags, /* Returned flags */
U16 *count, /* Returned data count */
BYTE *chanstat) /* Returned channel status */
{
BYTE storkey; /* Storage key */
BYTE *ccw; /* CCW pointer */
/* Channel program check if CCW is not on a doubleword
boundary or is outside limit of main storage */
if ( (ccwaddr & 0x00000007) || CHADDRCHK(ccwaddr, dev) )
{
*chanstat = CSW_PROGC;
return;
}
/* Channel protection check if CCW is fetch protected */
storkey = STORAGE_KEY(ccwaddr);
if (ccwkey != 0 && (storkey & STORKEY_FETCH)
&& (storkey & STORKEY_KEY) != ccwkey)
{
*chanstat = CSW_PROTC;
return;
}
/* Set the main storage reference bit for the CCW location */
STORAGE_KEY(ccwaddr) |= STORKEY_REF;
/* Point to the CCW in main storage */
ccw = sysblk.mainstor + ccwaddr;
/* Extract CCW opcode, flags, byte count, and data address */
if (ccwfmt == 0)
{
*code = ccw[0];
*addr = ((U32)(ccw[1]) << 16) | ((U32)(ccw[2]) << 8)
| ccw[3];
*flags = ccw[4];
*count = ((U16)(ccw[6]) << 8) | ccw[7];
}
else
{
*code = ccw[0];
*flags = ccw[1];
*count = ((U16)(ccw[2]) << 8) | ccw[3];
*addr = ((U32)(ccw[4]) << 24) | ((U32)(ccw[5]) << 16)
| ((U32)(ccw[6]) << 8) | ccw[7];
}
} /* end function fetch_ccw */
/*-------------------------------------------------------------------*/
/* FETCH AN INDIRECT DATA ADDRESS WORD FROM MAIN STORAGE */
/*-------------------------------------------------------------------*/
static void ARCH_DEP(fetch_idaw) (
DEVBLK *dev, /* -> Device block */
BYTE code, /* CCW operation code */
BYTE ccwkey, /* Bits 0-3=key, 4-7=zeroes */
BYTE idawfmt, /* IDAW format (1 or 2) @IWZ*/
U16 idapmask, /* IDA page size - 1 @IWZ*/
int idaseq, /* 0=1st IDAW */
U32 idawaddr, /* Main storage addr of IDAW */
RADR *addr, /* Returned IDAW content @IWZ*/
U16 *len, /* Returned IDA data length */
BYTE *chanstat) /* Returned channel status */
{
RADR idaw; /* Contents of IDAW @IWZ*/
U32 idaw1; /* Format-1 IDAW @IWZ*/
U64 idaw2; /* Format-2 IDAW @IWZ*/
RADR idapage; /* Addr of next IDA page @IWZ*/
U16 idalen; /* #of bytes until next page */
BYTE storkey; /* Storage key */
/* Channel program check if IDAW is not on correct @IWZ
boundary or is outside limit of main storage */
if ((idawaddr & ((idawfmt == 2) ? 0x07 : 0x03)) /*@IWZ*/
|| CHADDRCHK(idawaddr, dev) )
{
*chanstat = CSW_PROGC;
return;
}
/* Channel protection check if IDAW is fetch protected */
storkey = STORAGE_KEY(idawaddr);
if (ccwkey != 0 && (storkey & STORKEY_FETCH)
&& (storkey & STORKEY_KEY) != ccwkey)
{
*chanstat = CSW_PROTC;
return;
}
/* Set the main storage reference bit for the IDAW location */
STORAGE_KEY(idawaddr) |= STORKEY_REF;
/* Fetch IDAW from main storage */
if (idawfmt == 2) /*@IWZ*/
{ /*@IWZ*/
/* Fetch format-2 IDAW */ /*@IWZ*/
FETCH_DW(idaw2, sysblk.mainstor + idawaddr); /*@IWZ*/
#ifndef FEATURE_ESAME /*@IWZ*/
/* Channel program check in ESA/390 mode
if the format-2 IDAW exceeds 2GB-1 */ /*@IWZ*/
if (idaw2 > 0x7FFFFFFF) /*@IWZ*/
{ /*@IWZ*/
*chanstat = CSW_PROGC; /*@IWZ*/
return; /*@IWZ*/
} /*@IWZ*/
#endif /*!FEATURE_ESAME*/ /*@IWZ*/
/* Save contents of format-2 IDAW */ /*@IWZ*/
idaw = idaw2; /*@IWZ*/
} /*@IWZ*/
else /*@IWZ*/
{ /*@IWZ*/
/* Fetch format-1 IDAW */ /*@IWZ*/
FETCH_FW(idaw1, sysblk.mainstor + idawaddr); /*@IWZ*/
/* Channel program check if bit 0 of
the format-1 IDAW is not zero */ /*@IWZ*/
if (idaw1 & 0x80000000) /*@IWZ*/
{ /*@IWZ*/
*chanstat = CSW_PROGC; /*@IWZ*/
return; /*@IWZ*/
} /*@IWZ*/
/* Save contents of format-1 IDAW */ /*@IWZ*/
idaw = idaw1; /*@IWZ*/
} /*@IWZ*/
/* Channel program check if IDAW data
location is outside main storage */
if ( CHADDRCHK(idaw, dev) )
{
*chanstat = CSW_PROGC;
return;
}
/* Channel program check if IDAW data location is not
on a page boundary, except for the first IDAW */ /*@IWZ*/
if (idaseq > 0 && (idaw & idapmask) != 0) /*@IWZ*/
{
*chanstat = CSW_PROGC;
return;
}
/* Calculate address of next page boundary */ /*@IWZ*/
idapage = (idaw + idapmask + 1) & ~idapmask; /*@IWZ*/
idalen = idapage - idaw;
/* Return the address and length for this IDAW */
*addr = idaw;
*len = idalen;
} /* end function fetch_idaw */
/*-------------------------------------------------------------------*/
/* COPY DATA BETWEEN CHANNEL I/O BUFFER AND MAIN STORAGE */
/*-------------------------------------------------------------------*/
static void ARCH_DEP(copy_iobuf) (
DEVBLK *dev, /* -> Device block */
BYTE code, /* CCW operation code */
BYTE flags, /* CCW flags */
U32 addr, /* Data address */
U16 count, /* Data count */
BYTE ccwkey, /* Protection key */
BYTE idawfmt, /* IDAW format (1 or 2) @IWZ*/
U16 idapmask, /* IDA page size - 1 @IWZ*/
BYTE *iobuf, /* -> Channel I/O buffer */
BYTE *chanstat) /* Returned channel status */
{
U32 idawaddr; /* Main storage addr of IDAW */
U16 idacount; /* IDA bytes remaining */
int idaseq; /* IDA sequence number */
RADR idadata; /* IDA data address @IWZ*/
U16 idalen; /* IDA data length */
BYTE storkey; /* Storage key */
RADR page,startpage,endpage; /* Storage key pages */
BYTE readcmd; /* 1=READ, SENSE, or RDBACK */
BYTE area[64]; /* Data display area */
/* Exit if no bytes are to be copied */
if (count == 0)
return;
/* Set flag to indicate direction of data movement */
readcmd = IS_CCW_READ(code)
|| IS_CCW_SENSE(code)
|| IS_CCW_RDBACK(code);
/* Move data when indirect data addressing is used */
if (flags & CCW_FLAGS_IDA)
{
idawaddr = addr;
idacount = count;
for (idaseq = 0; idacount > 0; idaseq++)
{
/* Fetch the IDAW and set IDA pointer and length */
ARCH_DEP(fetch_idaw) (dev, code, ccwkey, idawfmt, /*@IWZ*/
idapmask, idaseq, idawaddr, /*@IWZ*/
&idadata, &idalen, chanstat);
/* Exit if fetch_idaw detected channel program check */
if (*chanstat != 0) return;
/* Channel protection check if IDAW data location is
fetch protected, or if location is store protected
and command is READ, READ BACKWARD, or SENSE */
storkey = STORAGE_KEY(idadata);
if (ccwkey != 0 && (storkey & STORKEY_KEY) != ccwkey
&& ((storkey & STORKEY_FETCH) || readcmd))
{
*chanstat = CSW_PROTC;
return;
}
/* Reduce length if less than one page remaining */
if (idalen > idacount) idalen = idacount;
/* Set the main storage reference and change bits */
STORAGE_KEY(idadata) |=
(readcmd ? (STORKEY_REF|STORKEY_CHANGE) : STORKEY_REF);
/* Copy data between main storage and channel buffer */
if (readcmd)
memcpy (sysblk.mainstor + idadata, iobuf, idalen);
else
memcpy (iobuf, sysblk.mainstor + idadata, idalen);
/* Display the IDAW if CCW tracing is on */
if (dev->ccwtrace || dev->ccwstep)
{
format_iobuf_data (idadata, area);
if (idawfmt == 1) /*@IWZ*/
{ /*@IWZ*/
logmsg ( /*@IWZ*/
"%4.4X:IDAW=%8.8X Len=%3.3hX%s\n", /*@IWZ*/
dev->devnum, (U32)idadata, idalen, /*@IWZ*/
area); /*@IWZ*/
} else { /*@IWZ*/
logmsg ( /*@IWZ*/
"%4.4X:IDAW=%16.16llX Len=%4.4hX\n" /*@IWZ*/
"%4.4X:---------------------%s\n", /*@IWZ*/
dev->devnum, (U64)idadata, idalen, /*@IWZ*/
dev->devnum, area); /*@IWZ*/
}
}
/* Decrement remaining count, increment buffer pointer */
idacount -= idalen;
iobuf += idalen;
/* Increment to next IDAW address */
idawaddr += (idawfmt == 1) ? 4 : 8;
} /* end for(idaseq) */
} else { /* Non-IDA data addressing */
/* Channel program check if data is outside main storage */
if ( CHADDRCHK(addr, dev) || CHADDRCHK(addr + (count - 1), dev) )
{
*chanstat = CSW_PROGC;
return;
}
/* Channel protection check if any data is fetch protected,
or if location is store protected and command is READ,
READ BACKWARD, or SENSE */
startpage = addr;
endpage = addr + (count - 1);
for (page = startpage & STORAGE_KEY_PAGEMASK;
page <= (endpage | STORAGE_KEY_BYTEMASK);
page += STORAGE_KEY_PAGESIZE)
{
storkey = STORAGE_KEY(page);
if (ccwkey != 0 && (storkey & STORKEY_KEY) != ccwkey
&& ((storkey & STORKEY_FETCH) || readcmd))
{
*chanstat = CSW_PROTC;
return;
}
} /* end for(page) */
/* Set the main storage reference and change bits */
for (page = startpage & STORAGE_KEY_PAGEMASK;
page <= (endpage | STORAGE_KEY_BYTEMASK);
page += STORAGE_KEY_PAGESIZE)
{
STORAGE_KEY(page) |=
(readcmd ? (STORKEY_REF|STORKEY_CHANGE) : STORKEY_REF);
} /* end for(page) */
/* Copy data between main storage and channel buffer */
if (readcmd)
memcpy (sysblk.mainstor + addr, iobuf, count);
else
memcpy (iobuf, sysblk.mainstor + addr, count);
} /* end if(!IDA) */
} /* end function copy_iobuf */
/*-------------------------------------------------------------------*/
/* DEVICE ATTENTION */
/* Raises an unsolicited interrupt condition for a specified device. */
/* Return value is 0 if successful, 1 if device is busy or pending */
/* or 3 if subchannel is not valid or not enabled */
/*-------------------------------------------------------------------*/
int ARCH_DEP(device_attention) (DEVBLK *dev, BYTE unitstat)
{
/* Obtain the device lock */
obtain_lock (&dev->lock);
#ifdef FEATURE_CHANNEL_SUBSYSTEM
/* If subchannel not valid and enabled, do not present interrupt */
if ((dev->pmcw.flag5 & PMCW5_V) == 0
|| (dev->pmcw.flag5 & PMCW5_E) == 0)
{
release_lock (&dev->lock);
return 3;
}
#endif /*FEATURE_CHANNEL_SUBSYSTEM*/
/* If device is already busy or interrupt pending */
if (dev->busy || dev->pending
|| (dev->scsw.flag3 & SCSW3_SC_PEND))
{
/* Resume the suspended device with attention set */
if(dev->scsw.flag3 & SCSW3_AC_SUSP)
{
dev->scsw.flag3 |= SCSW3_SC_ALERT | SCSW3_SC_PEND;
dev->scsw.unitstat |= unitstat;
dev->scsw.flag2 |= SCSW2_AC_RESUM;
signal_condition(&dev->resumecond);
release_lock (&dev->lock);
if (dev->ccwtrace || dev->ccwstep)
logmsg ("DEV%4.4X: attention signalled \n", dev->devnum);
return 0;
}
release_lock (&dev->lock);
return 1;
}
if (dev->ccwtrace || dev->ccwstep)
logmsg ("DEV%4.4X: attention\n", dev->devnum);
#ifdef FEATURE_S370_CHANNEL
/* Set CSW for attention interrupt */
dev->csw[0] = 0;
dev->csw[1] = 0;
dev->csw[2] = 0;
dev->csw[3] = 0;
dev->csw[4] = unitstat;
dev->csw[5] = 0;
dev->csw[6] = 0;
dev->csw[7] = 0;
#endif /*FEATURE_S370_CHANNEL*/
#ifdef FEATURE_CHANNEL_SUBSYSTEM
/* Set SCSW for attention interrupt */
dev->scsw.flag0 = 0;
dev->scsw.flag1 = 0;
dev->scsw.flag2 = 0;
dev->scsw.flag3 = SCSW3_SC_ALERT | SCSW3_SC_PEND;
dev->scsw.ccwaddr[0] = 0;
dev->scsw.ccwaddr[1] = 0;
dev->scsw.ccwaddr[2] = 0;
dev->scsw.ccwaddr[3] = 0;
dev->scsw.unitstat = unitstat;
dev->scsw.chanstat = 0;
dev->scsw.count[0] = 0;
dev->scsw.count[1] = 0;
#endif /*FEATURE_CHANNEL_SUBSYSTEM*/
/* Set the interrupt pending flag for this device */
dev->pending = 1;
/* Release the device lock */
release_lock (&dev->lock);
/* Signal waiting CPUs that an interrupt is pending */
obtain_lock (&sysblk.intlock);
QUEUE_IO_INTERRUPT (dev);
ON_IC_IOPENDING;
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
release_lock (&sysblk.intlock);
return 0;
} /* end function device_attention */
/*-------------------------------------------------------------------*/
/* START A CHANNEL PROGRAM */
/* This function is called by the SIO and SSCH instructions */
/*-------------------------------------------------------------------*/
/* Input */
/* dev -> Device control block */
/* orb -> Operation request block @IWZ*/
/* Output */
/* The I/O parameters are stored in the device block, and a */
/* thread is created to execute the CCW chain asynchronously. */
/* The return value is the condition code for the SIO or */
/* SSCH instruction. */
/* Note */
/* For S/370 SIO, only the protect key and CCW address are */
/* valid, all other ORB parameters are set to zero. */
/*-------------------------------------------------------------------*/
int ARCH_DEP(startio) (DEVBLK *dev, ORB *orb) /*@IWZ*/
{
#if !defined(OPTION_FISHIO)
DEVBLK *previoq, *ioq; /* Device I/O queue pointers */
int rc; /* Return code */
#endif // !defined(OPTION_FISHIO)
/* Obtain the device lock */
obtain_lock (&dev->lock);
#ifdef FEATURE_CHANNEL_SUBSYSTEM
/* Return condition code 1 if status pending */
if ((dev->scsw.flag3 & SCSW3_SC_PEND)
|| (dev->pciscsw.flag3 & SCSW3_SC_PEND))
{
release_lock (&dev->lock);
return 1;
}
#endif /*FEATURE_CHANNEL_SUBSYSTEM*/
/* Return condition code 2 if device is busy */
if (dev->busy || dev->pending)
{
release_lock (&dev->lock);
return 2;
}
/* Set the device busy indicator */
dev->busy = 1;
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
/* Store the start I/O parameters in the device block */
memcpy (&dev->orb, orb, sizeof(ORB)); /*@IWZ*/
/* Initialize the subchannel status word */
memset (&dev->scsw, 0, sizeof(SCSW));
memset (&dev->pciscsw, 0, sizeof(SCSW));
dev->scsw.flag0 = (orb->flag4 & SCSW0_KEY); /*@IWZ*/
if (orb->flag4 & ORB4_S) dev->scsw.flag0 |= SCSW0_S; /*@IWZ*/
if (orb->flag5 & ORB5_F) dev->scsw.flag1 |= SCSW1_F; /*@IWZ*/
if (orb->flag5 & ORB5_P) dev->scsw.flag1 |= SCSW1_P; /*@IWZ*/
if (orb->flag5 & ORB5_I) dev->scsw.flag1 |= SCSW1_I; /*@IWZ*/
if (orb->flag5 & ORB5_A) dev->scsw.flag1 |= SCSW1_A; /*@IWZ*/
if (orb->flag5 & ORB5_U) dev->scsw.flag1 |= SCSW1_U; /*@IWZ*/
/* Make the subchannel start-pending */
dev->scsw.flag2 = SCSW2_FC_START | SCSW2_AC_START;
/* Copy the I/O parameter to the path management control word */
memcpy (dev->pmcw.intparm, orb->intparm, /*@IWZ*/
sizeof(dev->pmcw.intparm)); /*@IWZ*/
/* Schedule the I/O. The various methods are a direct
* correlation to the interest in the subject:
* [1] Synchronous I/O. Attempts to complete the channel program
* in the cpu thread to avoid any threads overhead.
* [2] FishIO. Use native win32 APIs to coordinate I/O
* thread scheduling.
* [3] Device threads. Queue the I/O and signal a device thread.
* Eliminates the overhead of thead creation/termination.
* [4] Original. Create a thread to execute this I/O
*/
#ifdef OPTION_SYNCIO
if (dev->syncio)
{
/* Attempt synchronous I/O */
dev->syncio_active = 1;
release_lock (&dev->lock);
switch (sysblk.arch_mode)
{
case ARCH_370: s370_execute_ccw_chain (dev); break;
case ARCH_900: z900_execute_ccw_chain (dev); break;
default:
case ARCH_390: s390_execute_ccw_chain (dev); break;
}
/* Return code 0 if the retry bit is not on */
if (!dev->syncio_retry)
return 0;
obtain_lock (&dev->lock);
}
#endif /*OPTION_SYNCIO*/
#if defined(OPTION_FISHIO)
release_lock (&dev->lock);
return ScheduleIORequest(dev,dev->devnum);
#else // !defined(OPTION_FISHIO)
if (sysblk.devtmax >= 0)
{
/* Queue the I/O request */
obtain_lock (&sysblk.ioqlock);
/* Insert the device into the I/O queue */
for (previoq = NULL, ioq = sysblk.ioq; ioq; ioq = ioq->nextioq)
{
if (dev->priority > ioq->priority) break;
previoq = ioq;
}
dev->nextioq = ioq;
if (previoq) previoq->nextioq = dev;
else sysblk.ioq = dev;
// dev->nextioq = sysblk.ioq;
// sysblk.ioq = dev;
/* Signal a device thread if one is waiting, otherwise create
a device thread if the maximum number hasn't been created */
if (sysblk.devtwait)
signal_condition(&sysblk.ioqcond);
else if (sysblk.devtmax == 0 || sysblk.devtnbr < sysblk.devtmax)
{
rc = create_device_thread(&dev->tid,&sysblk.detattr,device_thread,NULL);
if (rc != 0 && sysblk.devtnbr == 0)
{
logmsg ("HHC760I %4.4X create_thread error: %s",
dev->devnum, strerror(errno));
release_lock (&sysblk.ioqlock);
release_lock (&dev->lock);
return 2;
}
}
else
sysblk.devtunavail++;
release_lock (&sysblk.ioqlock);
}
else
{
/* Execute the CCW chain on a separate thread */
if ( create_device_thread (&dev->tid, &sysblk.detattr,
ARCH_DEP(execute_ccw_chain), dev) )
{
logmsg ("HHC760I %4.4X create_thread error: %s",
dev->devnum, strerror(errno));
release_lock (&dev->lock);
return 2;
}
}
release_lock (&dev->lock);
/* Return with condition code zero */
return 0;
#endif // defined(OPTION_FISHIO)
} /* end function startio */
/*-------------------------------------------------------------------*/
/* EXECUTE A CHANNEL PROGRAM */
/*-------------------------------------------------------------------*/
void *ARCH_DEP(execute_ccw_chain) (DEVBLK *dev)
{
U32 ccwaddr; /* Address of CCW @IWZ*/
U16 idapmask; /* IDA page size - 1 @IWZ*/
BYTE idawfmt; /* IDAW format (1 or 2) @IWZ*/
BYTE ccwfmt; /* CCW format (0 or 1) @IWZ*/
BYTE ccwkey; /* Bits 0-3=key, 4-7=zero@IWZ*/
BYTE opcode; /* CCW operation code */
BYTE flags; /* CCW flags */
U32 addr; /* CCW data address */
#ifdef FEATURE_CHANNEL_SUBSYSTEM
U32 mbaddr; /* Measure block address */
MBK *mbk; /* Measure block */
U16 mbcount; /* Measure block count */
#endif /*FEATURE_CHANNEL_SUBSYSTEM*/
U16 count; /* CCW byte count */
BYTE *ccw; /* CCW pointer */
BYTE unitstat; /* Unit status */
BYTE chanstat; /* Channel status */
U16 residual; /* Residual byte count */
BYTE more; /* 1=Count exhausted */
BYTE tic = 0; /* Previous CCW was a TIC */
BYTE chain = 1; /* 1=Chain to next CCW */
BYTE chained = 0; /* Command chain and data chain
bits from previous CCW */
BYTE prev_chained = 0; /* Chaining flags from CCW
preceding the data chain */
BYTE code = 0; /* Current CCW opcode */
BYTE prevcode = 0; /* Previous CCW opcode */
BYTE tracethis = 0; /* 1=Trace this CCW only */
BYTE area[64]; /* Message area */
DEVXF *devexec; /* -> Execute CCW function */
int ccwseq = 0; /* CCW sequence number */
int bufpos = 0; /* Position in I/O buffer */
BYTE iobuf[65536]; /* Channel I/O buffer */
#ifdef OPTION_SYNCIO
int retry = 0; /* 1=I/O asynchronous retry */
#endif
/* Extract the I/O parameters from the ORB */ /*@IWZ*/
FETCH_FW(ccwaddr, dev->orb.ccwaddr); /*@IWZ*/
ccwfmt = (dev->orb.flag5 & ORB5_F) ? 1 : 0; /*@IWZ*/
ccwkey = dev->orb.flag4 & ORB4_KEY; /*@IWZ*/
idawfmt = (dev->orb.flag5 & ORB5_H) ? 2 : 1; /*@IWZ*/
/* Determine IDA page size */ /*@IWZ*/
if (idawfmt == 2) /*@IWZ*/
{ /*@IWZ*/
/* Page size is 2K or 4K depending on flag bit */ /*@IWZ*/
idapmask = /*@IWZ*/
(dev->orb.flag5 & ORB5_T) ? 0x7FF : 0xFFF; /*@IWZ*/
} else { /*@IWZ*/
/* Page size is always 2K for format-1 IDAW */ /*@IWZ*/
idapmask = 0x7FF; /*@IWZ*/
} /*@IWZ*/
/* Point to the device handler for this device */
devexec = dev->devexec;
/* Turn off the start pending bit in the SCSW */
dev->scsw.flag2 &= ~SCSW2_AC_START;
/* Set the subchannel active and device active bits in the SCSW */
dev->scsw.flag3 |= (SCSW3_AC_SCHAC | SCSW3_AC_DEVAC);
#ifdef OPTION_SYNCIO
/* Check for retried synchronous I/O */
if (dev->syncio_retry)
{
dev->syncio_active = 0;
dev->syncios--; dev->asyncios++;
ccwaddr = dev->syncio_addr;
DEVTRACE ("asynchronous I/O ccw addr %8.8x\n", ccwaddr);
}
/* Check for synchronous I/O */
if (dev->syncio_active)
{
dev->syncios++;
DEVTRACE ("synchronous I/O ccw addr %8.8x\n", ccwaddr);
}
#endif
#ifdef FEATURE_CHANNEL_SUBSYSTEM
/* Update the measurement block if applicable */
if (sysblk.mbm && (dev->pmcw.flag5 & PMCW5_MM_MBU))
{
mbaddr = sysblk.mbo;
mbaddr += (dev->pmcw.mbi[0] << 8 | dev->pmcw.mbi[1]) << 5;
if ( !CHADDRCHK(mbaddr, dev)
&& (((STORAGE_KEY(mbaddr) & STORKEY_KEY) == sysblk.mbk)
|| (sysblk.mbk == 0)))
{
STORAGE_KEY(mbaddr) |= (STORKEY_REF | STORKEY_CHANGE);
mbk = (MBK*)&sysblk.mainstor[mbaddr];
FETCH_HW(mbcount,mbk->srcount);
mbcount++;
STORE_HW(mbk->srcount,mbcount);
} else {
/* Generate subchannel logout indicating program
check or protection check, and set the subchannel
measurement-block-update-enable to zero */
dev->pmcw.flag5 &= ~PMCW5_MM_MBU;
dev->esw.scl0 |= !CHADDRCHK(mbaddr, dev) ?
SCL0_ESF_MBPTK : SCL0_ESF_MBPGK;
/*INCOMPLETE*/
}
}
/* Generate an initial status I/O interruption if requested */
#ifdef OPTION_SYNCIO
if (dev->scsw.flag1 & SCSW1_I && !dev->syncio_retry)
#else
if (dev->scsw.flag1 & SCSW1_I)
#endif
{
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* Update the CCW address in the SCSW */
STORE_FW(dev->scsw.ccwaddr,ccwaddr);
/* Set the zero condition-code flag in the SCSW */
dev->scsw.flag1 |= SCSW1_Z;
/* Set intermediate status in the SCSW */
dev->scsw.flag3 = SCSW3_SC_INTER | SCSW3_SC_PEND;
/* Set interrupt pending flag */
dev->pending = 1;
/* Release the device lock */
release_lock (&dev->lock);
if (dev->ccwtrace || dev->ccwstep || tracethis)
logmsg ("channel: Device %4.4X initial status interrupt\n",
dev->devnum);
IODELAY();
/* Signal waiting CPUs that interrupt is pending */
obtain_lock (&sysblk.intlock);
QUEUE_IO_INTERRUPT (dev);
ON_IC_IOPENDING;
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
release_lock (&sysblk.intlock);
}
#endif /*FEATURE_CHANNEL_SUBSYSTEM*/
/* Execute the CCW chain */
while ( chain )
{
/* Test for attention status from device */
if (dev->scsw.flag3 & SCSW3_SC_ALERT)
{
/* Obtain the device lock */
obtain_lock (&dev->lock);
dev->pending = 1;
/* Reset device busy indicator */
dev->busy = 0;
/* Release the device lock */
release_lock (&dev->lock);
IODELAY();
/* Signal waiting CPUs that an interrupt may be pending */
obtain_lock (&sysblk.intlock);
QUEUE_IO_INTERRUPT (dev);
ON_IC_IOPENDING;
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
release_lock (&sysblk.intlock);
if (dev->ccwtrace || dev->ccwstep || tracethis)
logmsg ("channel: Device %4.4X attention completed\n",
dev->devnum);
return NULL;
} /* end attention processing */
/* Test for clear subchannel request */
if (dev->scsw.flag2 & SCSW2_AC_CLEAR)
{
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* [15.3.2] Perform clear function subchannel modification */
dev->pmcw.pom = 0xFF;
dev->pmcw.lpum = 0x00;
dev->pmcw.pnom = 0x00;
/* [15.3.3] Perform clear function signaling and completion */
dev->scsw.flag0 = 0;
dev->scsw.flag1 = 0;
dev->scsw.flag2 &= ~((SCSW2_FC - SCSW2_FC_CLEAR) | SCSW2_AC);
dev->scsw.flag3 &= ~(SCSW3_AC | SCSW3_SC);
dev->scsw.flag3 |= SCSW3_SC_PEND;
dev->scsw.ccwaddr[0] = 0;
dev->scsw.ccwaddr[1] = 0;
dev->scsw.ccwaddr[2] = 0;
dev->scsw.ccwaddr[3] = 0;
dev->scsw.chanstat = 0;
dev->scsw.unitstat = 0;
dev->scsw.count[0] = 0;
dev->scsw.count[1] = 0;
dev->pcipending = 0;
dev->pending = 1;
/* For 3270 device, clear any pending input */
if (dev->devtype == 0x3270)
{
dev->readpending = 0;
dev->rlen3270 = 0;
}
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
/* Reset device busy indicator */
dev->busy = 0;
/* Release the device lock */
release_lock (&dev->lock);
IODELAY();
/* Signal waiting CPUs that an interrupt may be pending */
obtain_lock (&sysblk.intlock);
QUEUE_IO_INTERRUPT (dev);
ON_IC_IOPENDING;
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
release_lock (&sysblk.intlock);
if (dev->ccwtrace || dev->ccwstep || tracethis)
logmsg ("channel: Device %4.4X clear completed\n",
dev->devnum);
return NULL;
} /* end perform clear subchannel */
/* Test for halt subchannel request */
if (dev->scsw.flag2 & SCSW2_AC_HALT)
{
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* [15.4.2] Perform halt function signaling and completion */
dev->scsw.flag2 &= ~SCSW2_AC_HALT;
dev->scsw.flag3 |= SCSW3_SC_PEND;
dev->scsw.unitstat |= CSW_CE | CSW_DE;
dev->pcipending = 0;
dev->pending = 1;
/* For 3270 device, clear any pending input */
if (dev->devtype == 0x3270)
{
dev->readpending = 0;
dev->rlen3270 = 0;
}
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
/* Reset device busy indicator */
dev->busy = 0;
/* Release the device lock */
release_lock (&dev->lock);
IODELAY();
/* Signal waiting CPUs that an interrupt may be pending */
obtain_lock (&sysblk.intlock);
QUEUE_IO_INTERRUPT (dev);
ON_IC_IOPENDING;
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
release_lock (&sysblk.intlock);
if (dev->ccwtrace || dev->ccwstep || tracethis)
logmsg ("channel: Device %4.4X halt completed\n",
dev->devnum);
return NULL;
} /* end perform halt subchannel */
/* Clear the channel status and unit status */
chanstat = 0;
unitstat = 0;
/* Fetch the next CCW */
ARCH_DEP(fetch_ccw) (dev, ccwkey, ccwfmt, ccwaddr, &opcode, &addr,
&flags, &count, &chanstat);
/* Point to the CCW in main storage */
ccw = sysblk.mainstor + ccwaddr;
/* Increment to next CCW address */
#ifdef OPTION_SYNCIO
dev->syncio_addr = ccwaddr;
#endif
ccwaddr += 8;
/* Update the CCW address in the SCSW */
STORE_FW(dev->scsw.ccwaddr,ccwaddr);
/* Exit if fetch_ccw detected channel program check */
if (chanstat != 0) break;
/* Display the CCW */
if (dev->ccwtrace || dev->ccwstep)
display_ccw (dev, ccw, addr);
/*----------------------------------------------*/
/* TRANSFER IN CHANNEL (TIC) command */
/*----------------------------------------------*/
if (IS_CCW_TIC(opcode))
{
/* Channel program check if TIC-to-TIC */
if (tic)
{
chanstat = CSW_PROGC;
break;
}
/* Channel program check if format-1 TIC reserved bits set*/
if (ccwfmt == 1
&& (opcode != 0x08 || flags != 0 || count != 0))
{
chanstat = CSW_PROGC;
break;
}
/* Set new CCW address (leaving the values of chained and
code untouched to allow data-chaining through TIC) */
tic = 1;
ccwaddr = addr;
chain = 1;
continue;
} /* end if TIC */
/*----------------------------------------------*/
/* Commands other than TRANSFER IN CHANNEL */
/*----------------------------------------------*/
/* Reset the TIC-to-TIC flag */
tic = 0;
/* Update current CCW opcode, unless data chaining */
if ((chained & CCW_FLAGS_CD) == 0)
{
prevcode = code;
code = opcode;
}
/* Channel program check if invalid flags */
if (flags & CCW_FLAGS_RESV)
{
chanstat = CSW_PROGC;
break;
}
#ifdef FEATURE_S370_CHANNEL
/* For S/370, channel program check if suspend flag is set */
if (flags & CCW_FLAGS_SUSP)
{
chanstat = CSW_PROGC;
break;
}
#endif /*FEATURE_S370_CHANNEL*/
#ifdef FEATURE_CHANNEL_SUBSYSTEM
/* Suspend channel program if suspend flag is set */
if (flags & CCW_FLAGS_SUSP)
{
///*debug*/ /* Trace the CCW if not already done */
///*debug*/ if (!(dev->ccwtrace || dev->ccwstep || tracethis))
///*debug*/ {
///*debug*/ display_ccw (dev, ccw, addr);
///*debug*/ tracethis = 1;
///*debug*/ }
/* Channel program check if the ORB suspend control bit
was zero, or if this is a data chained CCW */
if ((dev->scsw.flag0 & SCSW0_S) == 0
|| (chained & CCW_FLAGS_CD))
{
chanstat = CSW_PROGC;
break;
}
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* Suspend the device if not already resume pending */
if ((dev->scsw.flag2 & SCSW2_AC_RESUM) == 0)
{
#ifdef OPTION_SYNCIO
/* Retry if synchronous I/O */
if (dev->syncio_active)
{
dev->syncio_retry = 1;
release_lock (&dev->lock);
return NULL;
}
#endif
/* Set the subchannel status word to suspended */
dev->scsw.flag3 = SCSW3_AC_SUSP
| SCSW3_SC_INTER
| SCSW3_SC_PEND;
dev->scsw.unitstat = 0;
dev->scsw.chanstat = 0;
STORE_HW(dev->scsw.count,count);
/* Generate I/O interrupt unless the ORB specified
that suspend interrupts are to be suppressed */
if ((dev->scsw.flag1 & SCSW1_U) == 0)
{
/* Set interrupt pending flag */
dev->pending = 1;
/* Release the device lock */
release_lock (&dev->lock);
IODELAY();
/* Signal waiting CPUs that interrupt is pending */
obtain_lock (&sysblk.intlock);
QUEUE_IO_INTERRUPT (dev);
ON_IC_IOPENDING;
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
release_lock (&sysblk.intlock);
/* Re-obtain the device lock */
obtain_lock (&dev->lock);
}
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
/* Suspend the device until resume instruction */
if (dev->ccwtrace || dev->ccwstep || tracethis)
logmsg ("channel: Device %4.4X suspended\n",
dev->devnum);
while (dev->busy && (dev->scsw.flag2 & SCSW2_AC_RESUM) == 0)
wait_condition (&dev->resumecond, &dev->lock);
/* If the device has been reset then simply return */
if(!dev->busy)
{
release_lock (&dev->lock);
return NULL;
}
if (dev->ccwtrace || dev->ccwstep || tracethis)
logmsg ("channel: Device %4.4X resumed\n",
dev->devnum);
/* Reset the suspended status in the SCSW */
dev->scsw.flag3 &= ~SCSW3_AC_SUSP;
dev->scsw.flag3 |= (SCSW3_AC_SCHAC | SCSW3_AC_DEVAC);
}
/* Reset the resume pending flag */
dev->scsw.flag2 &= ~SCSW2_AC_RESUM;
/* Release the device lock */
release_lock (&dev->lock);
/* Reset fields as if starting a new channel program */
code = 0;
tic = 0;
chain = 1;
chained = 0;
prev_chained = 0;
prevcode = 0;
ccwseq = 0;
bufpos = 0;
#ifdef OPTION_SYNCIO
dev->syncio_retry = 0;
#endif
/* Go back and refetch the suspended CCW */
ccwaddr -= 8;
continue;
} /* end if(CCW_FLAGS_SUSP) */
#endif /*FEATURE_CHANNEL_SUBSYSTEM*/
/* Signal I/O interrupt if PCI flag is set */
#ifdef OPTION_SYNCIO
if (flags & CCW_FLAGS_PCI && !dev->syncio_retry)
#else
if (flags & CCW_FLAGS_PCI)
#endif
{
/* Obtain the device lock */
obtain_lock (&dev->lock);
/* Set PCI interrupt pending flag */
dev->pcipending = 1;
///*debug*/ /* Trace the CCW if not already done */
///*debug*/ if (!(dev->ccwtrace || dev->ccwstep || tracethis))
///*debug*/ {
///*debug*/ display_ccw (dev, ccw, addr);
///*debug*/ tracethis = 1;
///*debug*/ }
///*debug*/ logmsg ("%4.4X: PCI flag set\n", dev->devnum);
#ifdef FEATURE_S370_CHANNEL
/* Save the PCI CSW replacing any previous pending PCI */
dev->pcicsw[0] = ccwkey;
dev->pcicsw[1] = (ccwaddr & 0xFF0000) >> 16;
dev->pcicsw[2] = (ccwaddr & 0xFF00) >> 8;
dev->pcicsw[3] = ccwaddr & 0xFF;
dev->pcicsw[4] = 0;
dev->pcicsw[5] = CSW_PCI;
dev->pcicsw[6] = 0;
dev->pcicsw[7] = 0;
#endif /*FEATURE_S370_CHANNEL*/
#ifdef FEATURE_CHANNEL_SUBSYSTEM
dev->pciscsw.flag0 = ccwkey & SCSW0_KEY;
dev->pciscsw.flag1 = (ccwfmt == 1 ? SCSW1_F : 0);
dev->pciscsw.flag2 = SCSW2_FC_START;
dev->pciscsw.flag3 = SCSW3_AC_SCHAC | SCSW3_AC_DEVAC
| SCSW3_SC_INTER | SCSW3_SC_PEND;
STORE_FW(dev->pciscsw.ccwaddr,ccwaddr);
dev->pciscsw.unitstat = 0;
dev->pciscsw.chanstat = CSW_PCI;
dev->pciscsw.count[0] = 0;
dev->pciscsw.count[1] = 0;
#endif /*FEATURE_CHANNEL_SUBSYSTEM*/
/* Release the device lock */
release_lock (&dev->lock);
IODELAY();
/* Signal waiting CPUs that an interrupt is pending */
obtain_lock (&sysblk.intlock);
QUEUE_IO_INTERRUPT (dev);
ON_IC_IOPENDING;
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
release_lock (&sysblk.intlock);
} /* end if(CCW_FLAGS_PCI) */
/* Channel program check if invalid count */
if (count == 0 && (ccwfmt == 0 ||
(flags & CCW_FLAGS_CD) || (chained & CCW_FLAGS_CD)))
{
chanstat = CSW_PROGC;
break;
}
/* Check that I/O buffer exists */
if (iobuf == NULL)
{
chanstat = CSW_PROGC;
break;
}
#ifdef OPTION_SYNCIO
/* Temporary workaround for -
1) Track Overflow processing:
Synchronous READ (and probably WRITE) CCWs
cannot correctly process splitted records
if the continuation has to be scheduled for
asynchronous processing;
2) DataChained WRITE CCWs:
Data merging function used by [C]CKD dev's
for data chained write CCW's leads to error
when the 1st WRITE CCW which specifies DC is
processed SYNChronously and any subsequent
WRITE CCW's (including the 1st one) must then
be switched to ASYNChronous processing - as a
result only last WRITE CCW in the chain is
retried although the whole chain starting from
the 1st CCW which specified DC must be retried.
- this [rough] fix just immediately request
asynchronous processing if one of the above
situations are encountered during synchronous I/O
(1:'ckdtrkof' flag is set and CCW specifies READ
or WRITE operation; or 2:WRITE CCW with "DataChain"
flag set is processed)
*/
if( dev->syncio_active &&
( (dev->ckdtrkof
&& (IS_CCW_READ(code) || IS_CCW_WRITE(code)))
|| ((flags & CCW_FLAGS_CD)
&& (IS_CCW_WRITE(code)
|| (IS_CCW_CONTROL(code)
&& !(IS_CCW_NOP(code)||IS_CCW_SET_EXTENDED(code))))
)
)
)
{
dev->syncio_retry = 1;
/*debug display_ccw(dev, ccw, addr);*/
return NULL;
}
#endif
/* For WRITE and CONTROL operations, copy data
from main storage into channel buffer */
if (IS_CCW_WRITE(code)
||
(
IS_CCW_CONTROL(code)
&&
!(IS_CCW_NOP(code) || IS_CCW_SET_EXTENDED(code))
))
{
/* Channel program check if data exceeds buffer size */
if (bufpos + count > 65536)
{
chanstat = CSW_PROGC;
break;
}
/* Copy data into channel buffer */
ARCH_DEP(copy_iobuf) (dev, code, flags, addr, count,
ccwkey, idawfmt, idapmask, /*@IWZ*/
iobuf + bufpos, &chanstat);
if (chanstat != 0) break;
/* Update number of bytes in channel buffer */
bufpos += count;
/* If device handler has requested merging of data
chained write CCWs, then collect data from all CCWs
in chain before passing buffer to device handler */
if (dev->cdwmerge)
{
if (flags & CCW_FLAGS_CD)
{
/* If this is the first CCW in the data chain, then
save the chaining flags from the previous CCW */
if ((chained & CCW_FLAGS_CD) == 0)
prev_chained = chained;
/* Process next CCW in data chain */
chained = CCW_FLAGS_CD;
chain = 1;
continue;
}
/* If this is the last CCW in the data chain, then
restore the chaining flags from the previous CCW */
if (chained & CCW_FLAGS_CD)
chained = prev_chained;
} /* end if(dev->cdwmerge) */
/* Reset the total count at end of data chain */
count = bufpos;
bufpos = 0;
}
/* Set chaining flag */
chain = ( flags & (CCW_FLAGS_CD | CCW_FLAGS_CC) ) ? 1 : 0;
/* Initialize residual byte count */
residual = count;
more = 0;
/* Channel program check if invalid CCW opcode */
if (!(IS_CCW_WRITE(code) || IS_CCW_READ(code)
|| IS_CCW_CONTROL(code) || IS_CCW_SENSE(code)
|| IS_CCW_RDBACK(code)))
{
chanstat = CSW_PROGC;
break;
}
/* Pass the CCW to the device handler for execution */
#ifdef OPTION_SYNCIO
retry = dev->syncio_retry;
#endif
(*devexec) (dev, code, flags, chained, count, prevcode,
ccwseq, iobuf, &more, &unitstat, &residual);
#ifdef OPTION_SYNCIO
if (retry) dev->syncio_retry = 0;
/* Check if synchronous I/O needs to be retried */
if (dev->syncio_retry)
{
return NULL;
}
retry = 0;
#endif
/* Check for Command Retry (suggested by Jim Pierson) */
if ( unitstat == ( CSW_CE | CSW_DE | CSW_UC | CSW_SM ) )
{
chain = 1;
ccwaddr -= 8; /* (retry same ccw again) */
continue;
}
/* For READ, SENSE, and READ BACKWARD operations, copy data
from channel buffer to main storage, unless SKIP is set */
if ((flags & CCW_FLAGS_SKIP) == 0
&& (IS_CCW_READ(code)
|| IS_CCW_SENSE(code)
|| IS_CCW_RDBACK(code)))
{
ARCH_DEP(copy_iobuf) (dev, code, flags,
addr, count - residual,
ccwkey, idawfmt, idapmask, /*@IWZ*/
iobuf, &chanstat);
}
/* Check for incorrect length */
if (residual != 0
|| (more && ((flags & CCW_FLAGS_CD) == 0)))
{
/* Set incorrect length status if data chaining or
or if suppress length indication flag is off
for non-NOP CCWs */
if (((flags & CCW_FLAGS_CD)
|| (flags & CCW_FLAGS_SLI) == 0)
&& (code != 0x03)
#if defined(FEATURE_INCORRECT_LENGTH_INDICATION_SUPPRESSION)
/* Suppress incorrect length indication if
CCW format is one and SLI mode is indicated
in the ORB */
&& !((dev->orb.flag5 & ORB5_F)
&& (dev->orb.flag5 & ORB5_U))
#endif /*defined(FEATURE_INCORRECT_LENGTH_INDICATION_SUPPRESSION)*/
)
chanstat |= CSW_IL;
}
/* Force tracing for this CCW if any unusual status occurred */
if ((chanstat & (CSW_PROGC | CSW_PROTC | CSW_CDC | CSW_CCC
| CSW_ICC | CSW_CHC))
|| ((unitstat & CSW_UC) && dev->sense[0] != 0))
{
/* Trace the CCW if not already done */
if (!(dev->ccwtrace || dev->ccwstep || tracethis))
display_ccw (dev, ccw, addr);
/* Activate tracing for this CCW chain only */
tracethis = 1;
}
/* Trace the results of CCW execution */
if (dev->ccwtrace || dev->ccwstep || tracethis)
{
/* Format data for READ or SENSE commands only */
if (IS_CCW_READ(code) || IS_CCW_SENSE(code))
format_iobuf_data (addr, area);
else
area[0] = '\0';
/* Display status and residual byte count */
logmsg ("%4.4X:Stat=%2.2X%2.2X Count=%4.4X %s\n",
dev->devnum, unitstat, chanstat, residual, area);
/* Display sense bytes if unit check is indicated */
if (unitstat & CSW_UC)
{
logmsg ("%4.4X:Sense=%2.2X%2.2X%2.2X%2.2X "
"%2.2X%2.2X%2.2X%2.2X %2.2X%2.2X%2.2X%2.2X "
"%2.2X%2.2X%2.2X%2.2X %2.2X%2.2X%2.2X%2.2X "
"%2.2X%2.2X%2.2X%2.2X\n",
dev->devnum, dev->sense[0], dev->sense[1],
dev->sense[2], dev->sense[3], dev->sense[4],
dev->sense[5], dev->sense[6], dev->sense[7],
dev->sense[8], dev->sense[9], dev->sense[10],
dev->sense[11], dev->sense[12], dev->sense[13],
dev->sense[14], dev->sense[15], dev->sense[16],
dev->sense[17], dev->sense[18], dev->sense[19],
dev->sense[20], dev->sense[21], dev->sense[22],
dev->sense[23]);
if (dev->sense[0] != 0 || dev->sense[1] != 0)
{
logmsg ("%4.4X:Sense=%s%s%s%s%s%s%s%s"
"%s%s%s%s%s%s%s%s\n",
dev->devnum,
(dev->sense[0] & SENSE_CR) ? "CMDREJ " : "",
(dev->sense[0] & SENSE_IR) ? "INTREQ " : "",
(dev->sense[0] & SENSE_BOC) ? "BOC " : "",
(dev->sense[0] & SENSE_EC) ? "EQC " : "",
(dev->sense[0] & SENSE_DC) ? "DCK " : "",
(dev->sense[0] & SENSE_OR) ? "OVR " : "",
(dev->sense[0] & SENSE_CC) ? "CCK " : "",
(dev->sense[0] & SENSE_OC) ? "OCK " : "",
(dev->sense[1] & SENSE1_PER) ? "PER " : "",
(dev->sense[1] & SENSE1_ITF) ? "ITF " : "",
(dev->sense[1] & SENSE1_EOC) ? "EOC " : "",
(dev->sense[1] & SENSE1_MTO) ? "MSG " : "",
(dev->sense[1] & SENSE1_NRF) ? "NRF " : "",
(dev->sense[1] & SENSE1_FP) ? "FP " : "",
(dev->sense[1] & SENSE1_WRI) ? "WRI " : "",
(dev->sense[1] & SENSE1_IE) ? "IE " : "");
}
}
}
/* Increment CCW address if device returned status modifier */
if (unitstat & CSW_SM)
ccwaddr += 8;
/* Terminate the channel program if any unusual status */
if (chanstat != 0
|| (unitstat & ~CSW_SM) != (CSW_CE | CSW_DE))
chain = 0;
/* Update the chaining flags */
chained = flags & (CCW_FLAGS_CD | CCW_FLAGS_CC);
/* Update the CCW sequence number unless data chained */
if ((flags & CCW_FLAGS_CD) == 0)
ccwseq++;
} /* end while(chain) */
/* Obtain the device lock */
obtain_lock (&dev->lock);
#ifdef FEATURE_S370_CHANNEL
/* Build the channel status word */
dev->csw[0] = ccwkey & 0xF0;
dev->csw[1] = (ccwaddr & 0xFF0000) >> 16;
dev->csw[2] = (ccwaddr & 0xFF00) >> 8;
dev->csw[3] = ccwaddr & 0xFF;
dev->csw[4] = unitstat;
dev->csw[5] = chanstat;
dev->csw[6] = (residual & 0xFF00) >> 8;
dev->csw[7] = residual & 0xFF;
#endif /*FEATURE_S370_CHANNEL*/
#ifdef FEATURE_CHANNEL_SUBSYSTEM
/* Complete the subchannel status word */
dev->scsw.flag3 &= ~(SCSW3_AC_SCHAC | SCSW3_AC_DEVAC);
dev->scsw.flag3 |= (SCSW3_SC_PRI | SCSW3_SC_SEC | SCSW3_SC_PEND);
STORE_FW(dev->scsw.ccwaddr,ccwaddr);
dev->scsw.unitstat = unitstat;
dev->scsw.chanstat = chanstat;
STORE_HW(dev->scsw.count,residual);
/* Set alert status if terminated by any unusual condition */
if (chanstat != 0 || unitstat != (CSW_CE | CSW_DE))
dev->scsw.flag3 |= SCSW3_SC_ALERT;
/* Build the format-1 extended status word */
memset (&dev->esw, 0, sizeof(ESW));
dev->esw.lpum = 0x80;
/* Clear the extended control word */
memset (dev->ecw, 0, sizeof(dev->ecw));
/* Return sense information if PMCW allows concurrent sense */
if ((unitstat & CSW_UC) && (dev->pmcw.flag27 & PMCW27_S))
{
dev->scsw.flag1 |= SCSW1_E;
dev->esw.erw0 |= ERW0_S;
dev->esw.erw1 = (dev->numsense < sizeof(dev->ecw)) ?
dev->numsense : sizeof(dev->ecw);
memcpy (dev->ecw, dev->sense, dev->esw.erw1 & ERW1_SCNT);
memset (dev->sense, 0, sizeof(dev->sense));
}
#endif /*FEATURE_CHANNEL_SUBSYSTEM*/
/* Set the interrupt pending flag for this device */
dev->busy = 0;
dev->pending = 1;
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
/* Release the device lock */
release_lock (&dev->lock);
IODELAY();
/* Signal waiting CPUs that an interrupt is pending */
obtain_lock (&sysblk.intlock);
QUEUE_IO_INTERRUPT (dev);
ON_IC_IOPENDING;
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
release_lock (&sysblk.intlock);
return NULL;
} /* end function execute_ccw_chain */
/*-------------------------------------------------------------------*/
/* TEST WHETHER INTERRUPTS ARE ENABLED FOR THE SPECIFIED DEVICE */
/* When configured for S/370 channels, the PSW system mask and/or */
/* the channel masks in control register 2 determine whether the */
/* device is enabled. When configured for the XA or ESA channel */
/* subsystem, the interrupt subclass masks in control register 6 */
/* determine eligability; the PSW system mask is not tested, because */
/* the TPI instruction can operate with I/O interrupts masked off. */
/* Returns non-zero if interrupts enabled, 0 if interrupts disabled. */
/*-------------------------------------------------------------------*/
static int ARCH_DEP(interrupt_enabled) (REGS *regs, DEVBLK *dev)
{
int i; /* Interruption subclass */
#ifdef FEATURE_S370_CHANNEL
/* Isolate the channel number */
i = dev->devnum >> 8;
if (regs->psw.ecmode == 0 && i < 6)
{
/* For BC mode channels 0-5, test system mask bits 0-5 */
if ((regs->psw.sysmask & (0x80 >> i)) == 0)
return 0;
}
else
{
/* For EC mode and channels 6-31, test system mask bit 6 */
if ((regs->psw.sysmask & PSW_IOMASK) == 0)
return 0;
/* If I/O mask is enabled, test channel masks in CR2 */
if (i > 31) i = 31;
if ((regs->CR(2) & (0x80000000 >> i)) == 0)
return 0;
}
#endif /*FEATURE_S370_CHANNEL*/
#ifdef FEATURE_CHANNEL_SUBSYSTEM
/* Ignore this device if subchannel not valid and enabled */
if ((dev->pmcw.flag5 & (PMCW5_E | PMCW5_V)) != (PMCW5_E | PMCW5_V))
return 0;
/* Isolate the interruption subclass */
i = (dev->pmcw.flag4 & PMCW4_ISC) >> 3;
/* Test interruption subclass mask bit in CR6 */
if ((regs->CR_L(6) & (0x80000000 >> i)) == 0)
return 0;
#endif /*FEATURE_CHANNEL_SUBSYSTEM*/
/* Interrupts are enabled for this device */
return 1;
} /* end function interrupt_enabled */
/*-------------------------------------------------------------------*/
/* PRESENT PENDING I/O INTERRUPT */
/* Finds a device with a pending condition for which an interrupt */
/* is allowed by the CPU whose regs structure is passed as a */
/* parameter. Clears the interrupt condition and returns the */
/* I/O address and I/O interruption parameter (for channel subsystem)*/
/* or the I/O address and CSW (for S/370 channels). */
/* This routine does not perform a PSW switch. */
/* The return value is the condition code for the TPI instruction: */
/* 0 if no allowable pending interrupt exists, otherwise 1. */
/* Note: The caller MUST hold the interrupt lock (sysblk.intlock). */
/*-------------------------------------------------------------------*/
int ARCH_DEP(present_io_interrupt) (REGS *regs, U32 *ioid,
U32 *ioparm, U32 *iointid, BYTE *csw)
{
DEVBLK *dev; /* -> Device control block */
int iopending = 0; /* 1 = I/O still pending */
/* Find a device with pending interrupt */
#ifdef OPTION_IOINTQ
for (dev = sysblk.iointq; dev != NULL; dev = dev->iointq)
#else /*!OPTION_IOINTQ*/
for (dev = sysblk.firstdev; dev != NULL; dev = dev->nextdev)
#endif /*!OPTION_IOINTQ*/
{
obtain_lock (&dev->lock);
if ((dev->pending || dev->pcipending)
&& (dev->pmcw.flag5 & PMCW5_V))
{
/* Exit loop if enabled for interrupts from this device */
if (ARCH_DEP(interrupt_enabled)(regs, dev))
break;
iopending = 1;
#if MAX_CPU_ENGINES > 1
/* See if another CPU can take this interrupt */
WAKEUP_WAITING_CPU (ALL_CPUS, CPUSTATE_STARTED);
#endif /*MAX_CPU_ENGINES > 1*/
}
release_lock (&dev->lock);
} /* end for(dev) */
/* If no enabled interrupt pending, exit with condition code 0 */
if (dev == NULL)
{
if (!iopending)
OFF_IC_IOPENDING;
return 0;
}
/* Remove the device from the I/O interrupt queue
unless both `pcipending' and `pending' are set */
if (!(dev->pcipending == 1 && dev->pending == 1))
DEQUEUE_IO_INTERRUPT (dev);
#ifdef OPTION_IOINTQ
/* Turn off IOPENDING bit if no outstanding I/O interrupts */
if (sysblk.iointq == NULL)
OFF_IC_IOPENDING;
#endif
#ifdef FEATURE_S370_CHANNEL
/* Extract the I/O address and CSW */
*ioid = dev->devnum;
memcpy (csw, dev->pcipending ? dev->pcicsw : dev->csw, 8);
/* Display the channel status word */
if (dev->ccwtrace || dev->ccwstep)
display_csw (dev, csw);
#endif /*FEATURE_S370_CHANNEL*/
#ifdef FEATURE_CHANNEL_SUBSYSTEM
/* Extract the I/O address and interrupt parameter */
*ioid = 0x00010000 | dev->subchan;
FETCH_FW(*ioparm,dev->pmcw.intparm);
#if defined(FEATURE_ESAME)
*iointid = (dev->pmcw.flag4 & PMCW4_ISC) << 24;
#endif /*defined(FEATURE_ESAME)*/
#endif /*FEATURE_CHANNEL_SUBSYSTEM*/
/* Reset the interrupt pending flag for the device */
if (dev->pcipending)
{
dev->pcipending = 0;
}
else
{
dev->pending = 0;
}
/* Signal console thread to redrive select */
if (dev->console)
{
signal_thread (sysblk.cnsltid, SIGUSR2);
}
/* Release the device lock */
release_lock (&dev->lock);
/* Exit with condition code indicating interrupt cleared */
return 1;
} /* end function present_io_interrupt */
#if !defined(_GEN_ARCH)
#define _GEN_ARCH 390
#include "channel.c"
#undef _GEN_ARCH
#define _GEN_ARCH 370
#include "channel.c"
int device_attention (DEVBLK *dev, BYTE unitstat)
{
switch(sysblk.arch_mode) {
case ARCH_370: return s370_device_attention(dev, unitstat);
case ARCH_390: return s390_device_attention(dev, unitstat);
case ARCH_900: return z900_device_attention(dev, unitstat);
}
return 3;
}
#if defined(OPTION_FISHIO)
void call_execute_ccw_chain(int arch_mode, void* pDevBlk)
{
switch (arch_mode)
{
case ARCH_370: s370_execute_ccw_chain((DEVBLK*)pDevBlk); break;
case ARCH_900: z900_execute_ccw_chain((DEVBLK*)pDevBlk); break;
default:
case ARCH_390: s390_execute_ccw_chain((DEVBLK*)pDevBlk); break;
}
}
#endif // defined(OPTION_FISHIO)
#endif /*!defined(_GEN_ARCH)*/
|