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/*
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/gen12lp/hw_cmds_base.h"
namespace NEO {
struct ADLP : public Gen12LpFamily {
static const PLATFORM platform;
static const HardwareInfo hwInfo;
static const uint64_t defaultHardwareInfoConfig;
static FeatureTable featureTable;
static WorkaroundTable workaroundTable;
static const uint32_t threadsPerEu = 7;
static const uint32_t maxEuPerSubslice = 16;
static const uint32_t maxSlicesSupported = 1;
static const uint32_t maxSubslicesSupported = 6;
static const uint32_t maxDualSubslicesSupported = 12;
static const RuntimeCapabilityTable capabilityTable;
static void (*setupHardwareInfo)(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig);
static void setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo);
static void setupHardwareInfoBase(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable);
struct PipelineSelectStateSupport {
static constexpr bool modeSelected = true;
static constexpr bool mediaSamplerDopClockGate = true;
static constexpr bool systolicMode = true;
};
};
class AdlpHwConfig : public ADLP {
public:
static void setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable);
static const HardwareInfo hwInfo;
private:
static GT_SYSTEM_INFO gtSystemInfo;
};
#include "hw_cmds_adlp.inl"
} // namespace NEO
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