1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
|
/*
* Copyright (C) 2018-2023 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
namespace NEO {
enum class MemoryPool {
memoryNull,
system4KBPages,
system64KBPages,
system4KBPagesWith32BitGpuAddressing,
system64KBPagesWith32BitGpuAddressing,
systemCpuInaccessible,
localMemory,
};
namespace MemoryPoolHelper {
template <typename... Args>
inline bool isSystemMemoryPool(Args... pool) {
return ((pool == MemoryPool::system4KBPages ||
pool == MemoryPool::system64KBPages ||
pool == MemoryPool::system4KBPagesWith32BitGpuAddressing ||
pool == MemoryPool::system64KBPagesWith32BitGpuAddressing) &&
...);
}
} // namespace MemoryPoolHelper
} // namespace NEO
|
