1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350
|
/*========================== begin_copyright_notice ============================
Copyright (C) 2017-2021 Intel Corporation
SPDX-License-Identifier: MIT
============================= end_copyright_notice ===========================*/
// Arithmetic Instructions
half SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v2f16_v2f16, )(half2 Vector1, half2 Vector2)
{
return SPIRV_OCL_BUILTIN(fma, _f16_f16_f16, )(Vector1.x, Vector2.x, (Vector1.y * Vector2.y));
}
half SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v3f16_v3f16, )(half3 Vector1, half3 Vector2)
{
return SPIRV_OCL_BUILTIN(fma, _f16_f16_f16, )(Vector1.x, Vector2.x,
SPIRV_OCL_BUILTIN(fma, _f16_f16_f16, )(Vector1.y, Vector2.y, (Vector1.z * Vector2.z)));
}
half SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v4f16_v4f16, )(half4 Vector1, half4 Vector2)
{
return SPIRV_OCL_BUILTIN(fma, _f16_f16_f16, )(Vector1.x, Vector2.x,
SPIRV_OCL_BUILTIN(fma, _f16_f16_f16, )(Vector1.y, Vector2.y,
SPIRV_OCL_BUILTIN(fma, _f16_f16_f16, )(Vector1.z, Vector2.z,
(Vector1.w * Vector2.w))));
}
// TODO: should we support beyond vec4 which is what OCL is limited to?
#if 0
half SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v8f16_v8f16, )(half8 Vector1, half8 Vector2)
{
}
half SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v16f16_v16f16, )(half16 Vector1, half16 Vector2)
{
}
#endif
float SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v2f32_v2f32, )(float2 Vector1, float2 Vector2)
{
return SPIRV_OCL_BUILTIN(fma, _f32_f32_f32, )(Vector1.x, Vector2.x, (Vector1.y * Vector2.y));
}
float SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v3f32_v3f32, )(float3 Vector1, float3 Vector2)
{
return SPIRV_OCL_BUILTIN(fma, _f32_f32_f32, )(Vector1.x, Vector2.x,
SPIRV_OCL_BUILTIN(fma, _f32_f32_f32, )(Vector1.y, Vector2.y, (Vector1.z * Vector2.z)));
}
float SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v4f32_v4f32, )(float4 Vector1, float4 Vector2)
{
return SPIRV_OCL_BUILTIN(fma, _f32_f32_f32, )(Vector1.x, Vector2.x,
SPIRV_OCL_BUILTIN(fma, _f32_f32_f32, )(Vector1.y, Vector2.y,
SPIRV_OCL_BUILTIN(fma, _f32_f32_f32, )(Vector1.z, Vector2.z,
(Vector1.w * Vector2.w))));
}
#if 0
float SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v8f32_v8f32, )(float8 Vector1, float8 Vector2)
{
}
float SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v16f32_v16f32, )(float16 Vector1, float16 Vector2)
{
}
#endif
#if defined(cl_khr_fp64)
double SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v2f64_v2f64, )(double2 Vector1, double2 Vector2)
{
return SPIRV_OCL_BUILTIN(fma, _f64_f64_f64, )(Vector1.x, Vector2.x, (Vector1.y * Vector2.y));
}
double SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v3f64_v3f64, )(double3 Vector1, double3 Vector2)
{
return SPIRV_OCL_BUILTIN(fma, _f64_f64_f64, )(Vector1.x, Vector2.x,
SPIRV_OCL_BUILTIN(fma, _f64_f64_f64, )(Vector1.y, Vector2.y, (Vector1.z * Vector2.z)));
}
double SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v4f64_v4f64, )(double4 Vector1, double4 Vector2)
{
return SPIRV_OCL_BUILTIN(fma, _f64_f64_f64, )(Vector1.x, Vector2.x,
SPIRV_OCL_BUILTIN(fma, _f64_f64_f64, )(Vector1.y, Vector2.y,
SPIRV_OCL_BUILTIN(fma, _f64_f64_f64, )(Vector1.z, Vector2.z,
(Vector1.w * Vector2.w))));
}
#endif
#if 0
#if defined(cl_khr_fp64)
double SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v8f64_v8f64, )(double8 Vector1, double8 Vector2)
{
}
double SPIRV_OVERLOADABLE SPIRV_BUILTIN(Dot, _v16f64_v16f64, )(double16 Vector1, double16 Vector2)
{
}
#endif
#endif
// unsigned
TwoOp_i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _i8_i8, )(uchar Operand1, uchar Operand2)
{
return (TwoOp_i8) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _i8_i8, )(Operand1, Operand2) };
}
TwoOp_v2i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v2i8_v2i8, )(uchar2 Operand1, uchar2 Operand2)
{
return (TwoOp_v2i8) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v2i8_v2i8, )(Operand1, Operand2) };
}
TwoOp_v3i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v3i8_v3i8, )(uchar3 Operand1, uchar3 Operand2)
{
return (TwoOp_v3i8) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v3i8_v3i8, )(Operand1, Operand2) };
}
TwoOp_v4i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v4i8_v4i8, )(uchar4 Operand1, uchar4 Operand2)
{
return (TwoOp_v4i8) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v4i8_v4i8, )(Operand1, Operand2) };
}
TwoOp_v8i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v8i8_v8i8, )(uchar8 Operand1, uchar8 Operand2)
{
return (TwoOp_v8i8) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v8i8_v8i8, )(Operand1, Operand2) };
}
TwoOp_v16i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v16i8_v16i8, )(uchar16 Operand1, uchar16 Operand2)
{
return (TwoOp_v16i8) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v16i8_v16i8, )(Operand1, Operand2) };
}
TwoOp_i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _i16_i16, )(ushort Operand1, ushort Operand2)
{
return (TwoOp_i16) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _i16_i16, )(Operand1, Operand2) };
}
TwoOp_v2i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v2i16_v2i16, )(ushort2 Operand1, ushort2 Operand2)
{
return (TwoOp_v2i16) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v2i16_v2i16, )(Operand1, Operand2) };
}
TwoOp_v3i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v3i16_v3i16, )(ushort3 Operand1, ushort3 Operand2)
{
return (TwoOp_v3i16) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v3i16_v3i16, )(Operand1, Operand2) };
}
TwoOp_v4i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v4i16_v4i16, )(ushort4 Operand1, ushort4 Operand2)
{
return (TwoOp_v4i16) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v4i16_v4i16, )(Operand1, Operand2) };
}
TwoOp_v8i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v8i16_v8i16, )(ushort8 Operand1, ushort8 Operand2)
{
return (TwoOp_v8i16) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v8i16_v8i16, )(Operand1, Operand2) };
}
TwoOp_v16i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v16i16_v16i16, )(ushort16 Operand1, ushort16 Operand2)
{
return (TwoOp_v16i16) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v16i16_v16i16, )(Operand1, Operand2) };
}
TwoOp_i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _i32_i32, )(uint Operand1, uint Operand2)
{
return (TwoOp_i32) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _i32_i32, )(Operand1, Operand2) };
}
TwoOp_v2i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v2i32_v2i32, )(uint2 Operand1, uint2 Operand2)
{
return (TwoOp_v2i32) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v2i32_v2i32, )(Operand1, Operand2) };
}
TwoOp_v3i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v3i32_v3i32, )(uint3 Operand1, uint3 Operand2)
{
return (TwoOp_v3i32) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v3i32_v3i32, )(Operand1, Operand2) };
}
TwoOp_v4i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v4i32_v4i32, )(uint4 Operand1, uint4 Operand2)
{
return (TwoOp_v4i32) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v4i32_v4i32, )(Operand1, Operand2) };
}
TwoOp_v8i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v8i32_v8i32, )(uint8 Operand1, uint8 Operand2)
{
return (TwoOp_v8i32) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v8i32_v8i32, )(Operand1, Operand2) };
}
TwoOp_v16i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v16i32_v16i32, )(uint16 Operand1, uint16 Operand2)
{
return (TwoOp_v16i32) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v16i32_v16i32, )(Operand1, Operand2) };
}
TwoOp_i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _i64_i64, )(ulong Operand1, ulong Operand2)
{
return (TwoOp_i64) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _i64_i64, )(Operand1, Operand2) };
}
TwoOp_v2i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v2i64_v2i64, )(ulong2 Operand1, ulong2 Operand2)
{
return (TwoOp_v2i64) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v2i64_v2i64, )(Operand1, Operand2) };
}
TwoOp_v3i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v3i64_v3i64, )(ulong3 Operand1, ulong3 Operand2)
{
return (TwoOp_v3i64) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v3i64_v3i64, )(Operand1, Operand2) };
}
TwoOp_v4i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v4i64_v4i64, )(ulong4 Operand1, ulong4 Operand2)
{
return (TwoOp_v4i64) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v4i64_v4i64, )(Operand1, Operand2) };
}
TwoOp_v8i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v8i64_v8i64, )(ulong8 Operand1, ulong8 Operand2)
{
return (TwoOp_v8i64) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v8i64_v8i64, )(Operand1, Operand2) };
}
TwoOp_v16i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(UMulExtended, _v16i64_v16i64, )(ulong16 Operand1, ulong16 Operand2)
{
return (TwoOp_v16i64) { Operand1 * Operand2, SPIRV_OCL_BUILTIN(u_mul_hi, _v16i64_v16i64, )(Operand1, Operand2) };
}
// signed
TwoOp_i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _i8_i8, )(char Operand1, char Operand2)
{
return (TwoOp_i8) { as_uchar((char)(Operand1 * Operand2)), as_uchar(SPIRV_OCL_BUILTIN(s_mul_hi, _i8_i8, )(Operand1, Operand2)) };
}
TwoOp_v2i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v2i8_v2i8, )(char2 Operand1, char2 Operand2)
{
return (TwoOp_v2i8) { as_uchar2(Operand1 * Operand2), as_uchar2(SPIRV_OCL_BUILTIN(s_mul_hi, _v2i8_v2i8, )(Operand1, Operand2)) };
}
TwoOp_v3i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v3i8_v3i8, )(char3 Operand1, char3 Operand2)
{
return (TwoOp_v3i8) { as_uchar3(Operand1 * Operand2), as_uchar3(SPIRV_OCL_BUILTIN(s_mul_hi, _v3i8_v3i8, )(Operand1, Operand2)) };
}
TwoOp_v4i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v4i8_v4i8, )(char4 Operand1, char4 Operand2)
{
return (TwoOp_v4i8) { as_uchar4(Operand1 * Operand2), as_uchar4(SPIRV_OCL_BUILTIN(s_mul_hi, _v4i8_v4i8, )(Operand1, Operand2)) };
}
TwoOp_v8i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v8i8_v8i8, )(char8 Operand1, char8 Operand2)
{
return (TwoOp_v8i8) { as_uchar8(Operand1 * Operand2), as_uchar8(SPIRV_OCL_BUILTIN(s_mul_hi, _v8i8_v8i8, )(Operand1, Operand2)) };
}
TwoOp_v16i8 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v16i8_v16i8, )(char16 Operand1, char16 Operand2)
{
return (TwoOp_v16i8) { as_uchar16(Operand1 * Operand2), as_uchar16(SPIRV_OCL_BUILTIN(s_mul_hi, _v16i8_v16i8, )(Operand1, Operand2)) };
}
TwoOp_i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _i16_i16, )(short Operand1, short Operand2)
{
return (TwoOp_i16) { as_ushort((short)(Operand1 * Operand2)), as_ushort(SPIRV_OCL_BUILTIN(s_mul_hi, _i16_i16, )(Operand1, Operand2)) };
}
TwoOp_v2i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v2i16_v2i16, )(short2 Operand1, short2 Operand2)
{
return (TwoOp_v2i16) { as_ushort2(Operand1 * Operand2), as_ushort2(SPIRV_OCL_BUILTIN(s_mul_hi, _v2i16_v2i16, )(Operand1, Operand2)) };
}
TwoOp_v3i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v3i16_v3i16, )(short3 Operand1, short3 Operand2)
{
return (TwoOp_v3i16) { as_ushort3(Operand1 * Operand2), as_ushort3(SPIRV_OCL_BUILTIN(s_mul_hi, _v3i16_v3i16, )(Operand1, Operand2)) };
}
TwoOp_v4i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v4i16_v4i16, )(short4 Operand1, short4 Operand2)
{
return (TwoOp_v4i16) { as_ushort4(Operand1 * Operand2), as_ushort4(SPIRV_OCL_BUILTIN(s_mul_hi, _v4i16_v4i16, )(Operand1, Operand2)) };
}
TwoOp_v8i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v8i16_v8i16, )(short8 Operand1, short8 Operand2)
{
return (TwoOp_v8i16) { as_ushort8(Operand1 * Operand2), as_ushort8(SPIRV_OCL_BUILTIN(s_mul_hi, _v8i16_v8i16, )(Operand1, Operand2)) };
}
TwoOp_v16i16 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v16i16_v16i16, )(short16 Operand1, short16 Operand2)
{
return (TwoOp_v16i16) { as_ushort16(Operand1 * Operand2), as_ushort16(SPIRV_OCL_BUILTIN(s_mul_hi, _v16i16_v16i16, )(Operand1, Operand2)) };
}
TwoOp_i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _i32_i32, )(int Operand1, int Operand2)
{
return (TwoOp_i32) { as_uint(Operand1 * Operand2), as_uint(SPIRV_OCL_BUILTIN(s_mul_hi, _i32_i32, )(Operand1, Operand2)) };
}
TwoOp_v2i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v2i32_v2i32, )(int2 Operand1, int2 Operand2)
{
return (TwoOp_v2i32) { as_uint2(Operand1 * Operand2), as_uint2(SPIRV_OCL_BUILTIN(s_mul_hi, _v2i32_v2i32, )(Operand1, Operand2)) };
}
TwoOp_v3i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v3i32_v3i32, )(int3 Operand1, int3 Operand2)
{
return (TwoOp_v3i32) { as_uint3(Operand1 * Operand2), as_uint3(SPIRV_OCL_BUILTIN(s_mul_hi, _v3i32_v3i32, )(Operand1, Operand2)) };
}
TwoOp_v4i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v4i32_v4i32, )(int4 Operand1, int4 Operand2)
{
return (TwoOp_v4i32) { as_uint4(Operand1 * Operand2), as_uint4(SPIRV_OCL_BUILTIN(s_mul_hi, _v4i32_v4i32, )(Operand1, Operand2)) };
}
TwoOp_v8i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v8i32_v8i32, )(int8 Operand1, int8 Operand2)
{
return (TwoOp_v8i32) { as_uint8(Operand1 * Operand2), as_uint8(SPIRV_OCL_BUILTIN(s_mul_hi, _v8i32_v8i32, )(Operand1, Operand2)) };
}
TwoOp_v16i32 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v16i32_v16i32, )(int16 Operand1, int16 Operand2)
{
return (TwoOp_v16i32) { as_uint16(Operand1 * Operand2), as_uint16(SPIRV_OCL_BUILTIN(s_mul_hi, _v16i32_v16i32, )(Operand1, Operand2)) };
}
TwoOp_i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _i64_i64, )(long Operand1, long Operand2)
{
return (TwoOp_i64) { as_ulong(Operand1 * Operand2), as_ulong(SPIRV_OCL_BUILTIN(s_mul_hi, _i64_i64, )(Operand1, Operand2)) };
}
TwoOp_v2i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v2i64_v2i64, )(long2 Operand1, long2 Operand2)
{
return (TwoOp_v2i64) { as_ulong2(Operand1 * Operand2), as_ulong2(SPIRV_OCL_BUILTIN(s_mul_hi, _v2i64_v2i64, )(Operand1, Operand2)) };
}
TwoOp_v3i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v3i64_v3i64, )(long3 Operand1, long3 Operand2)
{
return (TwoOp_v3i64) { as_ulong3(Operand1 * Operand2), as_ulong3(SPIRV_OCL_BUILTIN(s_mul_hi, _v3i64_v3i64, )(Operand1, Operand2)) };
}
TwoOp_v4i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v4i64_v4i64, )(long4 Operand1, long4 Operand2)
{
return (TwoOp_v4i64) { as_ulong4(Operand1 * Operand2), as_ulong4(SPIRV_OCL_BUILTIN(s_mul_hi, _v4i64_v4i64, )(Operand1, Operand2)) };
}
TwoOp_v8i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v8i64_v8i64, )(long8 Operand1, long8 Operand2)
{
return (TwoOp_v8i64) { as_ulong8(Operand1 * Operand2), as_ulong8(SPIRV_OCL_BUILTIN(s_mul_hi, _v8i64_v8i64, )(Operand1, Operand2)) };
}
TwoOp_v16i64 SPIRV_OVERLOADABLE SPIRV_BUILTIN(SMulExtended, _v16i64_v16i64, )(long16 Operand1, long16 Operand2)
{
return (TwoOp_v16i64) { as_ulong16(Operand1 * Operand2), as_ulong16(SPIRV_OCL_BUILTIN(s_mul_hi, _v16i64_v16i64, )(Operand1, Operand2)) };
}
|