1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
|
;=========================== begin_copyright_notice ============================
;
; Copyright (C) 2021 Intel Corporation
;
; SPDX-License-Identifier: MIT
;
;============================ end_copyright_notice =============================
; RUN: igc_opt -igc-custom-safe-opt -S %s -o %t.ll
; RUN: FileCheck %s --input-file=%t.ll
define spir_kernel void @testkernel1(i32 %cmpop1, i32 %cmpop2, i1 %andop1) #0 {
0:
%cmp = icmp eq i32 %cmpop1, %cmpop2
%cmp.not = xor i1 %cmp, true
%and.cond = and i1 %andop1, %cmp.not
%selres = select i1 %cmp, i8 0, i8 1
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel1
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp ne i32 %cmpop1, %cmpop2
; CHECK-NOT: xor
; CHECK: %and.cond = and i1 %andop1, [[CONDNEW]]
; CHECK: %selres = select i1 [[CONDNEW]], i8 1, i8 0
define spir_kernel void @testkernel2(i32 %cmpop1, i32 %cmpop2, i1 %andop1) #0 {
0:
%cmp = icmp ugt i32 %cmpop1, %cmpop2
%cmp.not = xor i1 %cmp, true
%and.cond = and i1 %andop1, %cmp.not
%selres = select i1 %cmp, i8 0, i8 1
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel2
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp ule i32 %cmpop1, %cmpop2
; CHECK-NOT: xor
; CHECK: %and.cond = and i1 %andop1, [[CONDNEW]]
; CHECK: %selres = select i1 [[CONDNEW]], i8 1, i8 0
define spir_kernel void @testkernel3(i32 %cmpop1, i32 %cmpop2, i1 %andop1) #0 {
0:
%cmp = icmp uge i32 %cmpop1, %cmpop2
%cmp.not = xor i1 %cmp, true
%and.cond = and i1 %andop1, %cmp.not
%selres = select i1 %cmp, i8 0, i8 1
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel3
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp ult i32 %cmpop1, %cmpop2
; CHECK-NOT: xor
; CHECK: %and.cond = and i1 %andop1, [[CONDNEW]]
; CHECK: %selres = select i1 [[CONDNEW]], i8 1, i8 0
define spir_kernel void @testkernel4(i32 %cmpop1, i32 %cmpop2, i1 %andop1) #0 {
0:
%cmp = icmp ult i32 %cmpop1, %cmpop2
%cmp.not = xor i1 %cmp, true
%and.cond = and i1 %andop1, %cmp.not
%selres = select i1 %cmp, i8 0, i8 1
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel4
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp uge i32 %cmpop1, %cmpop2
; CHECK-NOT: xor
; CHECK: %and.cond = and i1 %andop1, [[CONDNEW]]
; CHECK: %selres = select i1 [[CONDNEW]], i8 1, i8 0
define spir_kernel void @testkernel5(i32 %cmpop1, i32 %cmpop2, i1 %andop1) #0 {
0:
%cmp = icmp ule i32 %cmpop1, %cmpop2
%cmp.not = xor i1 %cmp, true
%and.cond = and i1 %andop1, %cmp.not
br i1 %cmp, label %bb1, label %bb2
bb1:
br label %bb3
bb2:
br label %bb3
bb3:
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel5
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp ugt i32 %cmpop1, %cmpop2
; CHECK-NOT: xor
; CHECK: %and.cond = and i1 %andop1, [[CONDNEW]]
; CHECK: br i1 [[CONDNEW]], label %bb2, label %bb1
define spir_kernel void @testkernel6(i32 %cmpop1, i32 %cmpop2, i1 %andop1) #0 {
0:
%cmp = icmp sgt i32 %cmpop1, %cmpop2
%cmp.not = xor i1 %cmp, true
%and.cond = and i1 %andop1, %cmp.not
br i1 %cmp, label %bb1, label %bb2
bb1:
br label %bb3
bb2:
br label %bb3
bb3:
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel6
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp sle i32 %cmpop1, %cmpop2
; CHECK-NOT: xor
; CHECK: %and.cond = and i1 %andop1, [[CONDNEW]]
; CHECK: br i1 [[CONDNEW]], label %bb2, label %bb1
define spir_kernel void @testkernel7(i32 %cmpop1, i32 %cmpop2, i1 %andop1) #0 {
0:
%cmp = icmp sge i32 %cmpop1, %cmpop2
%cmp.not = xor i1 %cmp, true
%and.cond = and i1 %andop1, %cmp.not
br i1 %cmp, label %bb1, label %bb2
bb1:
br label %bb3
bb2:
br label %bb3
bb3:
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel7
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp slt i32 %cmpop1, %cmpop2
; CHECK-NOT: xor
; CHECK: %and.cond = and i1 %andop1, [[CONDNEW]]
; CHECK: br i1 [[CONDNEW]], label %bb2, label %bb1
define spir_kernel void @testkernel8(i32 %cmpop1, i32 %cmpop2, i1 %andop1) #0 {
0:
%cmp = icmp slt i32 %cmpop1, %cmpop2
%cmp.not = xor i1 %cmp, true
%and.cond = and i1 %andop1, %cmp.not
br i1 %cmp, label %bb1, label %bb2
bb1:
br label %bb3
bb2:
br label %bb3
bb3:
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel8
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp sge i32 %cmpop1, %cmpop2
; CHECK-NOT: xor
; CHECK: %and.cond = and i1 %andop1, [[CONDNEW]]
; CHECK: br i1 [[CONDNEW]], label %bb2, label %bb1
define spir_kernel void @testkernel9(i32 %cmpop1, i32 %cmpop2) #0 {
0:
%cmp = icmp sle i32 %cmpop1, %cmpop2
%cmp.not = xor i1 %cmp, true
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel9
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp sgt i32 %cmpop1, %cmpop2
; CHECK-NOT: xor
define spir_kernel void @testkernel10(i32 %cmpop1, i32 %cmpop2) #0 {
0:
%cmp = icmp eq i32 %cmpop1, %cmpop2
%cmp.not1 = xor i1 %cmp, 3
%cmp.not2 = xor i1 %cmp, 3
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel10
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp eq i32 %cmpop1, %cmpop2
; CHECK: %cmp.not1 = xor i1 [[CONDNEW]], true
; CHECK: %cmp.not2 = xor i1 [[CONDNEW]], true
define spir_kernel void @testkernel11(i32 %cmpop1, i32 %cmpop2) #0 {
0:
%cmp = icmp uge i32 %cmpop1, %cmpop2
%cmp.not = xor i1 true, %cmp
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel11
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp ult i32 %cmpop1, %cmpop2
; CHECK-NOT: xor
define spir_kernel void @testkernel12(i32 %cmpop1, i32 %cmpop2, i1 %andop1) #0 {
0:
%cmp = icmp ult i32 %cmpop1, %cmpop2
%cmp.not = xor i1 %cmp, true
%and.cond = and i1 %andop1, %cmp.not
%selres1 = select i1 %cmp, i8 0, i8 1
%selres2 = select i1 %cmp, i8 0, i8 1
br i1 %cmp, label %bb1, label %bb2
bb1:
br i1 %cmp, label %bb2, label %bb3
bb2:
br i1 %cmp, label %bb1, label %bb3
bb3:
ret void
}
; CHECK-LABEL: define spir_kernel void @testkernel12
; CHECK: [[CONDNEW:%[a-zA-Z0-9]+]] = icmp uge i32 %cmpop1, %cmpop2
; CHECK-NOT: xor
; CHECK: %selres1 = select i1 [[CONDNEW]], i8 1, i8 0
; CHECK: %selres2 = select i1 [[CONDNEW]], i8 1, i8 0
; CHECK: br i1 [[CONDNEW]], label %bb2, label %bb1
; CHECK: br i1 [[CONDNEW]], label %bb3, label %bb2
; CHECK: br i1 [[CONDNEW]], label %bb3, label %bb1
|
