1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
|
/*========================== begin_copyright_notice ============================
Copyright (C) 2017-2021 Intel Corporation
SPDX-License-Identifier: MIT
============================= end_copyright_notice ===========================*/
#ifndef _CISA_MEMOPT2_H_
#define _CISA_MEMOPT2_H_
#include "common/LLVMWarningsPush.hpp"
#include <llvm/ADT/DenseSet.h>
#include <llvm/Analysis/BasicAliasAnalysis.h>
#include <llvm/Analysis/ValueTracking.h>
#include <llvm/Pass.h>
#include <llvm/PassRegistry.h>
#include "common/LLVMWarningsPop.hpp"
#include "Compiler/CISACodeGen/ShaderCodeGen.hpp"
#include "Compiler/CodeGenContextWrapper.hpp"
#include "Compiler/IGCPassSupport.h"
#include "Compiler/MetaDataUtilsWrapper.h"
#include "MemOptUtils.h"
class MemInstCluster {
IGC::CodeGenContext *CTX = nullptr;
const DataLayout *DL = nullptr;
AliasAnalysis *AA = nullptr;
TargetLibraryInfo *TLI = nullptr;
unsigned MaxLiveOutThreshold = 0;
llvm::DenseSet<Instruction *> Scheduled;
public:
MemInstCluster() {}
~MemInstCluster() {}
void init(IGC::CodeGenContext *pCTX, const DataLayout *pDL, AliasAnalysis *pAA, TargetLibraryInfo *pTLI,
unsigned MLT) {
CTX = pCTX;
DL = pDL;
AA = pAA;
TLI = pTLI;
MaxLiveOutThreshold = MLT;
}
/// Called by MemOpt2 to cluster GPGPU kernels
bool runForOCL(Function &F);
/// called by AdvMemOpt to cluster 3D sample-ops
bool runForGFX(BasicBlock *BB);
private:
bool clusterSampler(BasicBlock *BB);
bool clusterMediaBlockRead(BasicBlock *BB);
bool isSafeToMoveTo(Instruction *I, Instruction *Pos, const SmallVectorImpl<Instruction *> *CheckList) const;
bool clusterLoad(BasicBlock *BB);
bool isDefinedBefore(BasicBlock *BB, Instruction *I, Instruction *Pos) const;
bool isSafeToScheduleLoad(const IGC::ALoadInst &LD, const SmallVectorImpl<Instruction *> *CheckList) const;
bool schedule(BasicBlock *BB, Value *V, Instruction *&InsertPos,
const SmallVectorImpl<Instruction *> *CheckList = nullptr);
unsigned getNumLiveOuts(Instruction *I) const;
unsigned getNumLiveOutBytes(Instruction *I) const;
unsigned getMaxLiveOutThreshold() const {
static unsigned MaxLiveOutThreshold =
IGC_GET_FLAG_VALUE(MaxLiveOutThreshold) ? IGC_GET_FLAG_VALUE(MaxLiveOutThreshold) : 4;
return MaxLiveOutThreshold;
}
};
void initializeMemOpt2Pass(llvm::PassRegistry &);
llvm::FunctionPass *createMemOpt2Pass(int MLT = -1);
#endif // _CISA_MEMOPT2_H_
|