File: store.ll

package info (click to toggle)
intel-graphics-compiler2 2.16.0-2
  • links: PTS, VCS
  • area: main
  • in suites: sid
  • size: 106,644 kB
  • sloc: cpp: 805,640; lisp: 287,672; ansic: 16,414; python: 3,952; yacc: 2,588; lex: 1,666; pascal: 313; sh: 186; makefile: 35
file content (78 lines) | stat: -rw-r--r-- 2,169 bytes parent folder | download
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
;=========================== begin_copyright_notice ============================
;
; Copyright (C) 2025 Intel Corporation
;
; SPDX-License-Identifier: MIT
;
;============================ end_copyright_notice =============================

; RUN: igc_opt --typed-pointers --enable-debugify --igc-promote-to-predicated-memory-access --platformbmg -S < %s 2>&1 | FileCheck %s

; Debug-info related check
; CHECK-NOT: WARNING
; CHECK: CheckModuleDebugify: PASS

; basic test
; CHECK-LABEL: @test1(
define void @test1(<64 x i32> addrspace(1)* %dst, i1 %pred, <64 x i32> %data) {
entry:
; CHECK: br label %st
  br i1 %pred, label %st, label %exit

st:
; CHECK: call void @llvm.genx.GenISA.PredicatedStore.p1v64i32.v64i32(<64 x i32> addrspace(1)* %dst, <64 x i32> %data, i64 4, i1 %pred)
  store <64 x i32> %data, <64 x i32> addrspace(1)* %dst, align 4
  br label %exit

exit:
  ret void
}

; inverse test
; CHECK-LABEL: @test2(
define void @test2(<64 x i32> addrspace(1)* %dst, i1 %pred, <64 x i32> %data) {
entry:
; CHECK: br label %st
  br i1 %pred, label %exit, label %st

st:
; CHECK: [[NOT:%.*]] = xor i1 %pred, true
; CHECK: call void @llvm.genx.GenISA.PredicatedStore.p1v64i32.v64i32(<64 x i32> addrspace(1)* %dst, <64 x i32> %data, i64 4, i1 [[NOT]])
  store <64 x i32> %data, <64 x i32> addrspace(1)* %dst, align 4
  br label %exit

exit:
  ret void
}

; early exit, not simple
; CHECK-LABEL: @test3(
define void @test3(<64 x i32> addrspace(1)* %dst, i1 %pred, <64 x i32> %data) {
entry:
; CHECK: br i1 %pred, label %st, label %exit
  br i1 %pred, label %st, label %exit

st:
; CHECK: store volatile <64 x i32> %data, <64 x i32> addrspace(1)* %dst, align 4
  store volatile <64 x i32> %data, <64 x i32> addrspace(1)* %dst, align 4
  br label %exit

exit:
  ret void
}

; illegal int type, exit
; CHECK-LABEL: @test4(
define void @test4(<64 x i33> addrspace(1)* %dst, i1 %pred, <64 x i33> %data) {
entry:
; CHECK: br i1 %pred, label %st, label %exit
  br i1 %pred, label %st, label %exit

st:
; CHECK: store <64 x i33> %data, <64 x i33> addrspace(1)* %dst, align 4
  store <64 x i33> %data, <64 x i33> addrspace(1)* %dst, align 4
  br label %exit

exit:
  ret void
}