1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
|
/*========================== begin_copyright_notice ============================
Copyright (C) 2017-2021 Intel Corporation
SPDX-License-Identifier: MIT
============================= end_copyright_notice ===========================*/
#include "../include/BiF_Definitions.cl"
#include "../../Headers/spirv.h"
#define _M_LOG10_2 (as_float(0x3e9a209b)) // 0.30103000998497009f
#define _M_LOG10_2_DBL (as_double(0x3fd34413509f79ff)) // 0.3010299956639811952137388
INLINE float __attribute__((overloadable)) __spirv_ocl_native_log10( float x )
{
return __spirv_ocl_native_log2(x) * _M_LOG10_2;
}
GENERATE_SPIRV_OCL_VECTOR_FUNCTIONS_1ARGS( native_log10, float, float, f32 )
#if defined(cl_khr_fp64)
INLINE double __attribute__((overloadable)) __spirv_ocl_native_log10( double x )
{
return __spirv_ocl_native_log2((float)x) * _M_LOG10_2;
}
GENERATE_SPIRV_OCL_VECTOR_FUNCTIONS_1ARGS( native_log10, double, double, f64 )
#endif // defined(cl_khr_fp64)
#if defined(cl_khr_fp16)
INLINE half __attribute__((overloadable)) __spirv_ocl_native_log10( half x )
{
return __spirv_ocl_native_log2(x) * (half)(_M_LOG10_2);
}
GENERATE_SPIRV_OCL_VECTOR_FUNCTIONS_1ARGS( native_log10, half, half, f16 )
#endif // defined(cl_khr_fp16)
#if defined(IGC_SPV_INTEL_bfloat16_arithmetic)
INLINE bfloat __attribute__((overloadable)) __spirv_ocl_native_log10( bfloat x )
{
bfloat bf16_M_LOG10_2 = (bfloat)_M_LOG10_2;
bfloat bf16_log2_x = __spirv_ocl_native_log2(x);
bfloat result = as_bfloat(__builtin_bf16_mul(as_ushort(bf16_log2_x), as_ushort(bf16_M_LOG10_2)));
return result;
}
GENERATE_SPIRV_OCL_VECTOR_FUNCTIONS_1ARGS( native_log10, bfloat, bfloat, )
#endif // defined(IGC_SPV_INTEL_bfloat16_arithmetic)
|