File: shl-or.ll

package info (click to toggle)
intel-graphics-compiler2 2.28.4-4
  • links: PTS, VCS
  • area: main
  • in suites: forky
  • size: 792,744 kB
  • sloc: cpp: 5,761,745; ansic: 466,928; lisp: 312,143; python: 114,790; asm: 44,736; pascal: 10,930; sh: 8,033; perl: 7,914; ml: 3,625; awk: 3,523; yacc: 2,747; javascript: 2,667; lex: 1,898; f90: 1,028; cs: 573; xml: 474; makefile: 344; objc: 162
file content (64 lines) | stat: -rw-r--r-- 2,003 bytes parent folder | download
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
;=========================== begin_copyright_notice ============================
;
; Copyright (C) 2024 Intel Corporation
;
; SPDX-License-Identifier: MIT
;
;============================ end_copyright_notice =============================
;
; REQUIRES: llvm-14-plus
; RUN: igc_opt --opaque-pointers --igc-gen-specific-pattern -S -dce < %s | FileCheck %s
; ------------------------------------------------
; GenSpecificPattern: shl + or
; ------------------------------------------------

; More cases for shl + or pattern

define i64 @test_shl_or_max(i64 %src1) {
; CHECK-LABEL: define i64 @test_shl_or_max(
; CHECK-SAME: i64 [[SRC1:%.*]]) {
; CHECK:    [[TMP1:%.*]] = shl i64 [[SRC1]], 63
; CHECK:    [[TMP2:%.*]] = add i64 [[TMP1]], 9223372036854775807
; CHECK:    ret i64 [[TMP2]]
;
  %1 = shl i64 %src1, 63
  %2 = or i64 %1, 9223372036854775807 ; 0x7FFFFFFFFFFFFFFF
  ret i64 %2
}

define i64 @test_shl_or_cond(i64 %src1) {
; CHECK-LABEL: define i64 @test_shl_or_cond(
; CHECK-SAME: i64 [[SRC1:%.*]]) {
; CHECK:    [[TMP1:%.*]] = shl i64 [[SRC1]], 62
; CHECK:    [[TMP2:%.*]] = add i64 [[TMP1]], 4611686018427387648
; CHECK:    ret i64 [[TMP2]]
;
  %1 = shl i64 %src1, 62
  %2 = or i64 %1, 4611686018427387648 ; 0x3FFFFFFFFFFFFF00
  ret i64 %2
}

; Negative cases(not optimized)
define i64 @test_shl_or_n1(i64 %src1) {
; CHECK-LABEL: define i64 @test_shl_or_n1(
; CHECK-SAME: i64 [[SRC1:%.*]]) {
; CHECK:    [[TMP1:%.*]] = shl i64 [[SRC1]], 62
; CHECK:    [[TMP2:%.*]] = or i64 [[TMP1]], 4611686018427387904
; CHECK:    ret i64 [[TMP2]]
;
  %1 = shl i64 %src1, 62
  %2 = or i64 %1, 4611686018427387904 ; 0x4000000000000000
  ret i64 %2
}

define i64 @test_shl_or_n2(i64 %src1) {
; CHECK-LABEL: define i64 @test_shl_or_n2(
; CHECK-SAME: i64 [[SRC1:%.*]]) {
; CHECK:    [[TMP1:%.*]] = shl i64 [[SRC1]], 63
; CHECK:    [[TMP2:%.*]] = or i64 [[TMP1]], -9223372036854775808
; CHECK:    ret i64 [[TMP2]]
;
  %1 = shl i64 %src1, 63
  %2 = or i64 %1, -9223372036854775808 ; 0x8000000000000000
  ret i64 %2
}