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Source: iverilog
Section: electronics
Priority: optional
Maintainer: Debian Electronics Team <pkg-electronics-devel@lists.alioth.debian.org>
Uploaders: Hamish Moffatt <hamish@debian.org>, Wesley J. Landaker <wjl@icecavern.net>,
Ramakrishnan Muthukrishnan <rkrishnan@debian.org>,
أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy@sabily.org>
Build-Depends: debhelper (>= 9), autotools-dev, gperf, bison, flex, zlib1g-dev, libbz2-dev, libreadline-dev
Standards-Version: 3.9.8
Homepage: http://iverilog.icarus.com
Vcs-Git: git://anonscm.debian.org/pkg-electronics/iverilog.git
Vcs-Browser: http://anonscm.debian.org/gitweb/?p=pkg-electronics/iverilog.git
Package: iverilog
Architecture: any
Depends: ${shlibs:Depends}, ${misc:Depends}
Replaces: verilog (<= 0.9.1-1)
Suggests: gtkwave
Description: Icarus verilog compiler
Icarus Verilog is intended to compile all of the Verilog HDL as
described in the IEEE-1364 standard. It is not quite there
yet. It does currently handle a mix of structural and behavioral
constructs.
.
The compiler can target either simulation, or netlist (EDIF).
Package: verilog
Architecture: all
Section: oldlibs
Priority: extra
Depends: ${misc:Depends}, iverilog
Description: Icarus verilog compiler (transitional package)
Icarus Verilog is intended to compile all of the Verilog HDL as
described in the IEEE-1364 standard. It is not quite there
yet. It does currently handle a mix of structural and behavioral
constructs.
.
The compiler can target either simulation, or netlist (EDIF).
.
This is a dummy transitional package that will ensure a proper upgrade path.
This package may be safely removed after upgrading.
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