File: partpv.v

package info (click to toggle)
iverilog 12.0-3
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid
  • size: 30,148 kB
  • sloc: cpp: 109,972; ansic: 62,713; yacc: 10,216; sh: 3,470; vhdl: 3,246; perl: 1,814; makefile: 1,774; python: 78; csh: 2
file content (15 lines) | stat: -rw-r--r-- 201 bytes parent folder | download | duplicates (2) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
 
// This test is intended to generate a IVL_LPM_SELECT_PV
// in the `b' port map

module top;

  wire [7:0] foo;

  bot b( .q(foo[3:0]) );

endmodule // top

module bot(q);
  output [3:0] q;

endmodule