File: doc-base

package info (click to toggle)
iverilog 13.0-1
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid
  • size: 34,160 kB
  • sloc: cpp: 114,001; ansic: 65,058; yacc: 10,610; sh: 4,286; vhdl: 3,246; makefile: 1,884; perl: 1,813; python: 579; csh: 2
file content (10 lines) | stat: -rw-r--r-- 353 bytes parent folder | download 
1
2
3
4
5
6
7
8
9
10
 
Document: iverilog
Title: Icarus Verilog Manual
Author: Stephen William <steve@icarus.com>
Abstract: This document is a manual for Icarus Verilog which describes 
 how it can be used to compile and simulate Verilog code
Section: Science/Electronics

Format: HTML
Index: /usr/share/doc/iverilog/html/index.html
Files: /usr/share/doc/iverilog/html/*.html