File: llvm-rL332680.patch

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Index: llvm/trunk/lib/Target/X86/X86DomainReassignment.cpp
===================================================================
--- a/lib/Target/X86/X86DomainReassignment.cpp
+++ a/lib/Target/X86/X86DomainReassignment.cpp
@@ -262,25 +262,6 @@
   }
 };
 
-/// An Instruction Converter which completely deletes an instruction.
-/// For example, IMPLICIT_DEF instructions can be deleted when converting from
-/// GPR to mask.
-class InstrDeleter : public InstrConverterBase {
-public:
-  InstrDeleter(unsigned SrcOpcode) : InstrConverterBase(SrcOpcode) {}
-
-  bool convertInstr(MachineInstr *MI, const TargetInstrInfo *TII,
-                    MachineRegisterInfo *MRI) const override {
-    assert(isLegal(MI, TII) && "Cannot convert instruction");
-    return true;
-  }
-
-  double getExtraCost(const MachineInstr *MI,
-                      MachineRegisterInfo *MRI) const override {
-    return 0;
-  }
-};
-
 // Key type to be used by the Instruction Converters map.
 // A converter is identified by <destination domain, source opcode>
 typedef std::pair<int, unsigned> InstrConverterBaseKeyTy;
@@ -587,7 +568,7 @@
       new InstrIgnore(TargetOpcode::PHI);
 
   Converters[{MaskDomain, TargetOpcode::IMPLICIT_DEF}] =
-      new InstrDeleter(TargetOpcode::IMPLICIT_DEF);
+      new InstrIgnore(TargetOpcode::IMPLICIT_DEF);
 
   Converters[{MaskDomain, TargetOpcode::INSERT_SUBREG}] =
       new InstrReplaceWithCopy(TargetOpcode::INSERT_SUBREG, 2);
Index: llvm/trunk/test/CodeGen/X86/domain-reassignment-implicit-def.ll
===================================================================
--- a/test/CodeGen/X86/domain-reassignment-implicit-def.ll
+++ b/test/CodeGen/X86/domain-reassignment-implicit-def.ll
@@ -0,0 +1,24 @@
+; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
+
+; Check that the X86 Domain Reassignment pass doesn't drop IMPLICIT_DEF nodes,
+; which would later cause crashes (e.g. in LiveVariables) - see PR37430
+define void @domain_reassignment_implicit_def(i1 %cond, i8 *%mem, float %arg) {
+; CHECK:    vxorps %xmm1, %xmm1, %xmm1
+; CHECK:    vcmpneqss %xmm1, %xmm0, %k0
+; CHECK:    kmovb %k0, (%rsi)
+top:
+  br i1 %cond, label %L19, label %L15
+
+L15:                                              ; preds = %top
+  %tmp47 = fcmp une float 0.000000e+00, %arg
+  %tmp48 = zext i1 %tmp47 to i8
+  br label %L21
+
+L19:                                              ; preds = %top
+  br label %L21
+
+L21:                                              ; preds = %L19, %L15
+  %.sroa.0.0 = phi i8 [ undef, %L19 ], [ %tmp48, %L15 ]
+  store i8 %.sroa.0.0, i8* %mem, align 1
+  ret void
+}