1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
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* written by unit test
* cell C2
* pin p1
* pin p2
* pin p3
.SUBCKT C2 1 2 4
* net 1 nc_10
* net 2 n2
* net 3 n3
* net 4 n4
* net 5 n5
* cell instance SC1 r0 *1 0,0
XSC1 1 3 6 3 C1
* cell instance SC2 r0 *1 0,0
XSC2 3 7 4 3 C1
.ENDS C2
* cell C1
* pin p1
* pin p2
* pin p3
* pin p4
.SUBCKT C1 1 2 4 5
* net 1 n1
* net 2 n2
* net 3 n3
* net 4 n4
* net 5 n5
* device instance $1 r0 *1 0,0 M4CLS
M$1 3 4 1 5 M4CLS L=0.25U W=0.18U AS=1.2P AD=0.75P PS=2.2U PD=1.75U
* device instance $2 r0 *1 0,0 M4CLS
M$2 2 4 3 5 M4CLS L=1.4U W=0.25U AS=1.3P AD=0.85P PS=2.3U PD=1.85U
.ENDS C1
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