1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
|
uint8 uPD96050::sr_read() {
return regs.sr >> 8;
}
void uPD96050::sr_write(uint8 data) {
}
uint8 uPD96050::dr_read() {
if(regs.sr.drc == 0) {
//16-bit
if(regs.sr.drs == 0) {
regs.sr.drs = 1;
return regs.dr >> 0;
} else {
regs.sr.rqm = 0;
regs.sr.drs = 0;
return regs.dr >> 8;
}
} else {
//8-bit
regs.sr.rqm = 0;
return regs.dr >> 0;
}
}
void uPD96050::dr_write(uint8 data) {
if(regs.sr.drc == 0) {
//16-bit
if(regs.sr.drs == 0) {
regs.sr.drs = 1;
regs.dr = (regs.dr & 0xff00) | (data << 0);
} else {
regs.sr.rqm = 0;
regs.sr.drs = 0;
regs.dr = (data << 8) | (regs.dr & 0x00ff);
}
} else {
//8-bit
regs.sr.rqm = 0;
regs.dr = (regs.dr & 0xff00) | (data << 0);
}
}
uint8 uPD96050::dp_read(uint12 addr) {
bool hi = addr & 1;
addr = (addr >> 1) & 2047;
if(hi == false) {
return dataRAM[addr] >> 0;
} else {
return dataRAM[addr] >> 8;
}
}
void uPD96050::dp_write(uint12 addr, uint8 data) {
bool hi = addr & 1;
addr = (addr >> 1) & 2047;
if(hi == false) {
dataRAM[addr] = (dataRAM[addr] & 0xff00) | (data << 0);
} else {
dataRAM[addr] = (dataRAM[addr] & 0x00ff) | (data << 8);
}
}
|
